CMSIS Cortex-M3 Device Peripheral Access Layer Header File. This file contains all the peripheral register's definitions, bits definitions and memory mapping for STM32L1xx High-, Medium-density and Medium-density Plus devices. More...

#include <cfg/arch.h>
#include <cfg/clock.h>
#include <arch/cm3/core_cm3.h>
#include <arch/cm3/stm/system_stm32f10x.h>
#include <stdint.h>

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Data Structures
struct	ADC_TypeDef
	Analog to Digital Converter. More...
struct	ADC_Common_TypeDef
struct	AES_TypeDef
	AES hardware accelerator. More...
struct	COMP_TypeDef
	Comparator. More...
struct	CRC_TypeDef
	CRC calculation unit. More...
struct	DAC_TypeDef
	Digital to Analog Converter. More...
struct	DBGMCU_TypeDef
	Debug MCU. More...
struct	DMA_Channel_TypeDef
	DMA Controller. More...
struct	DMA_TypeDef
struct	EXTI_TypeDef
	External Interrupt/Event Controller. More...
struct	FLASH_TypeDef
	FLASH Registers. More...
struct	OB_TypeDef
	Option Bytes Registers. More...
struct	OPAMP_TypeDef
	Operational Amplifier (OPAMP) More...
struct	FSMC_Bank1_TypeDef
	Flexible Static Memory Controller. More...
struct	FSMC_Bank1E_TypeDef
	Flexible Static Memory Controller Bank1E. More...
struct	GPIO_TypeDef
	General Purpose I/O. More...
struct	SYSCFG_TypeDef
	System configuration controller. More...
struct	I2C_TypeDef
	Inter-integrated Circuit Interface. More...
struct	IWDG_TypeDef
	Independent WATCHDOG. More...
struct	LCD_TypeDef
	LCD. More...
struct	PWR_TypeDef
	Power Control. More...
struct	RCC_TypeDef
	Reset and Clock Control. More...
struct	RI_TypeDef
	Routing Interface. More...
struct	RTC_TypeDef
	Real-Time Clock. More...
struct	SDIO_TypeDef
	SD host Interface. More...
struct	SPI_TypeDef
	Serial Peripheral Interface. More...
struct	TIM_TypeDef
	TIM. More...
struct	USART_TypeDef
	Universal Synchronous Asynchronous Receiver Transmitter. More...
struct	WWDG_TypeDef
	Window WATCHDOG. More...
Defines
#define	STM32L1XX_HD
#define	HSE_VALUE ((uint32_t)8000000)
	Comment the line below if you will not use the peripherals drivers. In this case, these drivers will not be included and the application code will be based on direct access to peripherals registers.
#define	HSE_STARTUP_TIMEOUT ((uint16_t)0x0500)
	In the following line adjust the External High Speed oscillator (HSE) Startup Timeout value.
#define	HSI_STARTUP_TIMEOUT ((uint16_t)0x0500)
	In the following line adjust the Internal High Speed oscillator (HSI) Startup Timeout value.
#define	HSI_VALUE ((uint32_t)16000000)
#define	LSI_VALUE ((uint32_t)37000)
#define	LSE_VALUE ((uint32_t)32768)
#define	__STM32L1XX_STDPERIPH_VERSION_MAIN (0x01)
	STM32L1xx Standard Peripheral Library version number V1.1.1.
#define	__STM32L1XX_STDPERIPH_VERSION_SUB1 (0x01)
#define	__STM32L1XX_STDPERIPH_VERSION_SUB2 (0x01)
#define	__STM32L1XX_STDPERIPH_VERSION_RC (0x00)
#define	__STM32L1XX_STDPERIPH_VERSION
#define	__CM3_REV 0x200
	STM32L1xx Interrupt Number Definition, according to the selected device in Library_configuration_section.
#define	__MPU_PRESENT 1
#define	__NVIC_PRIO_BITS 4
#define	__Vendor_SysTickConfig 0
#define	IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) \|\| ((STATE) == ENABLE))
#define	__RAM_FUNC FLASH_Status __attribute__((section(".data")))
	__RAM_FUNC definition
#define	FLASH_BASE ((uint32_t)0x08000000)
#define	SRAM_BASE ((uint32_t)0x20000000)
#define	PERIPH_BASE ((uint32_t)0x40000000)
#define	SRAM_BB_BASE ((uint32_t)0x22000000)
#define	PERIPH_BB_BASE ((uint32_t)0x42000000)
#define	FSMC_R_BASE ((uint32_t)0xA0000000)
#define	APB1PERIPH_BASE PERIPH_BASE
#define	APB2PERIPH_BASE (PERIPH_BASE + 0x10000)
#define	AHBPERIPH_BASE (PERIPH_BASE + 0x20000)
#define	TIM2_BASE (APB1PERIPH_BASE + 0x0000)
#define	TIM3_BASE (APB1PERIPH_BASE + 0x0400)
#define	TIM4_BASE (APB1PERIPH_BASE + 0x0800)
#define	TIM5_BASE (APB1PERIPH_BASE + 0x0C00)
#define	TIM6_BASE (APB1PERIPH_BASE + 0x1000)
#define	TIM7_BASE (APB1PERIPH_BASE + 0x1400)
#define	LCD_BASE (APB1PERIPH_BASE + 0x2400)
#define	RTC_BASE (APB1PERIPH_BASE + 0x2800)
#define	WWDG_BASE (APB1PERIPH_BASE + 0x2C00)
#define	IWDG_BASE (APB1PERIPH_BASE + 0x3000)
#define	SPI2_BASE (APB1PERIPH_BASE + 0x3800)
#define	SPI3_BASE (APB1PERIPH_BASE + 0x3C00)
#define	USART2_BASE (APB1PERIPH_BASE + 0x4400)
#define	USART3_BASE (APB1PERIPH_BASE + 0x4800)
#define	UART4_BASE (APB1PERIPH_BASE + 0x4C00)
#define	UART5_BASE (APB1PERIPH_BASE + 0x5000)
#define	I2C1_BASE (APB1PERIPH_BASE + 0x5400)
#define	I2C2_BASE (APB1PERIPH_BASE + 0x5800)
#define	PWR_BASE (APB1PERIPH_BASE + 0x7000)
#define	DAC_BASE (APB1PERIPH_BASE + 0x7400)
#define	COMP_BASE (APB1PERIPH_BASE + 0x7C00)
#define	RI_BASE (APB1PERIPH_BASE + 0x7C04)
#define	OPAMP_BASE (APB1PERIPH_BASE + 0x7C5C)
#define	SYSCFG_BASE (APB2PERIPH_BASE + 0x0000)
#define	EXTI_BASE (APB2PERIPH_BASE + 0x0400)
#define	TIM9_BASE (APB2PERIPH_BASE + 0x0800)
#define	TIM10_BASE (APB2PERIPH_BASE + 0x0C00)
#define	TIM11_BASE (APB2PERIPH_BASE + 0x1000)
#define	ADC1_BASE (APB2PERIPH_BASE + 0x2400)
#define	ADC_BASE (APB2PERIPH_BASE + 0x2700)
#define	SDIO_BASE (APB2PERIPH_BASE + 0x2C00)
#define	SPI1_BASE (APB2PERIPH_BASE + 0x3000)
#define	USART1_BASE (APB2PERIPH_BASE + 0x3800)
#define	GPIOA_BASE (AHBPERIPH_BASE + 0x0000)
#define	GPIOB_BASE (AHBPERIPH_BASE + 0x0400)
#define	GPIOC_BASE (AHBPERIPH_BASE + 0x0800)
#define	GPIOD_BASE (AHBPERIPH_BASE + 0x0C00)
#define	GPIOE_BASE (AHBPERIPH_BASE + 0x1000)
#define	GPIOH_BASE (AHBPERIPH_BASE + 0x1400)
#define	GPIOF_BASE (AHBPERIPH_BASE + 0x1800)
#define	GPIOG_BASE (AHBPERIPH_BASE + 0x1C00)
#define	CRC_BASE (AHBPERIPH_BASE + 0x3000)
#define	RCC_BASE (AHBPERIPH_BASE + 0x3800)
#define	FLASH_R_BASE (AHBPERIPH_BASE + 0x3C00)
#define	OB_BASE ((uint32_t)0x1FF80000)
#define	DMA1_BASE (AHBPERIPH_BASE + 0x6000)
#define	DMA1_Channel1_BASE (DMA1_BASE + 0x0008)
#define	DMA1_Channel2_BASE (DMA1_BASE + 0x001C)
#define	DMA1_Channel3_BASE (DMA1_BASE + 0x0030)
#define	DMA1_Channel4_BASE (DMA1_BASE + 0x0044)
#define	DMA1_Channel5_BASE (DMA1_BASE + 0x0058)
#define	DMA1_Channel6_BASE (DMA1_BASE + 0x006C)
#define	DMA1_Channel7_BASE (DMA1_BASE + 0x0080)
#define	DMA2_BASE (AHBPERIPH_BASE + 0x6400)
#define	DMA2_Channel1_BASE (DMA2_BASE + 0x0008)
#define	DMA2_Channel2_BASE (DMA2_BASE + 0x001C)
#define	DMA2_Channel3_BASE (DMA2_BASE + 0x0030)
#define	DMA2_Channel4_BASE (DMA2_BASE + 0x0044)
#define	DMA2_Channel5_BASE (DMA2_BASE + 0x0058)
#define	AES_BASE ((uint32_t)0x50060000)
#define	FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000)
#define	FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104)
#define	DBGMCU_BASE ((uint32_t)0xE0042000)
#define	TIM2 ((TIM_TypeDef *) TIM2_BASE)
#define	TIM3 ((TIM_TypeDef *) TIM3_BASE)
#define	TIM4 ((TIM_TypeDef *) TIM4_BASE)
#define	TIM5 ((TIM_TypeDef *) TIM5_BASE)
#define	TIM6 ((TIM_TypeDef *) TIM6_BASE)
#define	TIM7 ((TIM_TypeDef *) TIM7_BASE)
#define	LCD ((LCD_TypeDef *) LCD_BASE)
#define	RTC ((RTC_TypeDef *) RTC_BASE)
#define	WWDG ((WWDG_TypeDef *) WWDG_BASE)
#define	IWDG ((IWDG_TypeDef *) IWDG_BASE)
#define	SPI2 ((SPI_TypeDef *) SPI2_BASE)
#define	SPI3 ((SPI_TypeDef *) SPI3_BASE)
#define	USART2 ((USART_TypeDef *) USART2_BASE)
#define	USART3 ((USART_TypeDef *) USART3_BASE)
#define	UART4 ((USART_TypeDef *) UART4_BASE)
#define	UART5 ((USART_TypeDef *) UART5_BASE)
#define	I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define	I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define	PWR ((PWR_TypeDef *) PWR_BASE)
#define	DAC ((DAC_TypeDef *) DAC_BASE)
#define	COMP ((COMP_TypeDef *) COMP_BASE)
#define	RI ((RI_TypeDef *) RI_BASE)
#define	OPAMP ((OPAMP_TypeDef *) OPAMP_BASE)
#define	SYSCFG ((SYSCFG_TypeDef *) SYSCFG_BASE)
#define	EXTI ((EXTI_TypeDef *) EXTI_BASE)
#define	ADC1 ((ADC_TypeDef *) ADC1_BASE)
#define	ADC ((ADC_Common_TypeDef *) ADC_BASE)
#define	SDIO ((SDIO_TypeDef *) SDIO_BASE)
#define	TIM9 ((TIM_TypeDef *) TIM9_BASE)
#define	TIM10 ((TIM_TypeDef *) TIM10_BASE)
#define	TIM11 ((TIM_TypeDef *) TIM11_BASE)
#define	SPI1 ((SPI_TypeDef *) SPI1_BASE)
#define	USART1 ((USART_TypeDef *) USART1_BASE)
#define	DMA1 ((DMA_TypeDef *) DMA1_BASE)
#define	DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE)
#define	DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
#define	DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE)
#define	DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE)
#define	DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
#define	DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE)
#define	DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
#define	DMA2 ((DMA_TypeDef *) DMA2_BASE)
#define	DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE)
#define	DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE)
#define	DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE)
#define	DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
#define	DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE)
#define	RCC ((RCC_TypeDef *) RCC_BASE)
#define	CRC ((CRC_TypeDef *) CRC_BASE)
#define	GPIOA ((GPIO_TypeDef *) GPIOA_BASE)
#define	GPIOB ((GPIO_TypeDef *) GPIOB_BASE)
#define	GPIOC ((GPIO_TypeDef *) GPIOC_BASE)
#define	GPIOD ((GPIO_TypeDef *) GPIOD_BASE)
#define	GPIOE ((GPIO_TypeDef *) GPIOE_BASE)
#define	GPIOH ((GPIO_TypeDef *) GPIOH_BASE)
#define	GPIOF ((GPIO_TypeDef *) GPIOF_BASE)
#define	GPIOG ((GPIO_TypeDef *) GPIOG_BASE)
#define	FLASH ((FLASH_TypeDef *) FLASH_R_BASE)
#define	OB ((OB_TypeDef *) OB_BASE)
#define	AES ((AES_TypeDef *) AES_BASE)
#define	FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
#define	FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)
#define	DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE)
#define	ADC_SR_AWD ((uint32_t)0x00000001)
#define	ADC_SR_EOC ((uint32_t)0x00000002)
#define	ADC_SR_JEOC ((uint32_t)0x00000004)
#define	ADC_SR_JSTRT ((uint32_t)0x00000008)
#define	ADC_SR_STRT ((uint32_t)0x00000010)
#define	ADC_SR_OVR ((uint32_t)0x00000020)
#define	ADC_SR_ADONS ((uint32_t)0x00000040)
#define	ADC_SR_RCNR ((uint32_t)0x00000100)
#define	ADC_SR_JCNR ((uint32_t)0x00000200)
#define	ADC_CR1_AWDCH ((uint32_t)0x0000001F)
#define	ADC_CR1_AWDCH_0 ((uint32_t)0x00000001)
#define	ADC_CR1_AWDCH_1 ((uint32_t)0x00000002)
#define	ADC_CR1_AWDCH_2 ((uint32_t)0x00000004)
#define	ADC_CR1_AWDCH_3 ((uint32_t)0x00000008)
#define	ADC_CR1_AWDCH_4 ((uint32_t)0x00000010)
#define	ADC_CR1_EOCIE ((uint32_t)0x00000020)
#define	ADC_CR1_AWDIE ((uint32_t)0x00000040)
#define	ADC_CR1_JEOCIE ((uint32_t)0x00000080)
#define	ADC_CR1_SCAN ((uint32_t)0x00000100)
#define	ADC_CR1_AWDSGL ((uint32_t)0x00000200)
#define	ADC_CR1_JAUTO ((uint32_t)0x00000400)
#define	ADC_CR1_DISCEN ((uint32_t)0x00000800)
#define	ADC_CR1_JDISCEN ((uint32_t)0x00001000)
#define	ADC_CR1_DISCNUM ((uint32_t)0x0000E000)
#define	ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000)
#define	ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000)
#define	ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000)
#define	ADC_CR1_PDD ((uint32_t)0x00010000)
#define	ADC_CR1_PDI ((uint32_t)0x00020000)
#define	ADC_CR1_JAWDEN ((uint32_t)0x00400000)
#define	ADC_CR1_AWDEN ((uint32_t)0x00800000)
#define	ADC_CR1_RES ((uint32_t)0x03000000)
#define	ADC_CR1_RES_0 ((uint32_t)0x01000000)
#define	ADC_CR1_RES_1 ((uint32_t)0x02000000)
#define	ADC_CR1_OVRIE ((uint32_t)0x04000000)
#define	ADC_CR2_ADON ((uint32_t)0x00000001)
#define	ADC_CR2_CONT ((uint32_t)0x00000002)
#define	ADC_CR2_CFG ((uint32_t)0x00000004)
#define	ADC_CR2_DELS ((uint32_t)0x00000070)
#define	ADC_CR2_DELS_0 ((uint32_t)0x00000010)
#define	ADC_CR2_DELS_1 ((uint32_t)0x00000020)
#define	ADC_CR2_DELS_2 ((uint32_t)0x00000040)
#define	ADC_CR2_DMA ((uint32_t)0x00000100)
#define	ADC_CR2_DDS ((uint32_t)0x00000200)
#define	ADC_CR2_EOCS ((uint32_t)0x00000400)
#define	ADC_CR2_ALIGN ((uint32_t)0x00000800)
#define	ADC_CR2_JEXTSEL ((uint32_t)0x000F0000)
#define	ADC_CR2_JEXTSEL_0 ((uint32_t)0x00010000)
#define	ADC_CR2_JEXTSEL_1 ((uint32_t)0x00020000)
#define	ADC_CR2_JEXTSEL_2 ((uint32_t)0x00040000)
#define	ADC_CR2_JEXTSEL_3 ((uint32_t)0x00080000)
#define	ADC_CR2_JEXTEN ((uint32_t)0x00300000)
#define	ADC_CR2_JEXTEN_0 ((uint32_t)0x00100000)
#define	ADC_CR2_JEXTEN_1 ((uint32_t)0x00200000)
#define	ADC_CR2_JSWSTART ((uint32_t)0x00400000)
#define	ADC_CR2_EXTSEL ((uint32_t)0x0F000000)
#define	ADC_CR2_EXTSEL_0 ((uint32_t)0x01000000)
#define	ADC_CR2_EXTSEL_1 ((uint32_t)0x02000000)
#define	ADC_CR2_EXTSEL_2 ((uint32_t)0x04000000)
#define	ADC_CR2_EXTSEL_3 ((uint32_t)0x08000000)
#define	ADC_CR2_EXTEN ((uint32_t)0x30000000)
#define	ADC_CR2_EXTEN_0 ((uint32_t)0x10000000)
#define	ADC_CR2_EXTEN_1 ((uint32_t)0x20000000)
#define	ADC_CR2_SWSTART ((uint32_t)0x40000000)
#define	ADC_SMPR1_SMP20 ((uint32_t)0x00000007)
#define	ADC_SMPR1_SMP20_0 ((uint32_t)0x00000001)
#define	ADC_SMPR1_SMP20_1 ((uint32_t)0x00000002)
#define	ADC_SMPR1_SMP20_2 ((uint32_t)0x00000004)
#define	ADC_SMPR1_SMP21 ((uint32_t)0x00000038)
#define	ADC_SMPR1_SMP21_0 ((uint32_t)0x00000008)
#define	ADC_SMPR1_SMP21_1 ((uint32_t)0x00000010)
#define	ADC_SMPR1_SMP21_2 ((uint32_t)0x00000020)
#define	ADC_SMPR1_SMP22 ((uint32_t)0x000001C0)
#define	ADC_SMPR1_SMP22_0 ((uint32_t)0x00000040)
#define	ADC_SMPR1_SMP22_1 ((uint32_t)0x00000080)
#define	ADC_SMPR1_SMP22_2 ((uint32_t)0x00000100)
#define	ADC_SMPR1_SMP23 ((uint32_t)0x00000E00)
#define	ADC_SMPR1_SMP23_0 ((uint32_t)0x00000200)
#define	ADC_SMPR1_SMP23_1 ((uint32_t)0x00000400)
#define	ADC_SMPR1_SMP23_2 ((uint32_t)0x00000800)
#define	ADC_SMPR1_SMP24 ((uint32_t)0x00007000)
#define	ADC_SMPR1_SMP24_0 ((uint32_t)0x00001000)
#define	ADC_SMPR1_SMP24_1 ((uint32_t)0x00002000)
#define	ADC_SMPR1_SMP24_2 ((uint32_t)0x00004000)
#define	ADC_SMPR1_SMP25 ((uint32_t)0x00038000)
#define	ADC_SMPR1_SMP25_0 ((uint32_t)0x00008000)
#define	ADC_SMPR1_SMP25_1 ((uint32_t)0x00010000)
#define	ADC_SMPR1_SMP25_2 ((uint32_t)0x00020000)
#define	ADC_SMPR1_SMP26 ((uint32_t)0x001C0000)
#define	ADC_SMPR1_SMP26_0 ((uint32_t)0x00040000)
#define	ADC_SMPR1_SMP26_1 ((uint32_t)0x00080000)
#define	ADC_SMPR1_SMP26_2 ((uint32_t)0x00100000)
#define	ADC_SMPR1_SMP27 ((uint32_t)0x00E00000)
#define	ADC_SMPR1_SMP27_0 ((uint32_t)0x00200000)
#define	ADC_SMPR1_SMP27_1 ((uint32_t)0x00400000)
#define	ADC_SMPR1_SMP27_2 ((uint32_t)0x00800000)
#define	ADC_SMPR1_SMP28 ((uint32_t)0x07000000)
#define	ADC_SMPR1_SMP28_0 ((uint32_t)0x01000000)
#define	ADC_SMPR1_SMP28_1 ((uint32_t)0x02000000)
#define	ADC_SMPR1_SMP28_2 ((uint32_t)0x04000000)
#define	ADC_SMPR1_SMP29 ((uint32_t)0x38000000)
#define	ADC_SMPR1_SMP29_0 ((uint32_t)0x08000000)
#define	ADC_SMPR1_SMP29_1 ((uint32_t)0x10000000)
#define	ADC_SMPR1_SMP29_2 ((uint32_t)0x20000000)
#define	ADC_SMPR2_SMP10 ((uint32_t)0x00000007)
#define	ADC_SMPR2_SMP10_0 ((uint32_t)0x00000001)
#define	ADC_SMPR2_SMP10_1 ((uint32_t)0x00000002)
#define	ADC_SMPR2_SMP10_2 ((uint32_t)0x00000004)
#define	ADC_SMPR2_SMP11 ((uint32_t)0x00000038)
#define	ADC_SMPR2_SMP11_0 ((uint32_t)0x00000008)
#define	ADC_SMPR2_SMP11_1 ((uint32_t)0x00000010)
#define	ADC_SMPR2_SMP11_2 ((uint32_t)0x00000020)
#define	ADC_SMPR2_SMP12 ((uint32_t)0x000001C0)
#define	ADC_SMPR2_SMP12_0 ((uint32_t)0x00000040)
#define	ADC_SMPR2_SMP12_1 ((uint32_t)0x00000080)
#define	ADC_SMPR2_SMP12_2 ((uint32_t)0x00000100)
#define	ADC_SMPR2_SMP13 ((uint32_t)0x00000E00)
#define	ADC_SMPR2_SMP13_0 ((uint32_t)0x00000200)
#define	ADC_SMPR2_SMP13_1 ((uint32_t)0x00000400)
#define	ADC_SMPR2_SMP13_2 ((uint32_t)0x00000800)
#define	ADC_SMPR2_SMP14 ((uint32_t)0x00007000)
#define	ADC_SMPR2_SMP14_0 ((uint32_t)0x00001000)
#define	ADC_SMPR2_SMP14_1 ((uint32_t)0x00002000)
#define	ADC_SMPR2_SMP14_2 ((uint32_t)0x00004000)
#define	ADC_SMPR2_SMP15 ((uint32_t)0x00038000)
#define	ADC_SMPR2_SMP15_0 ((uint32_t)0x00008000)
#define	ADC_SMPR2_SMP15_1 ((uint32_t)0x00010000)
#define	ADC_SMPR2_SMP15_2 ((uint32_t)0x00020000)
#define	ADC_SMPR2_SMP16 ((uint32_t)0x001C0000)
#define	ADC_SMPR2_SMP16_0 ((uint32_t)0x00040000)
#define	ADC_SMPR2_SMP16_1 ((uint32_t)0x00080000)
#define	ADC_SMPR2_SMP16_2 ((uint32_t)0x00100000)
#define	ADC_SMPR2_SMP17 ((uint32_t)0x00E00000)
#define	ADC_SMPR2_SMP17_0 ((uint32_t)0x00200000)
#define	ADC_SMPR2_SMP17_1 ((uint32_t)0x00400000)
#define	ADC_SMPR2_SMP17_2 ((uint32_t)0x00800000)
#define	ADC_SMPR2_SMP18 ((uint32_t)0x07000000)
#define	ADC_SMPR2_SMP18_0 ((uint32_t)0x01000000)
#define	ADC_SMPR2_SMP18_1 ((uint32_t)0x02000000)
#define	ADC_SMPR2_SMP18_2 ((uint32_t)0x04000000)
#define	ADC_SMPR2_SMP19 ((uint32_t)0x38000000)
#define	ADC_SMPR2_SMP19_0 ((uint32_t)0x08000000)
#define	ADC_SMPR2_SMP19_1 ((uint32_t)0x10000000)
#define	ADC_SMPR2_SMP19_2 ((uint32_t)0x20000000)
#define	ADC_SMPR3_SMP0 ((uint32_t)0x00000007)
#define	ADC_SMPR3_SMP0_0 ((uint32_t)0x00000001)
#define	ADC_SMPR3_SMP0_1 ((uint32_t)0x00000002)
#define	ADC_SMPR3_SMP0_2 ((uint32_t)0x00000004)
#define	ADC_SMPR3_SMP1 ((uint32_t)0x00000038)
#define	ADC_SMPR3_SMP1_0 ((uint32_t)0x00000008)
#define	ADC_SMPR3_SMP1_1 ((uint32_t)0x00000010)
#define	ADC_SMPR3_SMP1_2 ((uint32_t)0x00000020)
#define	ADC_SMPR3_SMP2 ((uint32_t)0x000001C0)
#define	ADC_SMPR3_SMP2_0 ((uint32_t)0x00000040)
#define	ADC_SMPR3_SMP2_1 ((uint32_t)0x00000080)
#define	ADC_SMPR3_SMP2_2 ((uint32_t)0x00000100)
#define	ADC_SMPR3_SMP3 ((uint32_t)0x00000E00)
#define	ADC_SMPR3_SMP3_0 ((uint32_t)0x00000200)
#define	ADC_SMPR3_SMP3_1 ((uint32_t)0x00000400)
#define	ADC_SMPR3_SMP3_2 ((uint32_t)0x00000800)
#define	ADC_SMPR3_SMP4 ((uint32_t)0x00007000)
#define	ADC_SMPR3_SMP4_0 ((uint32_t)0x00001000)
#define	ADC_SMPR3_SMP4_1 ((uint32_t)0x00002000)
#define	ADC_SMPR3_SMP4_2 ((uint32_t)0x00004000)
#define	ADC_SMPR3_SMP5 ((uint32_t)0x00038000)
#define	ADC_SMPR3_SMP5_0 ((uint32_t)0x00008000)
#define	ADC_SMPR3_SMP5_1 ((uint32_t)0x00010000)
#define	ADC_SMPR3_SMP5_2 ((uint32_t)0x00020000)
#define	ADC_SMPR3_SMP6 ((uint32_t)0x001C0000)
#define	ADC_SMPR3_SMP6_0 ((uint32_t)0x00040000)
#define	ADC_SMPR3_SMP6_1 ((uint32_t)0x00080000)
#define	ADC_SMPR3_SMP6_2 ((uint32_t)0x00100000)
#define	ADC_SMPR3_SMP7 ((uint32_t)0x00E00000)
#define	ADC_SMPR3_SMP7_0 ((uint32_t)0x00200000)
#define	ADC_SMPR3_SMP7_1 ((uint32_t)0x00400000)
#define	ADC_SMPR3_SMP7_2 ((uint32_t)0x00800000)
#define	ADC_SMPR3_SMP8 ((uint32_t)0x07000000)
#define	ADC_SMPR3_SMP8_0 ((uint32_t)0x01000000)
#define	ADC_SMPR3_SMP8_1 ((uint32_t)0x02000000)
#define	ADC_SMPR3_SMP8_2 ((uint32_t)0x04000000)
#define	ADC_SMPR3_SMP9 ((uint32_t)0x38000000)
#define	ADC_SMPR3_SMP9_0 ((uint32_t)0x08000000)
#define	ADC_SMPR3_SMP9_1 ((uint32_t)0x10000000)
#define	ADC_SMPR3_SMP9_2 ((uint32_t)0x20000000)
#define	ADC_JOFR1_JOFFSET1 ((uint32_t)0x00000FFF)
#define	ADC_JOFR2_JOFFSET2 ((uint32_t)0x00000FFF)
#define	ADC_JOFR3_JOFFSET3 ((uint32_t)0x00000FFF)
#define	ADC_JOFR4_JOFFSET4 ((uint32_t)0x00000FFF)
#define	ADC_HTR_HT ((uint32_t)0x00000FFF)
#define	ADC_LTR_LT ((uint32_t)0x00000FFF)
#define	ADC_SQR1_L ((uint32_t)0x00F00000)
#define	ADC_SQR1_L_0 ((uint32_t)0x00100000)
#define	ADC_SQR1_L_1 ((uint32_t)0x00200000)
#define	ADC_SQR1_L_2 ((uint32_t)0x00400000)
#define	ADC_SQR1_L_3 ((uint32_t)0x00800000)
#define	ADC_SQR1_SQ28 ((uint32_t)0x000F8000)
#define	ADC_SQR1_SQ28_0 ((uint32_t)0x00008000)
#define	ADC_SQR1_SQ28_1 ((uint32_t)0x00010000)
#define	ADC_SQR1_SQ28_2 ((uint32_t)0x00020000)
#define	ADC_SQR1_SQ28_3 ((uint32_t)0x00040000)
#define	ADC_SQR1_SQ28_4 ((uint32_t)0x00080000)
#define	ADC_SQR1_SQ27 ((uint32_t)0x00007C00)
#define	ADC_SQR1_SQ27_0 ((uint32_t)0x00000400)
#define	ADC_SQR1_SQ27_1 ((uint32_t)0x00000800)
#define	ADC_SQR1_SQ27_2 ((uint32_t)0x00001000)
#define	ADC_SQR1_SQ27_3 ((uint32_t)0x00002000)
#define	ADC_SQR1_SQ27_4 ((uint32_t)0x00004000)
#define	ADC_SQR1_SQ26 ((uint32_t)0x000003E0)
#define	ADC_SQR1_SQ26_0 ((uint32_t)0x00000020)
#define	ADC_SQR1_SQ26_1 ((uint32_t)0x00000040)
#define	ADC_SQR1_SQ26_2 ((uint32_t)0x00000080)
#define	ADC_SQR1_SQ26_3 ((uint32_t)0x00000100)
#define	ADC_SQR1_SQ26_4 ((uint32_t)0x00000200)
#define	ADC_SQR1_SQ25 ((uint32_t)0x0000001F)
#define	ADC_SQR1_SQ25_0 ((uint32_t)0x00000001)
#define	ADC_SQR1_SQ25_1 ((uint32_t)0x00000002)
#define	ADC_SQR1_SQ25_2 ((uint32_t)0x00000004)
#define	ADC_SQR1_SQ25_3 ((uint32_t)0x00000008)
#define	ADC_SQR1_SQ25_4 ((uint32_t)0x00000010)
#define	ADC_SQR2_SQ19 ((uint32_t)0x0000001F)
#define	ADC_SQR2_SQ19_0 ((uint32_t)0x00000001)
#define	ADC_SQR2_SQ19_1 ((uint32_t)0x00000002)
#define	ADC_SQR2_SQ19_2 ((uint32_t)0x00000004)
#define	ADC_SQR2_SQ19_3 ((uint32_t)0x00000008)
#define	ADC_SQR2_SQ19_4 ((uint32_t)0x00000010)
#define	ADC_SQR2_SQ20 ((uint32_t)0x000003E0)
#define	ADC_SQR2_SQ20_0 ((uint32_t)0x00000020)
#define	ADC_SQR2_SQ20_1 ((uint32_t)0x00000040)
#define	ADC_SQR2_SQ20_2 ((uint32_t)0x00000080)
#define	ADC_SQR2_SQ20_3 ((uint32_t)0x00000100)
#define	ADC_SQR2_SQ20_4 ((uint32_t)0x00000200)
#define	ADC_SQR2_SQ21 ((uint32_t)0x00007C00)
#define	ADC_SQR2_SQ21_0 ((uint32_t)0x00000400)
#define	ADC_SQR2_SQ21_1 ((uint32_t)0x00000800)
#define	ADC_SQR2_SQ21_2 ((uint32_t)0x00001000)
#define	ADC_SQR2_SQ21_3 ((uint32_t)0x00002000)
#define	ADC_SQR2_SQ21_4 ((uint32_t)0x00004000)
#define	ADC_SQR2_SQ22 ((uint32_t)0x000F8000)
#define	ADC_SQR2_SQ22_0 ((uint32_t)0x00008000)
#define	ADC_SQR2_SQ22_1 ((uint32_t)0x00010000)
#define	ADC_SQR2_SQ22_2 ((uint32_t)0x00020000)
#define	ADC_SQR2_SQ22_3 ((uint32_t)0x00040000)
#define	ADC_SQR2_SQ22_4 ((uint32_t)0x00080000)
#define	ADC_SQR2_SQ23 ((uint32_t)0x01F00000)
#define	ADC_SQR2_SQ23_0 ((uint32_t)0x00100000)
#define	ADC_SQR2_SQ23_1 ((uint32_t)0x00200000)
#define	ADC_SQR2_SQ23_2 ((uint32_t)0x00400000)
#define	ADC_SQR2_SQ23_3 ((uint32_t)0x00800000)
#define	ADC_SQR2_SQ23_4 ((uint32_t)0x01000000)
#define	ADC_SQR2_SQ24 ((uint32_t)0x3E000000)
#define	ADC_SQR2_SQ24_0 ((uint32_t)0x02000000)
#define	ADC_SQR2_SQ24_1 ((uint32_t)0x04000000)
#define	ADC_SQR2_SQ24_2 ((uint32_t)0x08000000)
#define	ADC_SQR2_SQ24_3 ((uint32_t)0x10000000)
#define	ADC_SQR2_SQ24_4 ((uint32_t)0x20000000)
#define	ADC_SQR3_SQ13 ((uint32_t)0x0000001F)
#define	ADC_SQR3_SQ13_0 ((uint32_t)0x00000001)
#define	ADC_SQR3_SQ13_1 ((uint32_t)0x00000002)
#define	ADC_SQR3_SQ13_2 ((uint32_t)0x00000004)
#define	ADC_SQR3_SQ13_3 ((uint32_t)0x00000008)
#define	ADC_SQR3_SQ13_4 ((uint32_t)0x00000010)
#define	ADC_SQR3_SQ14 ((uint32_t)0x000003E0)
#define	ADC_SQR3_SQ14_0 ((uint32_t)0x00000020)
#define	ADC_SQR3_SQ14_1 ((uint32_t)0x00000040)
#define	ADC_SQR3_SQ14_2 ((uint32_t)0x00000080)
#define	ADC_SQR3_SQ14_3 ((uint32_t)0x00000100)
#define	ADC_SQR3_SQ14_4 ((uint32_t)0x00000200)
#define	ADC_SQR3_SQ15 ((uint32_t)0x00007C00)
#define	ADC_SQR3_SQ15_0 ((uint32_t)0x00000400)
#define	ADC_SQR3_SQ15_1 ((uint32_t)0x00000800)
#define	ADC_SQR3_SQ15_2 ((uint32_t)0x00001000)
#define	ADC_SQR3_SQ15_3 ((uint32_t)0x00002000)
#define	ADC_SQR3_SQ15_4 ((uint32_t)0x00004000)
#define	ADC_SQR3_SQ16 ((uint32_t)0x000F8000)
#define	ADC_SQR3_SQ16_0 ((uint32_t)0x00008000)
#define	ADC_SQR3_SQ16_1 ((uint32_t)0x00010000)
#define	ADC_SQR3_SQ16_2 ((uint32_t)0x00020000)
#define	ADC_SQR3_SQ16_3 ((uint32_t)0x00040000)
#define	ADC_SQR3_SQ16_4 ((uint32_t)0x00080000)
#define	ADC_SQR3_SQ17 ((uint32_t)0x01F00000)
#define	ADC_SQR3_SQ17_0 ((uint32_t)0x00100000)
#define	ADC_SQR3_SQ17_1 ((uint32_t)0x00200000)
#define	ADC_SQR3_SQ17_2 ((uint32_t)0x00400000)
#define	ADC_SQR3_SQ17_3 ((uint32_t)0x00800000)
#define	ADC_SQR3_SQ17_4 ((uint32_t)0x01000000)
#define	ADC_SQR3_SQ18 ((uint32_t)0x3E000000)
#define	ADC_SQR3_SQ18_0 ((uint32_t)0x02000000)
#define	ADC_SQR3_SQ18_1 ((uint32_t)0x04000000)
#define	ADC_SQR3_SQ18_2 ((uint32_t)0x08000000)
#define	ADC_SQR3_SQ18_3 ((uint32_t)0x10000000)
#define	ADC_SQR3_SQ18_4 ((uint32_t)0x20000000)
#define	ADC_SQR4_SQ7 ((uint32_t)0x0000001F)
#define	ADC_SQR4_SQ7_0 ((uint32_t)0x00000001)
#define	ADC_SQR4_SQ7_1 ((uint32_t)0x00000002)
#define	ADC_SQR4_SQ7_2 ((uint32_t)0x00000004)
#define	ADC_SQR4_SQ7_3 ((uint32_t)0x00000008)
#define	ADC_SQR4_SQ7_4 ((uint32_t)0x00000010)
#define	ADC_SQR4_SQ8 ((uint32_t)0x000003E0)
#define	ADC_SQR4_SQ8_0 ((uint32_t)0x00000020)
#define	ADC_SQR4_SQ8_1 ((uint32_t)0x00000040)
#define	ADC_SQR4_SQ8_2 ((uint32_t)0x00000080)
#define	ADC_SQR4_SQ8_3 ((uint32_t)0x00000100)
#define	ADC_SQR4_SQ8_4 ((uint32_t)0x00000200)
#define	ADC_SQR4_SQ9 ((uint32_t)0x00007C00)
#define	ADC_SQR4_SQ9_0 ((uint32_t)0x00000400)
#define	ADC_SQR4_SQ9_1 ((uint32_t)0x00000800)
#define	ADC_SQR4_SQ9_2 ((uint32_t)0x00001000)
#define	ADC_SQR4_SQ9_3 ((uint32_t)0x00002000)
#define	ADC_SQR4_SQ9_4 ((uint32_t)0x00004000)
#define	ADC_SQR4_SQ10 ((uint32_t)0x000F8000)
#define	ADC_SQR4_SQ10_0 ((uint32_t)0x00008000)
#define	ADC_SQR4_SQ10_1 ((uint32_t)0x00010000)
#define	ADC_SQR4_SQ10_2 ((uint32_t)0x00020000)
#define	ADC_SQR4_SQ10_3 ((uint32_t)0x00040000)
#define	ADC_SQR4_SQ10_4 ((uint32_t)0x00080000)
#define	ADC_SQR4_SQ11 ((uint32_t)0x01F00000)
#define	ADC_SQR4_SQ11_0 ((uint32_t)0x00100000)
#define	ADC_SQR4_SQ11_1 ((uint32_t)0x00200000)
#define	ADC_SQR4_SQ11_2 ((uint32_t)0x00400000)
#define	ADC_SQR4_SQ11_3 ((uint32_t)0x00800000)
#define	ADC_SQR4_SQ11_4 ((uint32_t)0x01000000)
#define	ADC_SQR4_SQ12 ((uint32_t)0x3E000000)
#define	ADC_SQR4_SQ12_0 ((uint32_t)0x02000000)
#define	ADC_SQR4_SQ12_1 ((uint32_t)0x04000000)
#define	ADC_SQR4_SQ12_2 ((uint32_t)0x08000000)
#define	ADC_SQR4_SQ12_3 ((uint32_t)0x10000000)
#define	ADC_SQR4_SQ12_4 ((uint32_t)0x20000000)
#define	ADC_SQR5_SQ1 ((uint32_t)0x0000001F)
#define	ADC_SQR5_SQ1_0 ((uint32_t)0x00000001)
#define	ADC_SQR5_SQ1_1 ((uint32_t)0x00000002)
#define	ADC_SQR5_SQ1_2 ((uint32_t)0x00000004)
#define	ADC_SQR5_SQ1_3 ((uint32_t)0x00000008)
#define	ADC_SQR5_SQ1_4 ((uint32_t)0x00000010)
#define	ADC_SQR5_SQ2 ((uint32_t)0x000003E0)
#define	ADC_SQR5_SQ2_0 ((uint32_t)0x00000020)
#define	ADC_SQR5_SQ2_1 ((uint32_t)0x00000040)
#define	ADC_SQR5_SQ2_2 ((uint32_t)0x00000080)
#define	ADC_SQR5_SQ2_3 ((uint32_t)0x00000100)
#define	ADC_SQR5_SQ2_4 ((uint32_t)0x00000200)
#define	ADC_SQR5_SQ3 ((uint32_t)0x00007C00)
#define	ADC_SQR5_SQ3_0 ((uint32_t)0x00000400)
#define	ADC_SQR5_SQ3_1 ((uint32_t)0x00000800)
#define	ADC_SQR5_SQ3_2 ((uint32_t)0x00001000)
#define	ADC_SQR5_SQ3_3 ((uint32_t)0x00002000)
#define	ADC_SQR5_SQ3_4 ((uint32_t)0x00004000)
#define	ADC_SQR5_SQ4 ((uint32_t)0x000F8000)
#define	ADC_SQR5_SQ4_0 ((uint32_t)0x00008000)
#define	ADC_SQR5_SQ4_1 ((uint32_t)0x00010000)
#define	ADC_SQR5_SQ4_2 ((uint32_t)0x00020000)
#define	ADC_SQR5_SQ4_3 ((uint32_t)0x00040000)
#define	ADC_SQR5_SQ4_4 ((uint32_t)0x00080000)
#define	ADC_SQR5_SQ5 ((uint32_t)0x01F00000)
#define	ADC_SQR5_SQ5_0 ((uint32_t)0x00100000)
#define	ADC_SQR5_SQ5_1 ((uint32_t)0x00200000)
#define	ADC_SQR5_SQ5_2 ((uint32_t)0x00400000)
#define	ADC_SQR5_SQ5_3 ((uint32_t)0x00800000)
#define	ADC_SQR5_SQ5_4 ((uint32_t)0x01000000)
#define	ADC_SQR5_SQ6 ((uint32_t)0x3E000000)
#define	ADC_SQR5_SQ6_0 ((uint32_t)0x02000000)
#define	ADC_SQR5_SQ6_1 ((uint32_t)0x04000000)
#define	ADC_SQR5_SQ6_2 ((uint32_t)0x08000000)
#define	ADC_SQR5_SQ6_3 ((uint32_t)0x10000000)
#define	ADC_SQR5_SQ6_4 ((uint32_t)0x20000000)
#define	ADC_JSQR_JSQ1 ((uint32_t)0x0000001F)
#define	ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001)
#define	ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002)
#define	ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004)
#define	ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008)
#define	ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010)
#define	ADC_JSQR_JSQ2 ((uint32_t)0x000003E0)
#define	ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020)
#define	ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040)
#define	ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080)
#define	ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100)
#define	ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200)
#define	ADC_JSQR_JSQ3 ((uint32_t)0x00007C00)
#define	ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400)
#define	ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800)
#define	ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000)
#define	ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000)
#define	ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000)
#define	ADC_JSQR_JSQ4 ((uint32_t)0x000F8000)
#define	ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000)
#define	ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000)
#define	ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000)
#define	ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000)
#define	ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000)
#define	ADC_JSQR_JL ((uint32_t)0x00300000)
#define	ADC_JSQR_JL_0 ((uint32_t)0x00100000)
#define	ADC_JSQR_JL_1 ((uint32_t)0x00200000)
#define	ADC_JDR1_JDATA ((uint32_t)0x0000FFFF)
#define	ADC_JDR2_JDATA ((uint32_t)0x0000FFFF)
#define	ADC_JDR3_JDATA ((uint32_t)0x0000FFFF)
#define	ADC_JDR4_JDATA ((uint32_t)0x0000FFFF)
#define	ADC_DR_DATA ((uint32_t)0x0000FFFF)
#define	ADC_SMPR3_SMP30 ((uint32_t)0x00000007)
#define	ADC_SMPR3_SMP30_0 ((uint32_t)0x00000001)
#define	ADC_SMPR3_SMP30_1 ((uint32_t)0x00000002)
#define	ADC_SMPR3_SMP30_2 ((uint32_t)0x00000004)
#define	ADC_SMPR3_SMP31 ((uint32_t)0x00000038)
#define	ADC_SMPR3_SMP31_0 ((uint32_t)0x00000008)
#define	ADC_SMPR3_SMP31_1 ((uint32_t)0x00000010)
#define	ADC_SMPR3_SMP31_2 ((uint32_t)0x00000020)
#define	ADC_CSR_AWD1 ((uint32_t)0x00000001)
#define	ADC_CSR_EOC1 ((uint32_t)0x00000002)
#define	ADC_CSR_JEOC1 ((uint32_t)0x00000004)
#define	ADC_CSR_JSTRT1 ((uint32_t)0x00000008)
#define	ADC_CSR_STRT1 ((uint32_t)0x00000010)
#define	ADC_CSR_OVR1 ((uint32_t)0x00000020)
#define	ADC_CSR_ADONS1 ((uint32_t)0x00000040)
#define	ADC_CCR_ADCPRE ((uint32_t)0x00030000)
#define	ADC_CCR_ADCPRE_0 ((uint32_t)0x00010000)
#define	ADC_CCR_ADCPRE_1 ((uint32_t)0x00020000)
#define	ADC_CCR_TSVREFE ((uint32_t)0x00800000)
#define	AES_CR_EN ((uint32_t)0x00000001)
#define	AES_CR_DATATYPE ((uint32_t)0x00000006)
#define	AES_CR_DATATYPE_0 ((uint32_t)0x00000002)
#define	AES_CR_DATATYPE_1 ((uint32_t)0x00000004)
#define	AES_CR_MODE ((uint32_t)0x00000018)
#define	AES_CR_MODE_0 ((uint32_t)0x00000008)
#define	AES_CR_MODE_1 ((uint32_t)0x00000010)
#define	AES_CR_CHMOD ((uint32_t)0x00000060)
#define	AES_CR_CHMOD_0 ((uint32_t)0x00000020)
#define	AES_CR_CHMOD_1 ((uint32_t)0x00000040)
#define	AES_CR_CCFC ((uint32_t)0x00000080)
#define	AES_CR_ERRC ((uint32_t)0x00000100)
#define	AES_CR_CCIE ((uint32_t)0x00000200)
#define	AES_CR_ERRIE ((uint32_t)0x00000400)
#define	AES_CR_DMAINEN ((uint32_t)0x00000800)
#define	AES_CR_DMAOUTEN ((uint32_t)0x00001000)
#define	AES_SR_CCF ((uint32_t)0x00000001)
#define	AES_SR_RDERR ((uint32_t)0x00000002)
#define	AES_SR_WRERR ((uint32_t)0x00000004)
#define	AES_DINR ((uint32_t)0x0000FFFF)
#define	AES_DOUTR ((uint32_t)0x0000FFFF)
#define	AES_KEYR0 ((uint32_t)0x0000FFFF)
#define	AES_KEYR1 ((uint32_t)0x0000FFFF)
#define	AES_KEYR2 ((uint32_t)0x0000FFFF)
#define	AES_KEYR3 ((uint32_t)0x0000FFFF)
#define	AES_IVR0 ((uint32_t)0x0000FFFF)
#define	AES_IVR1 ((uint32_t)0x0000FFFF)
#define	AES_IVR2 ((uint32_t)0x0000FFFF)
#define	AES_IVR3 ((uint32_t)0x0000FFFF)
#define	COMP_CSR_10KPU ((uint32_t)0x00000001)
#define	COMP_CSR_400KPU ((uint32_t)0x00000002)
#define	COMP_CSR_10KPD ((uint32_t)0x00000004)
#define	COMP_CSR_400KPD ((uint32_t)0x00000008)
#define	COMP_CSR_CMP1EN ((uint32_t)0x00000010)
#define	COMP_CSR_SW1 ((uint32_t)0x00000020)
#define	COMP_CSR_CMP1OUT ((uint32_t)0x00000080)
#define	COMP_CSR_SPEED ((uint32_t)0x00001000)
#define	COMP_CSR_CMP2OUT ((uint32_t)0x00002000)
#define	COMP_CSR_VREFOUTEN ((uint32_t)0x00010000)
#define	COMP_CSR_WNDWE ((uint32_t)0x00020000)
#define	COMP_CSR_INSEL ((uint32_t)0x001C0000)
#define	COMP_CSR_INSEL_0 ((uint32_t)0x00040000)
#define	COMP_CSR_INSEL_1 ((uint32_t)0x00080000)
#define	COMP_CSR_INSEL_2 ((uint32_t)0x00100000)
#define	COMP_CSR_OUTSEL ((uint32_t)0x00E00000)
#define	COMP_CSR_OUTSEL_0 ((uint32_t)0x00200000)
#define	COMP_CSR_OUTSEL_1 ((uint32_t)0x00400000)
#define	COMP_CSR_OUTSEL_2 ((uint32_t)0x00800000)
#define	COMP_CSR_FCH3 ((uint32_t)0x04000000)
#define	COMP_CSR_FCH8 ((uint32_t)0x08000000)
#define	COMP_CSR_RCH13 ((uint32_t)0x10000000)
#define	COMP_CSR_CAIE ((uint32_t)0x20000000)
#define	COMP_CSR_CAIF ((uint32_t)0x40000000)
#define	COMP_CSR_TSUSP ((uint32_t)0x80000000)
#define	OPAMP_CSR_OPA1PD ((uint32_t)0x00000001)
#define	OPAMP_CSR_S3SEL1 ((uint32_t)0x00000002)
#define	OPAMP_CSR_S4SEL1 ((uint32_t)0x00000004)
#define	OPAMP_CSR_S5SEL1 ((uint32_t)0x00000008)
#define	OPAMP_CSR_S6SEL1 ((uint32_t)0x00000010)
#define	OPAMP_CSR_OPA1CAL_L ((uint32_t)0x00000020)
#define	OPAMP_CSR_OPA1CAL_H ((uint32_t)0x00000040)
#define	OPAMP_CSR_OPA1LPM ((uint32_t)0x00000080)
#define	OPAMP_CSR_OPA2PD ((uint32_t)0x00000100)
#define	OPAMP_CSR_S3SEL2 ((uint32_t)0x00000200)
#define	OPAMP_CSR_S4SEL2 ((uint32_t)0x00000400)
#define	OPAMP_CSR_S5SEL2 ((uint32_t)0x00000800)
#define	OPAMP_CSR_S6SEL2 ((uint32_t)0x00001000)
#define	OPAMP_CSR_OPA2CAL_L ((uint32_t)0x00002000)
#define	OPAMP_CSR_OPA2CAL_H ((uint32_t)0x00004000)
#define	OPAMP_CSR_OPA2LPM ((uint32_t)0x00008000)
#define	OPAMP_CSR_OPA3PD ((uint32_t)0x00010000)
#define	OPAMP_CSR_S3SEL3 ((uint32_t)0x00020000)
#define	OPAMP_CSR_S4SEL3 ((uint32_t)0x00040000)
#define	OPAMP_CSR_S5SEL3 ((uint32_t)0x00080000)
#define	OPAMP_CSR_S6SEL3 ((uint32_t)0x00100000)
#define	OPAMP_CSR_OPA3CAL_L ((uint32_t)0x00200000)
#define	OPAMP_CSR_OPA3CAL_H ((uint32_t)0x00400000)
#define	OPAMP_CSR_OPA3LPM ((uint32_t)0x00800000)
#define	OPAMP_CSR_ANAWSEL1 ((uint32_t)0x01000000)
#define	OPAMP_CSR_ANAWSEL2 ((uint32_t)0x02000000)
#define	OPAMP_CSR_ANAWSEL3 ((uint32_t)0x04000000)
#define	OPAMP_CSR_S7SEL2 ((uint32_t)0x08000000)
#define	OPAMP_CSR_AOP_RANGE ((uint32_t)0x10000000)
#define	OPAMP_CSR_OPA1CALOUT ((uint32_t)0x20000000)
#define	OPAMP_CSR_OPA2CALOUT ((uint32_t)0x40000000)
#define	OPAMP_CSR_OPA3CALOUT ((uint32_t)0x80000000)
#define	OPAMP_OTR_AO1_OPT_OFFSET_TRIM ((uint32_t)0x000003FF)
#define	OPAMP_OTR_AO2_OPT_OFFSET_TRIM ((uint32_t)0x000FFC00)
#define	OPAMP_OTR_AO3_OPT_OFFSET_TRIM ((uint32_t)0x3FF00000)
#define	OPAMP_OTR_OT_USER ((uint32_t)0x80000000)
#define	OPAMP_LP_OTR_AO1_OPT_OFFSET_TRIM_LP ((uint32_t)0x000003FF)
#define	OPAMP_LP_OTR_AO2_OPT_OFFSET_TRIM_LP ((uint32_t)0x000FFC00)
#define	OPAMP_LP_OTR_AO3_OPT_OFFSET_TRIM_LP ((uint32_t)0x3FF00000)
#define	CRC_DR_DR ((uint32_t)0xFFFFFFFF)
#define	CRC_IDR_IDR ((uint8_t)0xFF)
#define	CRC_CR_RESET ((uint32_t)0x00000001)
#define	DAC_CR_EN1 ((uint32_t)0x00000001)
#define	DAC_CR_BOFF1 ((uint32_t)0x00000002)
#define	DAC_CR_TEN1 ((uint32_t)0x00000004)
#define	DAC_CR_TSEL1 ((uint32_t)0x00000038)
#define	DAC_CR_TSEL1_0 ((uint32_t)0x00000008)
#define	DAC_CR_TSEL1_1 ((uint32_t)0x00000010)
#define	DAC_CR_TSEL1_2 ((uint32_t)0x00000020)
#define	DAC_CR_WAVE1 ((uint32_t)0x000000C0)
#define	DAC_CR_WAVE1_0 ((uint32_t)0x00000040)
#define	DAC_CR_WAVE1_1 ((uint32_t)0x00000080)
#define	DAC_CR_MAMP1 ((uint32_t)0x00000F00)
#define	DAC_CR_MAMP1_0 ((uint32_t)0x00000100)
#define	DAC_CR_MAMP1_1 ((uint32_t)0x00000200)
#define	DAC_CR_MAMP1_2 ((uint32_t)0x00000400)
#define	DAC_CR_MAMP1_3 ((uint32_t)0x00000800)
#define	DAC_CR_DMAEN1 ((uint32_t)0x00001000)
#define	DAC_CR_DMAUDRIE1 ((uint32_t)0x00002000)
#define	DAC_CR_EN2 ((uint32_t)0x00010000)
#define	DAC_CR_BOFF2 ((uint32_t)0x00020000)
#define	DAC_CR_TEN2 ((uint32_t)0x00040000)
#define	DAC_CR_TSEL2 ((uint32_t)0x00380000)
#define	DAC_CR_TSEL2_0 ((uint32_t)0x00080000)
#define	DAC_CR_TSEL2_1 ((uint32_t)0x00100000)
#define	DAC_CR_TSEL2_2 ((uint32_t)0x00200000)
#define	DAC_CR_WAVE2 ((uint32_t)0x00C00000)
#define	DAC_CR_WAVE2_0 ((uint32_t)0x00400000)
#define	DAC_CR_WAVE2_1 ((uint32_t)0x00800000)
#define	DAC_CR_MAMP2 ((uint32_t)0x0F000000)
#define	DAC_CR_MAMP2_0 ((uint32_t)0x01000000)
#define	DAC_CR_MAMP2_1 ((uint32_t)0x02000000)
#define	DAC_CR_MAMP2_2 ((uint32_t)0x04000000)
#define	DAC_CR_MAMP2_3 ((uint32_t)0x08000000)
#define	DAC_CR_DMAEN2 ((uint32_t)0x10000000)
#define	DAC_CR_DMAUDRIE2 ((uint32_t)0x20000000)
#define	DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01)
#define	DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02)
#define	DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF)
#define	DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0)
#define	DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF)
#define	DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF)
#define	DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0)
#define	DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF)
#define	DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF)
#define	DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000)
#define	DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0)
#define	DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000)
#define	DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF)
#define	DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00)
#define	DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF)
#define	DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF)
#define	DAC_SR_DMAUDR1 ((uint32_t)0x00002000)
#define	DAC_SR_DMAUDR2 ((uint32_t)0x20000000)
#define	DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF)
#define	DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000)
#define	DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000)
#define	DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000)
#define	DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000)
#define	DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000)
#define	DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000)
#define	DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000)
#define	DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000)
#define	DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000)
#define	DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000)
#define	DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000)
#define	DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000)
#define	DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000)
#define	DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000)
#define	DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000)
#define	DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000)
#define	DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000)
#define	DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001)
#define	DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002)
#define	DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004)
#define	DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020)
#define	DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0)
#define	DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040)
#define	DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080)
#define	DBGMCU_APB1_FZ_DBG_TIM2_STOP ((uint32_t)0x00000001)
#define	DBGMCU_APB1_FZ_DBG_TIM3_STOP ((uint32_t)0x00000002)
#define	DBGMCU_APB1_FZ_DBG_TIM4_STOP ((uint32_t)0x00000004)
#define	DBGMCU_APB1_FZ_DBG_TIM5_STOP ((uint32_t)0x00000008)
#define	DBGMCU_APB1_FZ_DBG_TIM6_STOP ((uint32_t)0x00000010)
#define	DBGMCU_APB1_FZ_DBG_TIM7_STOP ((uint32_t)0x00000020)
#define	DBGMCU_APB1_FZ_DBG_RTC_STOP ((uint32_t)0x00000400)
#define	DBGMCU_APB1_FZ_DBG_WWDG_STOP ((uint32_t)0x00000800)
#define	DBGMCU_APB1_FZ_DBG_IWDG_STOP ((uint32_t)0x00001000)
#define	DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000)
#define	DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000)
#define	DBGMCU_APB2_FZ_DBG_TIM9_STOP ((uint32_t)0x00000004)
#define	DBGMCU_APB2_FZ_DBG_TIM10_STOP ((uint32_t)0x00000008)
#define	DBGMCU_APB2_FZ_DBG_TIM11_STOP ((uint32_t)0x00000010)
#define	DMA_ISR_GIF1 ((uint32_t)0x00000001)
#define	DMA_ISR_TCIF1 ((uint32_t)0x00000002)
#define	DMA_ISR_HTIF1 ((uint32_t)0x00000004)
#define	DMA_ISR_TEIF1 ((uint32_t)0x00000008)
#define	DMA_ISR_GIF2 ((uint32_t)0x00000010)
#define	DMA_ISR_TCIF2 ((uint32_t)0x00000020)
#define	DMA_ISR_HTIF2 ((uint32_t)0x00000040)
#define	DMA_ISR_TEIF2 ((uint32_t)0x00000080)
#define	DMA_ISR_GIF3 ((uint32_t)0x00000100)
#define	DMA_ISR_TCIF3 ((uint32_t)0x00000200)
#define	DMA_ISR_HTIF3 ((uint32_t)0x00000400)
#define	DMA_ISR_TEIF3 ((uint32_t)0x00000800)
#define	DMA_ISR_GIF4 ((uint32_t)0x00001000)
#define	DMA_ISR_TCIF4 ((uint32_t)0x00002000)
#define	DMA_ISR_HTIF4 ((uint32_t)0x00004000)
#define	DMA_ISR_TEIF4 ((uint32_t)0x00008000)
#define	DMA_ISR_GIF5 ((uint32_t)0x00010000)
#define	DMA_ISR_TCIF5 ((uint32_t)0x00020000)
#define	DMA_ISR_HTIF5 ((uint32_t)0x00040000)
#define	DMA_ISR_TEIF5 ((uint32_t)0x00080000)
#define	DMA_ISR_GIF6 ((uint32_t)0x00100000)
#define	DMA_ISR_TCIF6 ((uint32_t)0x00200000)
#define	DMA_ISR_HTIF6 ((uint32_t)0x00400000)
#define	DMA_ISR_TEIF6 ((uint32_t)0x00800000)
#define	DMA_ISR_GIF7 ((uint32_t)0x01000000)
#define	DMA_ISR_TCIF7 ((uint32_t)0x02000000)
#define	DMA_ISR_HTIF7 ((uint32_t)0x04000000)
#define	DMA_ISR_TEIF7 ((uint32_t)0x08000000)
#define	DMA_IFCR_CGIF1 ((uint32_t)0x00000001)
#define	DMA_IFCR_CTCIF1 ((uint32_t)0x00000002)
#define	DMA_IFCR_CHTIF1 ((uint32_t)0x00000004)
#define	DMA_IFCR_CTEIF1 ((uint32_t)0x00000008)
#define	DMA_IFCR_CGIF2 ((uint32_t)0x00000010)
#define	DMA_IFCR_CTCIF2 ((uint32_t)0x00000020)
#define	DMA_IFCR_CHTIF2 ((uint32_t)0x00000040)
#define	DMA_IFCR_CTEIF2 ((uint32_t)0x00000080)
#define	DMA_IFCR_CGIF3 ((uint32_t)0x00000100)
#define	DMA_IFCR_CTCIF3 ((uint32_t)0x00000200)
#define	DMA_IFCR_CHTIF3 ((uint32_t)0x00000400)
#define	DMA_IFCR_CTEIF3 ((uint32_t)0x00000800)
#define	DMA_IFCR_CGIF4 ((uint32_t)0x00001000)
#define	DMA_IFCR_CTCIF4 ((uint32_t)0x00002000)
#define	DMA_IFCR_CHTIF4 ((uint32_t)0x00004000)
#define	DMA_IFCR_CTEIF4 ((uint32_t)0x00008000)
#define	DMA_IFCR_CGIF5 ((uint32_t)0x00010000)
#define	DMA_IFCR_CTCIF5 ((uint32_t)0x00020000)
#define	DMA_IFCR_CHTIF5 ((uint32_t)0x00040000)
#define	DMA_IFCR_CTEIF5 ((uint32_t)0x00080000)
#define	DMA_IFCR_CGIF6 ((uint32_t)0x00100000)
#define	DMA_IFCR_CTCIF6 ((uint32_t)0x00200000)
#define	DMA_IFCR_CHTIF6 ((uint32_t)0x00400000)
#define	DMA_IFCR_CTEIF6 ((uint32_t)0x00800000)
#define	DMA_IFCR_CGIF7 ((uint32_t)0x01000000)
#define	DMA_IFCR_CTCIF7 ((uint32_t)0x02000000)
#define	DMA_IFCR_CHTIF7 ((uint32_t)0x04000000)
#define	DMA_IFCR_CTEIF7 ((uint32_t)0x08000000)
#define	DMA_CCR1_EN ((uint16_t)0x0001)
#define	DMA_CCR1_TCIE ((uint16_t)0x0002)
#define	DMA_CCR1_HTIE ((uint16_t)0x0004)
#define	DMA_CCR1_TEIE ((uint16_t)0x0008)
#define	DMA_CCR1_DIR ((uint16_t)0x0010)
#define	DMA_CCR1_CIRC ((uint16_t)0x0020)
#define	DMA_CCR1_PINC ((uint16_t)0x0040)
#define	DMA_CCR1_MINC ((uint16_t)0x0080)
#define	DMA_CCR1_PSIZE ((uint16_t)0x0300)
#define	DMA_CCR1_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR1_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR1_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR1_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR1_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR1_PL ((uint16_t)0x3000)
#define	DMA_CCR1_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR1_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR1_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CCR2_EN ((uint16_t)0x0001)
#define	DMA_CCR2_TCIE ((uint16_t)0x0002)
#define	DMA_CCR2_HTIE ((uint16_t)0x0004)
#define	DMA_CCR2_TEIE ((uint16_t)0x0008)
#define	DMA_CCR2_DIR ((uint16_t)0x0010)
#define	DMA_CCR2_CIRC ((uint16_t)0x0020)
#define	DMA_CCR2_PINC ((uint16_t)0x0040)
#define	DMA_CCR2_MINC ((uint16_t)0x0080)
#define	DMA_CCR2_PSIZE ((uint16_t)0x0300)
#define	DMA_CCR2_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR2_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR2_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR2_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR2_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR2_PL ((uint16_t)0x3000)
#define	DMA_CCR2_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR2_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR2_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CCR3_EN ((uint16_t)0x0001)
#define	DMA_CCR3_TCIE ((uint16_t)0x0002)
#define	DMA_CCR3_HTIE ((uint16_t)0x0004)
#define	DMA_CCR3_TEIE ((uint16_t)0x0008)
#define	DMA_CCR3_DIR ((uint16_t)0x0010)
#define	DMA_CCR3_CIRC ((uint16_t)0x0020)
#define	DMA_CCR3_PINC ((uint16_t)0x0040)
#define	DMA_CCR3_MINC ((uint16_t)0x0080)
#define	DMA_CCR3_PSIZE ((uint16_t)0x0300)
#define	DMA_CCR3_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR3_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR3_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR3_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR3_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR3_PL ((uint16_t)0x3000)
#define	DMA_CCR3_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR3_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR3_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CCR4_EN ((uint16_t)0x0001)
#define	DMA_CCR4_TCIE ((uint16_t)0x0002)
#define	DMA_CCR4_HTIE ((uint16_t)0x0004)
#define	DMA_CCR4_TEIE ((uint16_t)0x0008)
#define	DMA_CCR4_DIR ((uint16_t)0x0010)
#define	DMA_CCR4_CIRC ((uint16_t)0x0020)
#define	DMA_CCR4_PINC ((uint16_t)0x0040)
#define	DMA_CCR4_MINC ((uint16_t)0x0080)
#define	DMA_CCR4_PSIZE ((uint16_t)0x0300)
#define	DMA_CCR4_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR4_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR4_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR4_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR4_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR4_PL ((uint16_t)0x3000)
#define	DMA_CCR4_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR4_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR4_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CCR5_EN ((uint16_t)0x0001)
#define	DMA_CCR5_TCIE ((uint16_t)0x0002)
#define	DMA_CCR5_HTIE ((uint16_t)0x0004)
#define	DMA_CCR5_TEIE ((uint16_t)0x0008)
#define	DMA_CCR5_DIR ((uint16_t)0x0010)
#define	DMA_CCR5_CIRC ((uint16_t)0x0020)
#define	DMA_CCR5_PINC ((uint16_t)0x0040)
#define	DMA_CCR5_MINC ((uint16_t)0x0080)
#define	DMA_CCR5_PSIZE ((uint16_t)0x0300)
#define	DMA_CCR5_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR5_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR5_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR5_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR5_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR5_PL ((uint16_t)0x3000)
#define	DMA_CCR5_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR5_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR5_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CCR6_EN ((uint16_t)0x0001)
#define	DMA_CCR6_TCIE ((uint16_t)0x0002)
#define	DMA_CCR6_HTIE ((uint16_t)0x0004)
#define	DMA_CCR6_TEIE ((uint16_t)0x0008)
#define	DMA_CCR6_DIR ((uint16_t)0x0010)
#define	DMA_CCR6_CIRC ((uint16_t)0x0020)
#define	DMA_CCR6_PINC ((uint16_t)0x0040)
#define	DMA_CCR6_MINC ((uint16_t)0x0080)
#define	DMA_CCR6_PSIZE ((uint16_t)0x0300)
#define	DMA_CCR6_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR6_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR6_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR6_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR6_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR6_PL ((uint16_t)0x3000)
#define	DMA_CCR6_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR6_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR6_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CCR7_EN ((uint16_t)0x0001)
#define	DMA_CCR7_TCIE ((uint16_t)0x0002)
#define	DMA_CCR7_HTIE ((uint16_t)0x0004)
#define	DMA_CCR7_TEIE ((uint16_t)0x0008)
#define	DMA_CCR7_DIR ((uint16_t)0x0010)
#define	DMA_CCR7_CIRC ((uint16_t)0x0020)
#define	DMA_CCR7_PINC ((uint16_t)0x0040)
#define	DMA_CCR7_MINC ((uint16_t)0x0080)
#define	DMA_CCR7_PSIZE , ((uint16_t)0x0300)
#define	DMA_CCR7_PSIZE_0 ((uint16_t)0x0100)
#define	DMA_CCR7_PSIZE_1 ((uint16_t)0x0200)
#define	DMA_CCR7_MSIZE ((uint16_t)0x0C00)
#define	DMA_CCR7_MSIZE_0 ((uint16_t)0x0400)
#define	DMA_CCR7_MSIZE_1 ((uint16_t)0x0800)
#define	DMA_CCR7_PL ((uint16_t)0x3000)
#define	DMA_CCR7_PL_0 ((uint16_t)0x1000)
#define	DMA_CCR7_PL_1 ((uint16_t)0x2000)
#define	DMA_CCR7_MEM2MEM ((uint16_t)0x4000)
#define	DMA_CNDTR1_NDT ((uint16_t)0xFFFF)
#define	DMA_CNDTR2_NDT ((uint16_t)0xFFFF)
#define	DMA_CNDTR3_NDT ((uint16_t)0xFFFF)
#define	DMA_CNDTR4_NDT ((uint16_t)0xFFFF)
#define	DMA_CNDTR5_NDT ((uint16_t)0xFFFF)
#define	DMA_CNDTR6_NDT ((uint16_t)0xFFFF)
#define	DMA_CNDTR7_NDT ((uint16_t)0xFFFF)
#define	DMA_CPAR1_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CPAR2_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CPAR3_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CPAR4_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CPAR5_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CPAR6_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CPAR7_PA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR1_MA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR2_MA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR3_MA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR4_MA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR5_MA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR6_MA ((uint32_t)0xFFFFFFFF)
#define	DMA_CMAR7_MA ((uint32_t)0xFFFFFFFF)
#define	EXTI_IMR_MR0 ((uint32_t)0x00000001)
#define	EXTI_IMR_MR1 ((uint32_t)0x00000002)
#define	EXTI_IMR_MR2 ((uint32_t)0x00000004)
#define	EXTI_IMR_MR3 ((uint32_t)0x00000008)
#define	EXTI_IMR_MR4 ((uint32_t)0x00000010)
#define	EXTI_IMR_MR5 ((uint32_t)0x00000020)
#define	EXTI_IMR_MR6 ((uint32_t)0x00000040)
#define	EXTI_IMR_MR7 ((uint32_t)0x00000080)
#define	EXTI_IMR_MR8 ((uint32_t)0x00000100)
#define	EXTI_IMR_MR9 ((uint32_t)0x00000200)
#define	EXTI_IMR_MR10 ((uint32_t)0x00000400)
#define	EXTI_IMR_MR11 ((uint32_t)0x00000800)
#define	EXTI_IMR_MR12 ((uint32_t)0x00001000)
#define	EXTI_IMR_MR13 ((uint32_t)0x00002000)
#define	EXTI_IMR_MR14 ((uint32_t)0x00004000)
#define	EXTI_IMR_MR15 ((uint32_t)0x00008000)
#define	EXTI_IMR_MR16 ((uint32_t)0x00010000)
#define	EXTI_IMR_MR17 ((uint32_t)0x00020000)
#define	EXTI_IMR_MR18 ((uint32_t)0x00040000)
#define	EXTI_IMR_MR19 ((uint32_t)0x00080000)
#define	EXTI_IMR_MR20 ((uint32_t)0x00100000)
#define	EXTI_IMR_MR21 ((uint32_t)0x00200000)
#define	EXTI_IMR_MR22 ((uint32_t)0x00400000)
#define	EXTI_IMR_MR23 ((uint32_t)0x00800000)
#define	EXTI_EMR_MR0 ((uint32_t)0x00000001)
#define	EXTI_EMR_MR1 ((uint32_t)0x00000002)
#define	EXTI_EMR_MR2 ((uint32_t)0x00000004)
#define	EXTI_EMR_MR3 ((uint32_t)0x00000008)
#define	EXTI_EMR_MR4 ((uint32_t)0x00000010)
#define	EXTI_EMR_MR5 ((uint32_t)0x00000020)
#define	EXTI_EMR_MR6 ((uint32_t)0x00000040)
#define	EXTI_EMR_MR7 ((uint32_t)0x00000080)
#define	EXTI_EMR_MR8 ((uint32_t)0x00000100)
#define	EXTI_EMR_MR9 ((uint32_t)0x00000200)
#define	EXTI_EMR_MR10 ((uint32_t)0x00000400)
#define	EXTI_EMR_MR11 ((uint32_t)0x00000800)
#define	EXTI_EMR_MR12 ((uint32_t)0x00001000)
#define	EXTI_EMR_MR13 ((uint32_t)0x00002000)
#define	EXTI_EMR_MR14 ((uint32_t)0x00004000)
#define	EXTI_EMR_MR15 ((uint32_t)0x00008000)
#define	EXTI_EMR_MR16 ((uint32_t)0x00010000)
#define	EXTI_EMR_MR17 ((uint32_t)0x00020000)
#define	EXTI_EMR_MR18 ((uint32_t)0x00040000)
#define	EXTI_EMR_MR19 ((uint32_t)0x00080000)
#define	EXTI_EMR_MR20 ((uint32_t)0x00100000)
#define	EXTI_EMR_MR21 ((uint32_t)0x00200000)
#define	EXTI_EMR_MR22 ((uint32_t)0x00400000)
#define	EXTI_EMR_MR23 ((uint32_t)0x00800000)
#define	EXTI_RTSR_TR0 ((uint32_t)0x00000001)
#define	EXTI_RTSR_TR1 ((uint32_t)0x00000002)
#define	EXTI_RTSR_TR2 ((uint32_t)0x00000004)
#define	EXTI_RTSR_TR3 ((uint32_t)0x00000008)
#define	EXTI_RTSR_TR4 ((uint32_t)0x00000010)
#define	EXTI_RTSR_TR5 ((uint32_t)0x00000020)
#define	EXTI_RTSR_TR6 ((uint32_t)0x00000040)
#define	EXTI_RTSR_TR7 ((uint32_t)0x00000080)
#define	EXTI_RTSR_TR8 ((uint32_t)0x00000100)
#define	EXTI_RTSR_TR9 ((uint32_t)0x00000200)
#define	EXTI_RTSR_TR10 ((uint32_t)0x00000400)
#define	EXTI_RTSR_TR11 ((uint32_t)0x00000800)
#define	EXTI_RTSR_TR12 ((uint32_t)0x00001000)
#define	EXTI_RTSR_TR13 ((uint32_t)0x00002000)
#define	EXTI_RTSR_TR14 ((uint32_t)0x00004000)
#define	EXTI_RTSR_TR15 ((uint32_t)0x00008000)
#define	EXTI_RTSR_TR16 ((uint32_t)0x00010000)
#define	EXTI_RTSR_TR17 ((uint32_t)0x00020000)
#define	EXTI_RTSR_TR18 ((uint32_t)0x00040000)
#define	EXTI_RTSR_TR19 ((uint32_t)0x00080000)
#define	EXTI_RTSR_TR20 ((uint32_t)0x00100000)
#define	EXTI_RTSR_TR21 ((uint32_t)0x00200000)
#define	EXTI_RTSR_TR22 ((uint32_t)0x00400000)
#define	EXTI_RTSR_TR23 ((uint32_t)0x00800000)
#define	EXTI_FTSR_TR0 ((uint32_t)0x00000001)
#define	EXTI_FTSR_TR1 ((uint32_t)0x00000002)
#define	EXTI_FTSR_TR2 ((uint32_t)0x00000004)
#define	EXTI_FTSR_TR3 ((uint32_t)0x00000008)
#define	EXTI_FTSR_TR4 ((uint32_t)0x00000010)
#define	EXTI_FTSR_TR5 ((uint32_t)0x00000020)
#define	EXTI_FTSR_TR6 ((uint32_t)0x00000040)
#define	EXTI_FTSR_TR7 ((uint32_t)0x00000080)
#define	EXTI_FTSR_TR8 ((uint32_t)0x00000100)
#define	EXTI_FTSR_TR9 ((uint32_t)0x00000200)
#define	EXTI_FTSR_TR10 ((uint32_t)0x00000400)
#define	EXTI_FTSR_TR11 ((uint32_t)0x00000800)
#define	EXTI_FTSR_TR12 ((uint32_t)0x00001000)
#define	EXTI_FTSR_TR13 ((uint32_t)0x00002000)
#define	EXTI_FTSR_TR14 ((uint32_t)0x00004000)
#define	EXTI_FTSR_TR15 ((uint32_t)0x00008000)
#define	EXTI_FTSR_TR16 ((uint32_t)0x00010000)
#define	EXTI_FTSR_TR17 ((uint32_t)0x00020000)
#define	EXTI_FTSR_TR18 ((uint32_t)0x00040000)
#define	EXTI_FTSR_TR19 ((uint32_t)0x00080000)
#define	EXTI_FTSR_TR20 ((uint32_t)0x00100000)
#define	EXTI_FTSR_TR21 ((uint32_t)0x00200000)
#define	EXTI_FTSR_TR22 ((uint32_t)0x00400000)
#define	EXTI_FTSR_TR23 ((uint32_t)0x00800000)
#define	EXTI_SWIER_SWIER0 ((uint32_t)0x00000001)
#define	EXTI_SWIER_SWIER1 ((uint32_t)0x00000002)
#define	EXTI_SWIER_SWIER2 ((uint32_t)0x00000004)
#define	EXTI_SWIER_SWIER3 ((uint32_t)0x00000008)
#define	EXTI_SWIER_SWIER4 ((uint32_t)0x00000010)
#define	EXTI_SWIER_SWIER5 ((uint32_t)0x00000020)
#define	EXTI_SWIER_SWIER6 ((uint32_t)0x00000040)
#define	EXTI_SWIER_SWIER7 ((uint32_t)0x00000080)
#define	EXTI_SWIER_SWIER8 ((uint32_t)0x00000100)
#define	EXTI_SWIER_SWIER9 ((uint32_t)0x00000200)
#define	EXTI_SWIER_SWIER10 ((uint32_t)0x00000400)
#define	EXTI_SWIER_SWIER11 ((uint32_t)0x00000800)
#define	EXTI_SWIER_SWIER12 ((uint32_t)0x00001000)
#define	EXTI_SWIER_SWIER13 ((uint32_t)0x00002000)
#define	EXTI_SWIER_SWIER14 ((uint32_t)0x00004000)
#define	EXTI_SWIER_SWIER15 ((uint32_t)0x00008000)
#define	EXTI_SWIER_SWIER16 ((uint32_t)0x00010000)
#define	EXTI_SWIER_SWIER17 ((uint32_t)0x00020000)
#define	EXTI_SWIER_SWIER18 ((uint32_t)0x00040000)
#define	EXTI_SWIER_SWIER19 ((uint32_t)0x00080000)
#define	EXTI_SWIER_SWIER20 ((uint32_t)0x00100000)
#define	EXTI_SWIER_SWIER21 ((uint32_t)0x00200000)
#define	EXTI_SWIER_SWIER22 ((uint32_t)0x00400000)
#define	EXTI_SWIER_SWIER23 ((uint32_t)0x00800000)
#define	EXTI_PR_PR0 ((uint32_t)0x00000001)
#define	EXTI_PR_PR1 ((uint32_t)0x00000002)
#define	EXTI_PR_PR2 ((uint32_t)0x00000004)
#define	EXTI_PR_PR3 ((uint32_t)0x00000008)
#define	EXTI_PR_PR4 ((uint32_t)0x00000010)
#define	EXTI_PR_PR5 ((uint32_t)0x00000020)
#define	EXTI_PR_PR6 ((uint32_t)0x00000040)
#define	EXTI_PR_PR7 ((uint32_t)0x00000080)
#define	EXTI_PR_PR8 ((uint32_t)0x00000100)
#define	EXTI_PR_PR9 ((uint32_t)0x00000200)
#define	EXTI_PR_PR10 ((uint32_t)0x00000400)
#define	EXTI_PR_PR11 ((uint32_t)0x00000800)
#define	EXTI_PR_PR12 ((uint32_t)0x00001000)
#define	EXTI_PR_PR13 ((uint32_t)0x00002000)
#define	EXTI_PR_PR14 ((uint32_t)0x00004000)
#define	EXTI_PR_PR15 ((uint32_t)0x00008000)
#define	EXTI_PR_PR16 ((uint32_t)0x00010000)
#define	EXTI_PR_PR17 ((uint32_t)0x00020000)
#define	EXTI_PR_PR18 ((uint32_t)0x00040000)
#define	EXTI_PR_PR19 ((uint32_t)0x00080000)
#define	EXTI_PR_PR20 ((uint32_t)0x00100000)
#define	EXTI_PR_PR21 ((uint32_t)0x00200000)
#define	EXTI_PR_PR22 ((uint32_t)0x00400000)
#define	EXTI_PR_PR23 ((uint32_t)0x00800000)
#define	FLASH_ACR_LATENCY ((uint32_t)0x00000001)
#define	FLASH_ACR_PRFTEN ((uint32_t)0x00000002)
#define	FLASH_ACR_ACC64 ((uint32_t)0x00000004)
#define	FLASH_ACR_SLEEP_PD ((uint32_t)0x00000008)
#define	FLASH_ACR_RUN_PD ((uint32_t)0x00000010)
#define	FLASH_PECR_PELOCK ((uint32_t)0x00000001)
#define	FLASH_PECR_PRGLOCK ((uint32_t)0x00000002)
#define	FLASH_PECR_OPTLOCK ((uint32_t)0x00000004)
#define	FLASH_PECR_PROG ((uint32_t)0x00000008)
#define	FLASH_PECR_DATA ((uint32_t)0x00000010)
#define	FLASH_PECR_FTDW ((uint32_t)0x00000100)
#define	FLASH_PECR_ERASE ((uint32_t)0x00000200)
#define	FLASH_PECR_FPRG ((uint32_t)0x00000400)
#define	FLASH_PECR_PARALLBANK ((uint32_t)0x00008000)
#define	FLASH_PECR_EOPIE ((uint32_t)0x00010000)
#define	FLASH_PECR_ERRIE ((uint32_t)0x00020000)
#define	FLASH_PECR_OBL_LAUNCH ((uint32_t)0x00040000)
#define	FLASH_PDKEYR_PDKEYR ((uint32_t)0xFFFFFFFF)
#define	FLASH_PEKEYR_PEKEYR ((uint32_t)0xFFFFFFFF)
#define	FLASH_PRGKEYR_PRGKEYR ((uint32_t)0xFFFFFFFF)
#define	FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF)
#define	FLASH_SR_BSY ((uint32_t)0x00000001)
#define	FLASH_SR_EOP ((uint32_t)0x00000002)
#define	FLASH_SR_ENHV ((uint32_t)0x00000004)
#define	FLASH_SR_READY ((uint32_t)0x00000008)
#define	FLASH_SR_WRPERR ((uint32_t)0x00000100)
#define	FLASH_SR_PGAERR ((uint32_t)0x00000200)
#define	FLASH_SR_SIZERR ((uint32_t)0x00000400)
#define	FLASH_SR_OPTVERR ((uint32_t)0x00000800)
#define	FLASH_SR_OPTVERRUSR ((uint32_t)0x00001000)
#define	FLASH_OBR_RDPRT ((uint16_t)0x000000AA)
#define	FLASH_OBR_BOR_LEV ((uint16_t)0x000F0000)
#define	FLASH_OBR_USER ((uint32_t)0x00700000)
#define	FLASH_OBR_IWDG_SW ((uint32_t)0x00100000)
#define	FLASH_OBR_nRST_STOP ((uint32_t)0x00200000)
#define	FLASH_OBR_nRST_STDBY ((uint32_t)0x00400000)
#define	FLASH_OBR_nRST_BFB2 ((uint32_t)0x00800000)
#define	FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF)
#define	FLASH_WRPR1_WRP ((uint32_t)0xFFFFFFFF)
#define	FLASH_WRPR2_WRP ((uint32_t)0xFFFFFFFF)
#define	FSMC_BCR1_MBKEN ((uint32_t)0x00000001)
#define	FSMC_BCR1_MUXEN ((uint32_t)0x00000002)
#define	FSMC_BCR1_MTYP ((uint32_t)0x0000000C)
#define	FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004)
#define	FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008)
#define	FSMC_BCR1_MWID ((uint32_t)0x00000030)
#define	FSMC_BCR1_MWID_0 ((uint32_t)0x00000010)
#define	FSMC_BCR1_MWID_1 ((uint32_t)0x00000020)
#define	FSMC_BCR1_FACCEN ((uint32_t)0x00000040)
#define	FSMC_BCR1_BURSTEN ((uint32_t)0x00000100)
#define	FSMC_BCR1_WAITPOL ((uint32_t)0x00000200)
#define	FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400)
#define	FSMC_BCR1_WAITCFG ((uint32_t)0x00000800)
#define	FSMC_BCR1_WREN ((uint32_t)0x00001000)
#define	FSMC_BCR1_WAITEN ((uint32_t)0x00002000)
#define	FSMC_BCR1_EXTMOD ((uint32_t)0x00004000)
#define	FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000)
#define	FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000)
#define	FSMC_BCR2_MBKEN ((uint32_t)0x00000001)
#define	FSMC_BCR2_MUXEN ((uint32_t)0x00000002)
#define	FSMC_BCR2_MTYP ((uint32_t)0x0000000C)
#define	FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004)
#define	FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008)
#define	FSMC_BCR2_MWID ((uint32_t)0x00000030)
#define	FSMC_BCR2_MWID_0 ((uint32_t)0x00000010)
#define	FSMC_BCR2_MWID_1 ((uint32_t)0x00000020)
#define	FSMC_BCR2_FACCEN ((uint32_t)0x00000040)
#define	FSMC_BCR2_BURSTEN ((uint32_t)0x00000100)
#define	FSMC_BCR2_WAITPOL ((uint32_t)0x00000200)
#define	FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400)
#define	FSMC_BCR2_WAITCFG ((uint32_t)0x00000800)
#define	FSMC_BCR2_WREN ((uint32_t)0x00001000)
#define	FSMC_BCR2_WAITEN ((uint32_t)0x00002000)
#define	FSMC_BCR2_EXTMOD ((uint32_t)0x00004000)
#define	FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000)
#define	FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000)
#define	FSMC_BCR3_MBKEN ((uint32_t)0x00000001)
#define	FSMC_BCR3_MUXEN ((uint32_t)0x00000002)
#define	FSMC_BCR3_MTYP ((uint32_t)0x0000000C)
#define	FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004)
#define	FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008)
#define	FSMC_BCR3_MWID ((uint32_t)0x00000030)
#define	FSMC_BCR3_MWID_0 ((uint32_t)0x00000010)
#define	FSMC_BCR3_MWID_1 ((uint32_t)0x00000020)
#define	FSMC_BCR3_FACCEN ((uint32_t)0x00000040)
#define	FSMC_BCR3_BURSTEN ((uint32_t)0x00000100)
#define	FSMC_BCR3_WAITPOL ((uint32_t)0x00000200)
#define	FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400)
#define	FSMC_BCR3_WAITCFG ((uint32_t)0x00000800)
#define	FSMC_BCR3_WREN ((uint32_t)0x00001000)
#define	FSMC_BCR3_WAITEN ((uint32_t)0x00002000)
#define	FSMC_BCR3_EXTMOD ((uint32_t)0x00004000)
#define	FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000)
#define	FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000)
#define	FSMC_BCR4_MBKEN ((uint32_t)0x00000001)
#define	FSMC_BCR4_MUXEN ((uint32_t)0x00000002)
#define	FSMC_BCR4_MTYP ((uint32_t)0x0000000C)
#define	FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004)
#define	FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008)
#define	FSMC_BCR4_MWID ((uint32_t)0x00000030)
#define	FSMC_BCR4_MWID_0 ((uint32_t)0x00000010)
#define	FSMC_BCR4_MWID_1 ((uint32_t)0x00000020)
#define	FSMC_BCR4_FACCEN ((uint32_t)0x00000040)
#define	FSMC_BCR4_BURSTEN ((uint32_t)0x00000100)
#define	FSMC_BCR4_WAITPOL ((uint32_t)0x00000200)
#define	FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400)
#define	FSMC_BCR4_WAITCFG ((uint32_t)0x00000800)
#define	FSMC_BCR4_WREN ((uint32_t)0x00001000)
#define	FSMC_BCR4_WAITEN ((uint32_t)0x00002000)
#define	FSMC_BCR4_EXTMOD ((uint32_t)0x00004000)
#define	FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000)
#define	FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000)
#define	FSMC_BTR1_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BTR1_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000)
#define	FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000)
#define	FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000)
#define	FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000)
#define	FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000)
#define	FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BTR1_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BTR1_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BTR2_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BTR2_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000)
#define	FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000)
#define	FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000)
#define	FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000)
#define	FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000)
#define	FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BTR2_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BTR2_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BTR3_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BTR3_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000)
#define	FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000)
#define	FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000)
#define	FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000)
#define	FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000)
#define	FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BTR3_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BTR3_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BTR4_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BTR4_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000)
#define	FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000)
#define	FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000)
#define	FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000)
#define	FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000)
#define	FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BTR4_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BTR4_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000)
#define	FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F)
#define	FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001)
#define	FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002)
#define	FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004)
#define	FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008)
#define	FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0)
#define	FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010)
#define	FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020)
#define	FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040)
#define	FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080)
#define	FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00)
#define	FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100)
#define	FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200)
#define	FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400)
#define	FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800)
#define	FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000)
#define	FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000)
#define	FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000)
#define	FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000)
#define	FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000)
#define	FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000)
#define	FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000)
#define	FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000)
#define	FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000)
#define	FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000)
#define	FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000)
#define	FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000)
#define	FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000)
#define	GPIO_MODER_MODER0 ((uint32_t)0x00000003)
#define	GPIO_MODER_MODER0_0 ((uint32_t)0x00000001)
#define	GPIO_MODER_MODER0_1 ((uint32_t)0x00000002)
#define	GPIO_MODER_MODER1 ((uint32_t)0x0000000C)
#define	GPIO_MODER_MODER1_0 ((uint32_t)0x00000004)
#define	GPIO_MODER_MODER1_1 ((uint32_t)0x00000008)
#define	GPIO_MODER_MODER2 ((uint32_t)0x00000030)
#define	GPIO_MODER_MODER2_0 ((uint32_t)0x00000010)
#define	GPIO_MODER_MODER2_1 ((uint32_t)0x00000020)
#define	GPIO_MODER_MODER3 ((uint32_t)0x000000C0)
#define	GPIO_MODER_MODER3_0 ((uint32_t)0x00000040)
#define	GPIO_MODER_MODER3_1 ((uint32_t)0x00000080)
#define	GPIO_MODER_MODER4 ((uint32_t)0x00000300)
#define	GPIO_MODER_MODER4_0 ((uint32_t)0x00000100)
#define	GPIO_MODER_MODER4_1 ((uint32_t)0x00000200)
#define	GPIO_MODER_MODER5 ((uint32_t)0x00000C00)
#define	GPIO_MODER_MODER5_0 ((uint32_t)0x00000400)
#define	GPIO_MODER_MODER5_1 ((uint32_t)0x00000800)
#define	GPIO_MODER_MODER6 ((uint32_t)0x00003000)
#define	GPIO_MODER_MODER6_0 ((uint32_t)0x00001000)
#define	GPIO_MODER_MODER6_1 ((uint32_t)0x00002000)
#define	GPIO_MODER_MODER7 ((uint32_t)0x0000C000)
#define	GPIO_MODER_MODER7_0 ((uint32_t)0x00004000)
#define	GPIO_MODER_MODER7_1 ((uint32_t)0x00008000)
#define	GPIO_MODER_MODER8 ((uint32_t)0x00030000)
#define	GPIO_MODER_MODER8_0 ((uint32_t)0x00010000)
#define	GPIO_MODER_MODER8_1 ((uint32_t)0x00020000)
#define	GPIO_MODER_MODER9 ((uint32_t)0x000C0000)
#define	GPIO_MODER_MODER9_0 ((uint32_t)0x00040000)
#define	GPIO_MODER_MODER9_1 ((uint32_t)0x00080000)
#define	GPIO_MODER_MODER10 ((uint32_t)0x00300000)
#define	GPIO_MODER_MODER10_0 ((uint32_t)0x00100000)
#define	GPIO_MODER_MODER10_1 ((uint32_t)0x00200000)
#define	GPIO_MODER_MODER11 ((uint32_t)0x00C00000)
#define	GPIO_MODER_MODER11_0 ((uint32_t)0x00400000)
#define	GPIO_MODER_MODER11_1 ((uint32_t)0x00800000)
#define	GPIO_MODER_MODER12 ((uint32_t)0x03000000)
#define	GPIO_MODER_MODER12_0 ((uint32_t)0x01000000)
#define	GPIO_MODER_MODER12_1 ((uint32_t)0x02000000)
#define	GPIO_MODER_MODER13 ((uint32_t)0x0C000000)
#define	GPIO_MODER_MODER13_0 ((uint32_t)0x04000000)
#define	GPIO_MODER_MODER13_1 ((uint32_t)0x08000000)
#define	GPIO_MODER_MODER14 ((uint32_t)0x30000000)
#define	GPIO_MODER_MODER14_0 ((uint32_t)0x10000000)
#define	GPIO_MODER_MODER14_1 ((uint32_t)0x20000000)
#define	GPIO_MODER_MODER15 ((uint32_t)0xC0000000)
#define	GPIO_MODER_MODER15_0 ((uint32_t)0x40000000)
#define	GPIO_MODER_MODER15_1 ((uint32_t)0x80000000)
#define	GPIO_OTYPER_OT_0 ((uint32_t)0x00000001)
#define	GPIO_OTYPER_OT_1 ((uint32_t)0x00000002)
#define	GPIO_OTYPER_OT_2 ((uint32_t)0x00000004)
#define	GPIO_OTYPER_OT_3 ((uint32_t)0x00000008)
#define	GPIO_OTYPER_OT_4 ((uint32_t)0x00000010)
#define	GPIO_OTYPER_OT_5 ((uint32_t)0x00000020)
#define	GPIO_OTYPER_OT_6 ((uint32_t)0x00000040)
#define	GPIO_OTYPER_OT_7 ((uint32_t)0x00000080)
#define	GPIO_OTYPER_OT_8 ((uint32_t)0x00000100)
#define	GPIO_OTYPER_OT_9 ((uint32_t)0x00000200)
#define	GPIO_OTYPER_OT_10 ((uint32_t)0x00000400)
#define	GPIO_OTYPER_OT_11 ((uint32_t)0x00000800)
#define	GPIO_OTYPER_OT_12 ((uint32_t)0x00001000)
#define	GPIO_OTYPER_OT_13 ((uint32_t)0x00002000)
#define	GPIO_OTYPER_OT_14 ((uint32_t)0x00004000)
#define	GPIO_OTYPER_OT_15 ((uint32_t)0x00008000)
#define	GPIO_OSPEEDER_OSPEEDR0 ((uint32_t)0x00000003)
#define	GPIO_OSPEEDER_OSPEEDR0_0 ((uint32_t)0x00000001)
#define	GPIO_OSPEEDER_OSPEEDR0_1 ((uint32_t)0x00000002)
#define	GPIO_OSPEEDER_OSPEEDR1 ((uint32_t)0x0000000C)
#define	GPIO_OSPEEDER_OSPEEDR1_0 ((uint32_t)0x00000004)
#define	GPIO_OSPEEDER_OSPEEDR1_1 ((uint32_t)0x00000008)
#define	GPIO_OSPEEDER_OSPEEDR2 ((uint32_t)0x00000030)
#define	GPIO_OSPEEDER_OSPEEDR2_0 ((uint32_t)0x00000010)
#define	GPIO_OSPEEDER_OSPEEDR2_1 ((uint32_t)0x00000020)
#define	GPIO_OSPEEDER_OSPEEDR3 ((uint32_t)0x000000C0)
#define	GPIO_OSPEEDER_OSPEEDR3_0 ((uint32_t)0x00000040)
#define	GPIO_OSPEEDER_OSPEEDR3_1 ((uint32_t)0x00000080)
#define	GPIO_OSPEEDER_OSPEEDR4 ((uint32_t)0x00000300)
#define	GPIO_OSPEEDER_OSPEEDR4_0 ((uint32_t)0x00000100)
#define	GPIO_OSPEEDER_OSPEEDR4_1 ((uint32_t)0x00000200)
#define	GPIO_OSPEEDER_OSPEEDR5 ((uint32_t)0x00000C00)
#define	GPIO_OSPEEDER_OSPEEDR5_0 ((uint32_t)0x00000400)
#define	GPIO_OSPEEDER_OSPEEDR5_1 ((uint32_t)0x00000800)
#define	GPIO_OSPEEDER_OSPEEDR6 ((uint32_t)0x00003000)
#define	GPIO_OSPEEDER_OSPEEDR6_0 ((uint32_t)0x00001000)
#define	GPIO_OSPEEDER_OSPEEDR6_1 ((uint32_t)0x00002000)
#define	GPIO_OSPEEDER_OSPEEDR7 ((uint32_t)0x0000C000)
#define	GPIO_OSPEEDER_OSPEEDR7_0 ((uint32_t)0x00004000)
#define	GPIO_OSPEEDER_OSPEEDR7_1 ((uint32_t)0x00008000)
#define	GPIO_OSPEEDER_OSPEEDR8 ((uint32_t)0x00030000)
#define	GPIO_OSPEEDER_OSPEEDR8_0 ((uint32_t)0x00010000)
#define	GPIO_OSPEEDER_OSPEEDR8_1 ((uint32_t)0x00020000)
#define	GPIO_OSPEEDER_OSPEEDR9 ((uint32_t)0x000C0000)
#define	GPIO_OSPEEDER_OSPEEDR9_0 ((uint32_t)0x00040000)
#define	GPIO_OSPEEDER_OSPEEDR9_1 ((uint32_t)0x00080000)
#define	GPIO_OSPEEDER_OSPEEDR10 ((uint32_t)0x00300000)
#define	GPIO_OSPEEDER_OSPEEDR10_0 ((uint32_t)0x00100000)
#define	GPIO_OSPEEDER_OSPEEDR10_1 ((uint32_t)0x00200000)
#define	GPIO_OSPEEDER_OSPEEDR11 ((uint32_t)0x00C00000)
#define	GPIO_OSPEEDER_OSPEEDR11_0 ((uint32_t)0x00400000)
#define	GPIO_OSPEEDER_OSPEEDR11_1 ((uint32_t)0x00800000)
#define	GPIO_OSPEEDER_OSPEEDR12 ((uint32_t)0x03000000)
#define	GPIO_OSPEEDER_OSPEEDR12_0 ((uint32_t)0x01000000)
#define	GPIO_OSPEEDER_OSPEEDR12_1 ((uint32_t)0x02000000)
#define	GPIO_OSPEEDER_OSPEEDR13 ((uint32_t)0x0C000000)
#define	GPIO_OSPEEDER_OSPEEDR13_0 ((uint32_t)0x04000000)
#define	GPIO_OSPEEDER_OSPEEDR13_1 ((uint32_t)0x08000000)
#define	GPIO_OSPEEDER_OSPEEDR14 ((uint32_t)0x30000000)
#define	GPIO_OSPEEDER_OSPEEDR14_0 ((uint32_t)0x10000000)
#define	GPIO_OSPEEDER_OSPEEDR14_1 ((uint32_t)0x20000000)
#define	GPIO_OSPEEDER_OSPEEDR15 ((uint32_t)0xC0000000)
#define	GPIO_OSPEEDER_OSPEEDR15_0 ((uint32_t)0x40000000)
#define	GPIO_OSPEEDER_OSPEEDR15_1 ((uint32_t)0x80000000)
#define	GPIO_PUPDR_PUPDR0 ((uint32_t)0x00000003)
#define	GPIO_PUPDR_PUPDR0_0 ((uint32_t)0x00000001)
#define	GPIO_PUPDR_PUPDR0_1 ((uint32_t)0x00000002)
#define	GPIO_PUPDR_PUPDR1 ((uint32_t)0x0000000C)
#define	GPIO_PUPDR_PUPDR1_0 ((uint32_t)0x00000004)
#define	GPIO_PUPDR_PUPDR1_1 ((uint32_t)0x00000008)
#define	GPIO_PUPDR_PUPDR2 ((uint32_t)0x00000030)
#define	GPIO_PUPDR_PUPDR2_0 ((uint32_t)0x00000010)
#define	GPIO_PUPDR_PUPDR2_1 ((uint32_t)0x00000020)
#define	GPIO_PUPDR_PUPDR3 ((uint32_t)0x000000C0)
#define	GPIO_PUPDR_PUPDR3_0 ((uint32_t)0x00000040)
#define	GPIO_PUPDR_PUPDR3_1 ((uint32_t)0x00000080)
#define	GPIO_PUPDR_PUPDR4 ((uint32_t)0x00000300)
#define	GPIO_PUPDR_PUPDR4_0 ((uint32_t)0x00000100)
#define	GPIO_PUPDR_PUPDR4_1 ((uint32_t)0x00000200)
#define	GPIO_PUPDR_PUPDR5 ((uint32_t)0x00000C00)
#define	GPIO_PUPDR_PUPDR5_0 ((uint32_t)0x00000400)
#define	GPIO_PUPDR_PUPDR5_1 ((uint32_t)0x00000800)
#define	GPIO_PUPDR_PUPDR6 ((uint32_t)0x00003000)
#define	GPIO_PUPDR_PUPDR6_0 ((uint32_t)0x00001000)
#define	GPIO_PUPDR_PUPDR6_1 ((uint32_t)0x00002000)
#define	GPIO_PUPDR_PUPDR7 ((uint32_t)0x0000C000)
#define	GPIO_PUPDR_PUPDR7_0 ((uint32_t)0x00004000)
#define	GPIO_PUPDR_PUPDR7_1 ((uint32_t)0x00008000)
#define	GPIO_PUPDR_PUPDR8 ((uint32_t)0x00030000)
#define	GPIO_PUPDR_PUPDR8_0 ((uint32_t)0x00010000)
#define	GPIO_PUPDR_PUPDR8_1 ((uint32_t)0x00020000)
#define	GPIO_PUPDR_PUPDR9 ((uint32_t)0x000C0000)
#define	GPIO_PUPDR_PUPDR9_0 ((uint32_t)0x00040000)
#define	GPIO_PUPDR_PUPDR9_1 ((uint32_t)0x00080000)
#define	GPIO_PUPDR_PUPDR10 ((uint32_t)0x00300000)
#define	GPIO_PUPDR_PUPDR10_0 ((uint32_t)0x00100000)
#define	GPIO_PUPDR_PUPDR10_1 ((uint32_t)0x00200000)
#define	GPIO_PUPDR_PUPDR11 ((uint32_t)0x00C00000)
#define	GPIO_PUPDR_PUPDR11_0 ((uint32_t)0x00400000)
#define	GPIO_PUPDR_PUPDR11_1 ((uint32_t)0x00800000)
#define	GPIO_PUPDR_PUPDR12 ((uint32_t)0x03000000)
#define	GPIO_PUPDR_PUPDR12_0 ((uint32_t)0x01000000)
#define	GPIO_PUPDR_PUPDR12_1 ((uint32_t)0x02000000)
#define	GPIO_PUPDR_PUPDR13 ((uint32_t)0x0C000000)
#define	GPIO_PUPDR_PUPDR13_0 ((uint32_t)0x04000000)
#define	GPIO_PUPDR_PUPDR13_1 ((uint32_t)0x08000000)
#define	GPIO_PUPDR_PUPDR14 ((uint32_t)0x30000000)
#define	GPIO_PUPDR_PUPDR14_0 ((uint32_t)0x10000000)
#define	GPIO_PUPDR_PUPDR14_1 ((uint32_t)0x20000000)
#define	GPIO_PUPDR_PUPDR15 ((uint32_t)0xC0000000)
#define	GPIO_PUPDR_PUPDR15_0 ((uint32_t)0x40000000)
#define	GPIO_PUPDR_PUPDR15_1 ((uint32_t)0x80000000)
#define	GPIO_IDR_IDR_0 ((uint32_t)0x00000001)
#define	GPIO_IDR_IDR_1 ((uint32_t)0x00000002)
#define	GPIO_IDR_IDR_2 ((uint32_t)0x00000004)
#define	GPIO_IDR_IDR_3 ((uint32_t)0x00000008)
#define	GPIO_IDR_IDR_4 ((uint32_t)0x00000010)
#define	GPIO_IDR_IDR_5 ((uint32_t)0x00000020)
#define	GPIO_IDR_IDR_6 ((uint32_t)0x00000040)
#define	GPIO_IDR_IDR_7 ((uint32_t)0x00000080)
#define	GPIO_IDR_IDR_8 ((uint32_t)0x00000100)
#define	GPIO_IDR_IDR_9 ((uint32_t)0x00000200)
#define	GPIO_IDR_IDR_10 ((uint32_t)0x00000400)
#define	GPIO_IDR_IDR_11 ((uint32_t)0x00000800)
#define	GPIO_IDR_IDR_12 ((uint32_t)0x00001000)
#define	GPIO_IDR_IDR_13 ((uint32_t)0x00002000)
#define	GPIO_IDR_IDR_14 ((uint32_t)0x00004000)
#define	GPIO_IDR_IDR_15 ((uint32_t)0x00008000)
#define	GPIO_OTYPER_IDR_0 GPIO_IDR_IDR_0
#define	GPIO_OTYPER_IDR_1 GPIO_IDR_IDR_1
#define	GPIO_OTYPER_IDR_2 GPIO_IDR_IDR_2
#define	GPIO_OTYPER_IDR_3 GPIO_IDR_IDR_3
#define	GPIO_OTYPER_IDR_4 GPIO_IDR_IDR_4
#define	GPIO_OTYPER_IDR_5 GPIO_IDR_IDR_5
#define	GPIO_OTYPER_IDR_6 GPIO_IDR_IDR_6
#define	GPIO_OTYPER_IDR_7 GPIO_IDR_IDR_7
#define	GPIO_OTYPER_IDR_8 GPIO_IDR_IDR_8
#define	GPIO_OTYPER_IDR_9 GPIO_IDR_IDR_9
#define	GPIO_OTYPER_IDR_10 GPIO_IDR_IDR_10
#define	GPIO_OTYPER_IDR_11 GPIO_IDR_IDR_11
#define	GPIO_OTYPER_IDR_12 GPIO_IDR_IDR_12
#define	GPIO_OTYPER_IDR_13 GPIO_IDR_IDR_13
#define	GPIO_OTYPER_IDR_14 GPIO_IDR_IDR_14
#define	GPIO_OTYPER_IDR_15 GPIO_IDR_IDR_15
#define	GPIO_ODR_ODR_0 ((uint32_t)0x00000001)
#define	GPIO_ODR_ODR_1 ((uint32_t)0x00000002)
#define	GPIO_ODR_ODR_2 ((uint32_t)0x00000004)
#define	GPIO_ODR_ODR_3 ((uint32_t)0x00000008)
#define	GPIO_ODR_ODR_4 ((uint32_t)0x00000010)
#define	GPIO_ODR_ODR_5 ((uint32_t)0x00000020)
#define	GPIO_ODR_ODR_6 ((uint32_t)0x00000040)
#define	GPIO_ODR_ODR_7 ((uint32_t)0x00000080)
#define	GPIO_ODR_ODR_8 ((uint32_t)0x00000100)
#define	GPIO_ODR_ODR_9 ((uint32_t)0x00000200)
#define	GPIO_ODR_ODR_10 ((uint32_t)0x00000400)
#define	GPIO_ODR_ODR_11 ((uint32_t)0x00000800)
#define	GPIO_ODR_ODR_12 ((uint32_t)0x00001000)
#define	GPIO_ODR_ODR_13 ((uint32_t)0x00002000)
#define	GPIO_ODR_ODR_14 ((uint32_t)0x00004000)
#define	GPIO_ODR_ODR_15 ((uint32_t)0x00008000)
#define	GPIO_OTYPER_ODR_0 GPIO_ODR_ODR_0
#define	GPIO_OTYPER_ODR_1 GPIO_ODR_ODR_1
#define	GPIO_OTYPER_ODR_2 GPIO_ODR_ODR_2
#define	GPIO_OTYPER_ODR_3 GPIO_ODR_ODR_3
#define	GPIO_OTYPER_ODR_4 GPIO_ODR_ODR_4
#define	GPIO_OTYPER_ODR_5 GPIO_ODR_ODR_5
#define	GPIO_OTYPER_ODR_6 GPIO_ODR_ODR_6
#define	GPIO_OTYPER_ODR_7 GPIO_ODR_ODR_7
#define	GPIO_OTYPER_ODR_8 GPIO_ODR_ODR_8
#define	GPIO_OTYPER_ODR_9 GPIO_ODR_ODR_9
#define	GPIO_OTYPER_ODR_10 GPIO_ODR_ODR_10
#define	GPIO_OTYPER_ODR_11 GPIO_ODR_ODR_11
#define	GPIO_OTYPER_ODR_12 GPIO_ODR_ODR_12
#define	GPIO_OTYPER_ODR_13 GPIO_ODR_ODR_13
#define	GPIO_OTYPER_ODR_14 GPIO_ODR_ODR_14
#define	GPIO_OTYPER_ODR_15 GPIO_ODR_ODR_15
#define	GPIO_BSRR_BS_0 ((uint32_t)0x00000001)
#define	GPIO_BSRR_BS_1 ((uint32_t)0x00000002)
#define	GPIO_BSRR_BS_2 ((uint32_t)0x00000004)
#define	GPIO_BSRR_BS_3 ((uint32_t)0x00000008)
#define	GPIO_BSRR_BS_4 ((uint32_t)0x00000010)
#define	GPIO_BSRR_BS_5 ((uint32_t)0x00000020)
#define	GPIO_BSRR_BS_6 ((uint32_t)0x00000040)
#define	GPIO_BSRR_BS_7 ((uint32_t)0x00000080)
#define	GPIO_BSRR_BS_8 ((uint32_t)0x00000100)
#define	GPIO_BSRR_BS_9 ((uint32_t)0x00000200)
#define	GPIO_BSRR_BS_10 ((uint32_t)0x00000400)
#define	GPIO_BSRR_BS_11 ((uint32_t)0x00000800)
#define	GPIO_BSRR_BS_12 ((uint32_t)0x00001000)
#define	GPIO_BSRR_BS_13 ((uint32_t)0x00002000)
#define	GPIO_BSRR_BS_14 ((uint32_t)0x00004000)
#define	GPIO_BSRR_BS_15 ((uint32_t)0x00008000)
#define	GPIO_BSRR_BR_0 ((uint32_t)0x00010000)
#define	GPIO_BSRR_BR_1 ((uint32_t)0x00020000)
#define	GPIO_BSRR_BR_2 ((uint32_t)0x00040000)
#define	GPIO_BSRR_BR_3 ((uint32_t)0x00080000)
#define	GPIO_BSRR_BR_4 ((uint32_t)0x00100000)
#define	GPIO_BSRR_BR_5 ((uint32_t)0x00200000)
#define	GPIO_BSRR_BR_6 ((uint32_t)0x00400000)
#define	GPIO_BSRR_BR_7 ((uint32_t)0x00800000)
#define	GPIO_BSRR_BR_8 ((uint32_t)0x01000000)
#define	GPIO_BSRR_BR_9 ((uint32_t)0x02000000)
#define	GPIO_BSRR_BR_10 ((uint32_t)0x04000000)
#define	GPIO_BSRR_BR_11 ((uint32_t)0x08000000)
#define	GPIO_BSRR_BR_12 ((uint32_t)0x10000000)
#define	GPIO_BSRR_BR_13 ((uint32_t)0x20000000)
#define	GPIO_BSRR_BR_14 ((uint32_t)0x40000000)
#define	GPIO_BSRR_BR_15 ((uint32_t)0x80000000)
#define	GPIO_LCKR_LCK0 ((uint32_t)0x00000001)
#define	GPIO_LCKR_LCK1 ((uint32_t)0x00000002)
#define	GPIO_LCKR_LCK2 ((uint32_t)0x00000004)
#define	GPIO_LCKR_LCK3 ((uint32_t)0x00000008)
#define	GPIO_LCKR_LCK4 ((uint32_t)0x00000010)
#define	GPIO_LCKR_LCK5 ((uint32_t)0x00000020)
#define	GPIO_LCKR_LCK6 ((uint32_t)0x00000040)
#define	GPIO_LCKR_LCK7 ((uint32_t)0x00000080)
#define	GPIO_LCKR_LCK8 ((uint32_t)0x00000100)
#define	GPIO_LCKR_LCK9 ((uint32_t)0x00000200)
#define	GPIO_LCKR_LCK10 ((uint32_t)0x00000400)
#define	GPIO_LCKR_LCK11 ((uint32_t)0x00000800)
#define	GPIO_LCKR_LCK12 ((uint32_t)0x00001000)
#define	GPIO_LCKR_LCK13 ((uint32_t)0x00002000)
#define	GPIO_LCKR_LCK14 ((uint32_t)0x00004000)
#define	GPIO_LCKR_LCK15 ((uint32_t)0x00008000)
#define	GPIO_LCKR_LCKK ((uint32_t)0x00010000)
#define	GPIO_AFRL_AFRL0 ((uint32_t)0x0000000F)
#define	GPIO_AFRL_AFRL1 ((uint32_t)0x000000F0)
#define	GPIO_AFRL_AFRL2 ((uint32_t)0x00000F00)
#define	GPIO_AFRL_AFRL3 ((uint32_t)0x0000F000)
#define	GPIO_AFRL_AFRL4 ((uint32_t)0x000F0000)
#define	GPIO_AFRL_AFRL5 ((uint32_t)0x00F00000)
#define	GPIO_AFRL_AFRL6 ((uint32_t)0x0F000000)
#define	GPIO_AFRL_AFRL7 ((uint32_t)0xF0000000)
#define	GPIO_AFRH_AFRH8 ((uint32_t)0x0000000F)
#define	GPIO_AFRH_AFRH9 ((uint32_t)0x000000F0)
#define	GPIO_AFRH_AFRH10 ((uint32_t)0x00000F00)
#define	GPIO_AFRH_AFRH11 ((uint32_t)0x0000F000)
#define	GPIO_AFRH_AFRH12 ((uint32_t)0x000F0000)
#define	GPIO_AFRH_AFRH13 ((uint32_t)0x00F00000)
#define	GPIO_AFRH_AFRH14 ((uint32_t)0x0F000000)
#define	GPIO_AFRH_AFRH15 ((uint32_t)0xF0000000)
#define	I2C_CR1_PE ((uint16_t)0x0001)
#define	I2C_CR1_SMBUS ((uint16_t)0x0002)
#define	I2C_CR1_SMBTYPE ((uint16_t)0x0008)
#define	I2C_CR1_ENARP ((uint16_t)0x0010)
#define	I2C_CR1_ENPEC ((uint16_t)0x0020)
#define	I2C_CR1_ENGC ((uint16_t)0x0040)
#define	I2C_CR1_NOSTRETCH ((uint16_t)0x0080)
#define	I2C_CR1_START ((uint16_t)0x0100)
#define	I2C_CR1_STOP ((uint16_t)0x0200)
#define	I2C_CR1_ACK ((uint16_t)0x0400)
#define	I2C_CR1_POS ((uint16_t)0x0800)
#define	I2C_CR1_PEC ((uint16_t)0x1000)
#define	I2C_CR1_ALERT ((uint16_t)0x2000)
#define	I2C_CR1_SWRST ((uint16_t)0x8000)
#define	I2C_CR2_FREQ ((uint16_t)0x003F)
#define	I2C_CR2_FREQ_0 ((uint16_t)0x0001)
#define	I2C_CR2_FREQ_1 ((uint16_t)0x0002)
#define	I2C_CR2_FREQ_2 ((uint16_t)0x0004)
#define	I2C_CR2_FREQ_3 ((uint16_t)0x0008)
#define	I2C_CR2_FREQ_4 ((uint16_t)0x0010)
#define	I2C_CR2_FREQ_5 ((uint16_t)0x0020)
#define	I2C_CR2_ITERREN ((uint16_t)0x0100)
#define	I2C_CR2_ITEVTEN ((uint16_t)0x0200)
#define	I2C_CR2_ITBUFEN ((uint16_t)0x0400)
#define	I2C_CR2_DMAEN ((uint16_t)0x0800)
#define	I2C_CR2_LAST ((uint16_t)0x1000)
#define	I2C_OAR1_ADD1_7 ((uint16_t)0x00FE)
#define	I2C_OAR1_ADD8_9 ((uint16_t)0x0300)
#define	I2C_OAR1_ADD0 ((uint16_t)0x0001)
#define	I2C_OAR1_ADD1 ((uint16_t)0x0002)
#define	I2C_OAR1_ADD2 ((uint16_t)0x0004)
#define	I2C_OAR1_ADD3 ((uint16_t)0x0008)
#define	I2C_OAR1_ADD4 ((uint16_t)0x0010)
#define	I2C_OAR1_ADD5 ((uint16_t)0x0020)
#define	I2C_OAR1_ADD6 ((uint16_t)0x0040)
#define	I2C_OAR1_ADD7 ((uint16_t)0x0080)
#define	I2C_OAR1_ADD8 ((uint16_t)0x0100)
#define	I2C_OAR1_ADD9 ((uint16_t)0x0200)
#define	I2C_OAR1_ADDMODE ((uint16_t)0x8000)
#define	I2C_OAR2_ENDUAL ((uint8_t)0x01)
#define	I2C_OAR2_ADD2 ((uint8_t)0xFE)
#define	I2C_DR_DR ((uint8_t)0xFF)
#define	I2C_SR1_SB ((uint16_t)0x0001)
#define	I2C_SR1_ADDR ((uint16_t)0x0002)
#define	I2C_SR1_BTF ((uint16_t)0x0004)
#define	I2C_SR1_ADD10 ((uint16_t)0x0008)
#define	I2C_SR1_STOPF ((uint16_t)0x0010)
#define	I2C_SR1_RXNE ((uint16_t)0x0040)
#define	I2C_SR1_TXE ((uint16_t)0x0080)
#define	I2C_SR1_BERR ((uint16_t)0x0100)
#define	I2C_SR1_ARLO ((uint16_t)0x0200)
#define	I2C_SR1_AF ((uint16_t)0x0400)
#define	I2C_SR1_OVR ((uint16_t)0x0800)
#define	I2C_SR1_PECERR ((uint16_t)0x1000)
#define	I2C_SR1_TIMEOUT ((uint16_t)0x4000)
#define	I2C_SR1_SMBALERT ((uint16_t)0x8000)
#define	I2C_SR2_MSL ((uint16_t)0x0001)
#define	I2C_SR2_BUSY ((uint16_t)0x0002)
#define	I2C_SR2_TRA ((uint16_t)0x0004)
#define	I2C_SR2_GENCALL ((uint16_t)0x0010)
#define	I2C_SR2_SMBDEFAULT ((uint16_t)0x0020)
#define	I2C_SR2_SMBHOST ((uint16_t)0x0040)
#define	I2C_SR2_DUALF ((uint16_t)0x0080)
#define	I2C_SR2_PEC ((uint16_t)0xFF00)
#define	I2C_CCR_CCR ((uint16_t)0x0FFF)
#define	I2C_CCR_DUTY ((uint16_t)0x4000)
#define	I2C_CCR_FS ((uint16_t)0x8000)
#define	I2C_TRISE_TRISE ((uint8_t)0x3F)
#define	IWDG_KR_KEY ((uint16_t)0xFFFF)
#define	IWDG_PR_PR ((uint8_t)0x07)
#define	IWDG_PR_PR_0 ((uint8_t)0x01)
#define	IWDG_PR_PR_1 ((uint8_t)0x02)
#define	IWDG_PR_PR_2 ((uint8_t)0x04)
#define	IWDG_RLR_RL ((uint16_t)0x0FFF)
#define	IWDG_SR_PVU ((uint8_t)0x01)
#define	IWDG_SR_RVU ((uint8_t)0x02)
#define	LCD_CR_LCDEN ((uint32_t)0x00000001)
#define	LCD_CR_VSEL ((uint32_t)0x00000002)
#define	LCD_CR_DUTY ((uint32_t)0x0000001C)
#define	LCD_CR_DUTY_0 ((uint32_t)0x00000004)
#define	LCD_CR_DUTY_1 ((uint32_t)0x00000008)
#define	LCD_CR_DUTY_2 ((uint32_t)0x00000010)
#define	LCD_CR_BIAS ((uint32_t)0x00000060)
#define	LCD_CR_BIAS_0 ((uint32_t)0x00000020)
#define	LCD_CR_BIAS_1 ((uint32_t)0x00000040)
#define	LCD_CR_MUX_SEG ((uint32_t)0x00000080)
#define	LCD_FCR_HD ((uint32_t)0x00000001)
#define	LCD_FCR_SOFIE ((uint32_t)0x00000002)
#define	LCD_FCR_UDDIE ((uint32_t)0x00000008)
#define	LCD_FCR_PON ((uint32_t)0x00000070)
#define	LCD_FCR_PON_0 ((uint32_t)0x00000010)
#define	LCD_FCR_PON_1 ((uint32_t)0x00000020)
#define	LCD_FCR_PON_2 ((uint32_t)0x00000040)
#define	LCD_FCR_DEAD ((uint32_t)0x00000380)
#define	LCD_FCR_DEAD_0 ((uint32_t)0x00000080)
#define	LCD_FCR_DEAD_1 ((uint32_t)0x00000100)
#define	LCD_FCR_DEAD_2 ((uint32_t)0x00000200)
#define	LCD_FCR_CC ((uint32_t)0x00001C00)
#define	LCD_FCR_CC_0 ((uint32_t)0x00000400)
#define	LCD_FCR_CC_1 ((uint32_t)0x00000800)
#define	LCD_FCR_CC_2 ((uint32_t)0x00001000)
#define	LCD_FCR_BLINKF ((uint32_t)0x0000E000)
#define	LCD_FCR_BLINKF_0 ((uint32_t)0x00002000)
#define	LCD_FCR_BLINKF_1 ((uint32_t)0x00004000)
#define	LCD_FCR_BLINKF_2 ((uint32_t)0x00008000)
#define	LCD_FCR_BLINK ((uint32_t)0x00030000)
#define	LCD_FCR_BLINK_0 ((uint32_t)0x00010000)
#define	LCD_FCR_BLINK_1 ((uint32_t)0x00020000)
#define	LCD_FCR_DIV ((uint32_t)0x003C0000)
#define	LCD_FCR_PS ((uint32_t)0x03C00000)
#define	LCD_SR_ENS ((uint32_t)0x00000001)
#define	LCD_SR_SOF ((uint32_t)0x00000002)
#define	LCD_SR_UDR ((uint32_t)0x00000004)
#define	LCD_SR_UDD ((uint32_t)0x00000008)
#define	LCD_SR_RDY ((uint32_t)0x00000010)
#define	LCD_SR_FCRSR ((uint32_t)0x00000020)
#define	LCD_CLR_SOFC ((uint32_t)0x00000002)
#define	LCD_CLR_UDDC ((uint32_t)0x00000008)
#define	LCD_RAM_SEGMENT_DATA ((uint32_t)0xFFFFFFFF)
#define	PWR_CR_LPSDSR ((uint16_t)0x0001)
#define	PWR_CR_PDDS ((uint16_t)0x0002)
#define	PWR_CR_CWUF ((uint16_t)0x0004)
#define	PWR_CR_CSBF ((uint16_t)0x0008)
#define	PWR_CR_PVDE ((uint16_t)0x0010)
#define	PWR_CR_PLS ((uint16_t)0x00E0)
#define	PWR_CR_PLS_0 ((uint16_t)0x0020)
#define	PWR_CR_PLS_1 ((uint16_t)0x0040)
#define	PWR_CR_PLS_2 ((uint16_t)0x0080)
#define	PWR_CR_PLS_LEV0 ((uint16_t)0x0000)
#define	PWR_CR_PLS_LEV1 ((uint16_t)0x0020)
#define	PWR_CR_PLS_LEV2 ((uint16_t)0x0040)
#define	PWR_CR_PLS_LEV3 ((uint16_t)0x0060)
#define	PWR_CR_PLS_LEV4 ((uint16_t)0x0080)
#define	PWR_CR_PLS_LEV5 ((uint16_t)0x00A0)
#define	PWR_CR_PLS_LEV6 ((uint16_t)0x00C0)
#define	PWR_CR_PLS_LEV7 ((uint16_t)0x00E0)
#define	PWR_CR_DBP ((uint16_t)0x0100)
#define	PWR_CR_ULP ((uint16_t)0x0200)
#define	PWR_CR_FWU ((uint16_t)0x0400)
#define	PWR_CR_VOS ((uint16_t)0x1800)
#define	PWR_CR_VOS_0 ((uint16_t)0x0800)
#define	PWR_CR_VOS_1 ((uint16_t)0x1000)
#define	PWR_CR_LPRUN ((uint16_t)0x4000)
#define	PWR_CSR_WUF ((uint16_t)0x0001)
#define	PWR_CSR_SBF ((uint16_t)0x0002)
#define	PWR_CSR_PVDO ((uint16_t)0x0004)
#define	PWR_CSR_VREFINTRDYF ((uint16_t)0x0008)
#define	PWR_CSR_VOSF ((uint16_t)0x0010)
#define	PWR_CSR_REGLPF ((uint16_t)0x0020)
#define	PWR_CSR_EWUP1 ((uint16_t)0x0100)
#define	PWR_CSR_EWUP2 ((uint16_t)0x0200)
#define	PWR_CSR_EWUP3 ((uint16_t)0x0400)
#define	RCC_CR_HSION ((uint32_t)0x00000001)
#define	RCC_CR_HSIRDY ((uint32_t)0x00000002)
#define	RCC_CR_MSION ((uint32_t)0x00000100)
#define	RCC_CR_MSIRDY ((uint32_t)0x00000200)
#define	RCC_CR_HSEON ((uint32_t)0x00010000)
#define	RCC_CR_HSERDY ((uint32_t)0x00020000)
#define	RCC_CR_HSEBYP ((uint32_t)0x00040000)
#define	RCC_CR_PLLON ((uint32_t)0x01000000)
#define	RCC_CR_PLLRDY ((uint32_t)0x02000000)
#define	RCC_CR_CSSON ((uint32_t)0x10000000)
#define	RCC_CR_RTCPRE ((uint32_t)0x60000000)
#define	RCC_CR_RTCPRE_0 ((uint32_t)0x20000000)
#define	RCC_CR_RTCPRE_1 ((uint32_t)0x40000000)
#define	RCC_ICSCR_HSICAL ((uint32_t)0x000000FF)
#define	RCC_ICSCR_HSITRIM ((uint32_t)0x00001F00)
#define	RCC_ICSCR_MSIRANGE ((uint32_t)0x0000E000)
#define	RCC_ICSCR_MSIRANGE_0 ((uint32_t)0x00000000)
#define	RCC_ICSCR_MSIRANGE_1 ((uint32_t)0x00002000)
#define	RCC_ICSCR_MSIRANGE_2 ((uint32_t)0x00004000)
#define	RCC_ICSCR_MSIRANGE_3 ((uint32_t)0x00006000)
#define	RCC_ICSCR_MSIRANGE_4 ((uint32_t)0x00008000)
#define	RCC_ICSCR_MSIRANGE_5 ((uint32_t)0x0000A000)
#define	RCC_ICSCR_MSIRANGE_6 ((uint32_t)0x0000C000)
#define	RCC_ICSCR_MSICAL ((uint32_t)0x00FF0000)
#define	RCC_ICSCR_MSITRIM ((uint32_t)0xFF000000)
#define	RCC_CFGR_SW ((uint32_t)0x00000003)
#define	RCC_CFGR_SW_0 ((uint32_t)0x00000001)
#define	RCC_CFGR_SW_1 ((uint32_t)0x00000002)
#define	RCC_CFGR_SW_MSI ((uint32_t)0x00000000)
#define	RCC_CFGR_SW_HSI ((uint32_t)0x00000001)
#define	RCC_CFGR_SW_HSE ((uint32_t)0x00000002)
#define	RCC_CFGR_SW_PLL ((uint32_t)0x00000003)
#define	RCC_CFGR_SWS ((uint32_t)0x0000000C)
#define	RCC_CFGR_SWS_0 ((uint32_t)0x00000004)
#define	RCC_CFGR_SWS_1 ((uint32_t)0x00000008)
#define	RCC_CFGR_SWS_MSI ((uint32_t)0x00000000)
#define	RCC_CFGR_SWS_HSI ((uint32_t)0x00000004)
#define	RCC_CFGR_SWS_HSE ((uint32_t)0x00000008)
#define	RCC_CFGR_SWS_PLL ((uint32_t)0x0000000C)
#define	RCC_CFGR_HPRE ((uint32_t)0x000000F0)
#define	RCC_CFGR_HPRE_0 ((uint32_t)0x00000010)
#define	RCC_CFGR_HPRE_1 ((uint32_t)0x00000020)
#define	RCC_CFGR_HPRE_2 ((uint32_t)0x00000040)
#define	RCC_CFGR_HPRE_3 ((uint32_t)0x00000080)
#define	RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000)
#define	RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080)
#define	RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090)
#define	RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0)
#define	RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0)
#define	RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0)
#define	RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0)
#define	RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0)
#define	RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0)
#define	RCC_CFGR_PPRE1 ((uint32_t)0x00000700)
#define	RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100)
#define	RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200)
#define	RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400)
#define	RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000)
#define	RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400)
#define	RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500)
#define	RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600)
#define	RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700)
#define	RCC_CFGR_PPRE2 ((uint32_t)0x00003800)
#define	RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800)
#define	RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000)
#define	RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000)
#define	RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000)
#define	RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000)
#define	RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800)
#define	RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000)
#define	RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800)
#define	RCC_CFGR_PLLSRC ((uint32_t)0x00010000)
#define	RCC_CFGR_PLLSRC_HSI ((uint32_t)0x00000000)
#define	RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000)
#define	RCC_CFGR_PLLMUL ((uint32_t)0x003C0000)
#define	RCC_CFGR_PLLMUL_0 ((uint32_t)0x00040000)
#define	RCC_CFGR_PLLMUL_1 ((uint32_t)0x00080000)
#define	RCC_CFGR_PLLMUL_2 ((uint32_t)0x00100000)
#define	RCC_CFGR_PLLMUL_3 ((uint32_t)0x00200000)
#define	RCC_CFGR_PLLMUL3 ((uint32_t)0x00000000)
#define	RCC_CFGR_PLLMUL4 ((uint32_t)0x00040000)
#define	RCC_CFGR_PLLMUL6 ((uint32_t)0x00080000)
#define	RCC_CFGR_PLLMUL8 ((uint32_t)0x000C0000)
#define	RCC_CFGR_PLLMUL12 ((uint32_t)0x00100000)
#define	RCC_CFGR_PLLMUL16 ((uint32_t)0x00140000)
#define	RCC_CFGR_PLLMUL24 ((uint32_t)0x00180000)
#define	RCC_CFGR_PLLMUL32 ((uint32_t)0x001C0000)
#define	RCC_CFGR_PLLMUL48 ((uint32_t)0x00200000)
#define	RCC_CFGR_PLLDIV ((uint32_t)0x00C00000)
#define	RCC_CFGR_PLLDIV_0 ((uint32_t)0x00400000)
#define	RCC_CFGR_PLLDIV_1 ((uint32_t)0x00800000)
#define	RCC_CFGR_PLLDIV1 ((uint32_t)0x00000000)
#define	RCC_CFGR_PLLDIV2 ((uint32_t)0x00400000)
#define	RCC_CFGR_PLLDIV3 ((uint32_t)0x00800000)
#define	RCC_CFGR_PLLDIV4 ((uint32_t)0x00C00000)
#define	RCC_CFGR_MCOSEL ((uint32_t)0x07000000)
#define	RCC_CFGR_MCOSEL_0 ((uint32_t)0x01000000)
#define	RCC_CFGR_MCOSEL_1 ((uint32_t)0x02000000)
#define	RCC_CFGR_MCOSEL_2 ((uint32_t)0x04000000)
#define	RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000)
#define	RCC_CFGR_MCO_SYSCLK ((uint32_t)0x01000000)
#define	RCC_CFGR_MCO_HSI ((uint32_t)0x02000000)
#define	RCC_CFGR_MCO_MSI ((uint32_t)0x03000000)
#define	RCC_CFGR_MCO_HSE ((uint32_t)0x04000000)
#define	RCC_CFGR_MCO_PLL ((uint32_t)0x05000000)
#define	RCC_CFGR_MCO_LSI ((uint32_t)0x06000000)
#define	RCC_CFGR_MCO_LSE ((uint32_t)0x07000000)
#define	RCC_CFGR_MCOPRE ((uint32_t)0x70000000)
#define	RCC_CFGR_MCOPRE_0 ((uint32_t)0x10000000)
#define	RCC_CFGR_MCOPRE_1 ((uint32_t)0x20000000)
#define	RCC_CFGR_MCOPRE_2 ((uint32_t)0x40000000)
#define	RCC_CFGR_MCO_DIV1 ((uint32_t)0x00000000)
#define	RCC_CFGR_MCO_DIV2 ((uint32_t)0x10000000)
#define	RCC_CFGR_MCO_DIV4 ((uint32_t)0x20000000)
#define	RCC_CFGR_MCO_DIV8 ((uint32_t)0x30000000)
#define	RCC_CFGR_MCO_DIV16 ((uint32_t)0x40000000)
#define	RCC_CIR_LSIRDYF ((uint32_t)0x00000001)
#define	RCC_CIR_LSERDYF ((uint32_t)0x00000002)
#define	RCC_CIR_HSIRDYF ((uint32_t)0x00000004)
#define	RCC_CIR_HSERDYF ((uint32_t)0x00000008)
#define	RCC_CIR_PLLRDYF ((uint32_t)0x00000010)
#define	RCC_CIR_MSIRDYF ((uint32_t)0x00000020)
#define	RCC_CIR_LSECSS ((uint32_t)0x00000040)
#define	RCC_CIR_CSSF ((uint32_t)0x00000080)
#define	RCC_CIR_LSIRDYIE ((uint32_t)0x00000100)
#define	RCC_CIR_LSERDYIE ((uint32_t)0x00000200)
#define	RCC_CIR_HSIRDYIE ((uint32_t)0x00000400)
#define	RCC_CIR_HSERDYIE ((uint32_t)0x00000800)
#define	RCC_CIR_PLLRDYIE ((uint32_t)0x00001000)
#define	RCC_CIR_MSIRDYIE ((uint32_t)0x00002000)
#define	RCC_CIR_LSECSSIE ((uint32_t)0x00004000)
#define	RCC_CIR_LSIRDYC ((uint32_t)0x00010000)
#define	RCC_CIR_LSERDYC ((uint32_t)0x00020000)
#define	RCC_CIR_HSIRDYC ((uint32_t)0x00040000)
#define	RCC_CIR_HSERDYC ((uint32_t)0x00080000)
#define	RCC_CIR_PLLRDYC ((uint32_t)0x00100000)
#define	RCC_CIR_MSIRDYC ((uint32_t)0x00200000)
#define	RCC_CIR_LSECSSC ((uint32_t)0x00400000)
#define	RCC_CIR_CSSC ((uint32_t)0x00800000)
#define	RCC_AHBRSTR_GPIOARST ((uint32_t)0x00000001)
#define	RCC_AHBRSTR_GPIOBRST ((uint32_t)0x00000002)
#define	RCC_AHBRSTR_GPIOCRST ((uint32_t)0x00000004)
#define	RCC_AHBRSTR_GPIODRST ((uint32_t)0x00000008)
#define	RCC_AHBRSTR_GPIOERST ((uint32_t)0x00000010)
#define	RCC_AHBRSTR_GPIOHRST ((uint32_t)0x00000020)
#define	RCC_AHBRSTR_GPIOFRST ((uint32_t)0x00000040)
#define	RCC_AHBRSTR_GPIOGRST ((uint32_t)0x00000080)
#define	RCC_AHBRSTR_CRCRST ((uint32_t)0x00001000)
#define	RCC_AHBRSTR_FLITFRST ((uint32_t)0x00008000)
#define	RCC_AHBRSTR_DMA1RST ((uint32_t)0x01000000)
#define	RCC_AHBRSTR_DMA2RST ((uint32_t)0x02000000)
#define	RCC_AHBRSTR_AESRST ((uint32_t)0x08000000)
#define	RCC_AHBRSTR_FSMCRST ((uint32_t)0x40000000)
#define	RCC_APB2RSTR_SYSCFGRST ((uint32_t)0x00000001)
#define	RCC_APB2RSTR_TIM9RST ((uint32_t)0x00000004)
#define	RCC_APB2RSTR_TIM10RST ((uint32_t)0x00000008)
#define	RCC_APB2RSTR_TIM11RST ((uint32_t)0x00000010)
#define	RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200)
#define	RCC_APB2RSTR_SDIORST ((uint32_t)0x00000800)
#define	RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000)
#define	RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000)
#define	RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001)
#define	RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002)
#define	RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004)
#define	RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008)
#define	RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010)
#define	RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020)
#define	RCC_APB1RSTR_LCDRST ((uint32_t)0x00000200)
#define	RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800)
#define	RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000)
#define	RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000)
#define	RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000)
#define	RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000)
#define	RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000)
#define	RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000)
#define	RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000)
#define	RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000)
#define	RCC_APB1RSTR_USBRST ((uint32_t)0x00800000)
#define	RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000)
#define	RCC_APB1RSTR_DACRST ((uint32_t)0x20000000)
#define	RCC_APB1RSTR_COMPRST ((uint32_t)0x80000000)
#define	RCC_AHBENR_GPIOAEN ((uint32_t)0x00000001)
#define	RCC_AHBENR_GPIOBEN ((uint32_t)0x00000002)
#define	RCC_AHBENR_GPIOCEN ((uint32_t)0x00000004)
#define	RCC_AHBENR_GPIODEN ((uint32_t)0x00000008)
#define	RCC_AHBENR_GPIOEEN ((uint32_t)0x00000010)
#define	RCC_AHBENR_GPIOHEN ((uint32_t)0x00000020)
#define	RCC_AHBENR_GPIOFEN ((uint32_t)0x00000040)
#define	RCC_AHBENR_GPIOGEN ((uint32_t)0x00000080)
#define	RCC_AHBENR_CRCEN ((uint32_t)0x00001000)
#define	RCC_AHBENR_FLITFEN ((uint32_t)0x00008000)
#define	RCC_AHBENR_DMA1EN ((uint32_t)0x01000000)
#define	RCC_AHBENR_DMA2EN ((uint32_t)0x02000000)
#define	RCC_AHBENR_AESEN ((uint32_t)0x08000000)
#define	RCC_AHBENR_FSMCEN ((uint32_t)0x40000000)
#define	RCC_APB2ENR_SYSCFGEN ((uint32_t)0x00000001)
#define	RCC_APB2ENR_TIM9EN ((uint32_t)0x00000004)
#define	RCC_APB2ENR_TIM10EN ((uint32_t)0x00000008)
#define	RCC_APB2ENR_TIM11EN ((uint32_t)0x00000010)
#define	RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200)
#define	RCC_APB2ENR_SDIOEN ((uint32_t)0x00000800)
#define	RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000)
#define	RCC_APB2ENR_USART1EN ((uint32_t)0x00004000)
#define	RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001)
#define	RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002)
#define	RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004)
#define	RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008)
#define	RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010)
#define	RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020)
#define	RCC_APB1ENR_LCDEN ((uint32_t)0x00000200)
#define	RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800)
#define	RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000)
#define	RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000)
#define	RCC_APB1ENR_USART2EN ((uint32_t)0x00020000)
#define	RCC_APB1ENR_USART3EN ((uint32_t)0x00040000)
#define	RCC_APB1ENR_UART4EN ((uint32_t)0x00080000)
#define	RCC_APB1ENR_UART5EN ((uint32_t)0x00100000)
#define	RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000)
#define	RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000)
#define	RCC_APB1ENR_USBEN ((uint32_t)0x00800000)
#define	RCC_APB1ENR_PWREN ((uint32_t)0x10000000)
#define	RCC_APB1ENR_DACEN ((uint32_t)0x20000000)
#define	RCC_APB1ENR_COMPEN ((uint32_t)0x80000000)
#define	RCC_AHBLPENR_GPIOALPEN ((uint32_t)0x00000001)
#define	RCC_AHBLPENR_GPIOBLPEN ((uint32_t)0x00000002)
#define	RCC_AHBLPENR_GPIOCLPEN ((uint32_t)0x00000004)
#define	RCC_AHBLPENR_GPIODLPEN ((uint32_t)0x00000008)
#define	RCC_AHBLPENR_GPIOELPEN ((uint32_t)0x00000010)
#define	RCC_AHBLPENR_GPIOHLPEN ((uint32_t)0x00000020)
#define	RCC_AHBLPENR_GPIOFLPEN ((uint32_t)0x00000040)
#define	RCC_AHBLPENR_GPIOGLPEN ((uint32_t)0x00000080)
#define	RCC_AHBLPENR_CRCLPEN ((uint32_t)0x00001000)
#define	RCC_AHBLPENR_FLITFLPEN ((uint32_t)0x00008000)
#define	RCC_AHBLPENR_SRAMLPEN ((uint32_t)0x00010000)
#define	RCC_AHBLPENR_DMA1LPEN ((uint32_t)0x01000000)
#define	RCC_AHBLPENR_DMA2LPEN ((uint32_t)0x02000000)
#define	RCC_AHBLPENR_AESLPEN ((uint32_t)0x08000000)
#define	RCC_AHBLPENR_FSMCLPEN ((uint32_t)0x40000000)
#define	RCC_APB2LPENR_SYSCFGLPEN ((uint32_t)0x00000001)
#define	RCC_APB2LPENR_TIM9LPEN ((uint32_t)0x00000004)
#define	RCC_APB2LPENR_TIM10LPEN ((uint32_t)0x00000008)
#define	RCC_APB2LPENR_TIM11LPEN ((uint32_t)0x00000010)
#define	RCC_APB2LPENR_ADC1LPEN ((uint32_t)0x00000200)
#define	RCC_APB2LPENR_SDIOLPEN ((uint32_t)0x00000800)
#define	RCC_APB2LPENR_SPI1LPEN ((uint32_t)0x00001000)
#define	RCC_APB2LPENR_USART1LPEN ((uint32_t)0x00004000)
#define	RCC_APB1LPENR_TIM2LPEN ((uint32_t)0x00000001)
#define	RCC_APB1LPENR_TIM3LPEN ((uint32_t)0x00000002)
#define	RCC_APB1LPENR_TIM4LPEN ((uint32_t)0x00000004)
#define	RCC_APB1LPENR_TIM5LPEN ((uint32_t)0x00000008)
#define	RCC_APB1LPENR_TIM6LPEN ((uint32_t)0x00000010)
#define	RCC_APB1LPENR_TIM7LPEN ((uint32_t)0x00000020)
#define	RCC_APB1LPENR_LCDLPEN ((uint32_t)0x00000200)
#define	RCC_APB1LPENR_WWDGLPEN ((uint32_t)0x00000800)
#define	RCC_APB1LPENR_SPI2LPEN ((uint32_t)0x00004000)
#define	RCC_APB1LPENR_SPI3LPEN ((uint32_t)0x00008000)
#define	RCC_APB1LPENR_USART2LPEN ((uint32_t)0x00020000)
#define	RCC_APB1LPENR_USART3LPEN ((uint32_t)0x00040000)
#define	RCC_APB1LPENR_UART4LPEN ((uint32_t)0x00080000)
#define	RCC_APB1LPENR_UART5LPEN ((uint32_t)0x00100000)
#define	RCC_APB1LPENR_I2C1LPEN ((uint32_t)0x00200000)
#define	RCC_APB1LPENR_I2C2LPEN ((uint32_t)0x00400000)
#define	RCC_APB1LPENR_USBLPEN ((uint32_t)0x00800000)
#define	RCC_APB1LPENR_PWRLPEN ((uint32_t)0x10000000)
#define	RCC_APB1LPENR_DACLPEN ((uint32_t)0x20000000)
#define	RCC_APB1LPENR_COMPLPEN ((uint32_t)0x80000000)
#define	RCC_CSR_LSION ((uint32_t)0x00000001)
#define	RCC_CSR_LSIRDY ((uint32_t)0x00000002)
#define	RCC_CSR_LSEON ((uint32_t)0x00000100)
#define	RCC_CSR_LSERDY ((uint32_t)0x00000200)
#define	RCC_CSR_LSEBYP ((uint32_t)0x00000400)
#define	RCC_CSR_LSECSSON ((uint32_t)0x00000800)
#define	RCC_CSR_LSECSSD ((uint32_t)0x00001000)
#define	RCC_CSR_RTCSEL ((uint32_t)0x00030000)
#define	RCC_CSR_RTCSEL_0 ((uint32_t)0x00010000)
#define	RCC_CSR_RTCSEL_1 ((uint32_t)0x00020000)
#define	RCC_CSR_RTCSEL_NOCLOCK ((uint32_t)0x00000000)
#define	RCC_CSR_RTCSEL_LSE ((uint32_t)0x00010000)
#define	RCC_CSR_RTCSEL_LSI ((uint32_t)0x00020000)
#define	RCC_CSR_RTCSEL_HSE ((uint32_t)0x00030000)
#define	RCC_CSR_RTCEN ((uint32_t)0x00400000)
#define	RCC_CSR_RTCRST ((uint32_t)0x00800000)
#define	RCC_CSR_RMVF ((uint32_t)0x01000000)
#define	RCC_CSR_OBLRSTF ((uint32_t)0x02000000)
#define	RCC_CSR_PINRSTF ((uint32_t)0x04000000)
#define	RCC_CSR_PORRSTF ((uint32_t)0x08000000)
#define	RCC_CSR_SFTRSTF ((uint32_t)0x10000000)
#define	RCC_CSR_IWDGRSTF ((uint32_t)0x20000000)
#define	RCC_CSR_WWDGRSTF ((uint32_t)0x40000000)
#define	RCC_CSR_LPWRRSTF ((uint32_t)0x80000000)
#define	RTC_TR_PM ((uint32_t)0x00400000)
#define	RTC_TR_HT ((uint32_t)0x00300000)
#define	RTC_TR_HT_0 ((uint32_t)0x00100000)
#define	RTC_TR_HT_1 ((uint32_t)0x00200000)
#define	RTC_TR_HU ((uint32_t)0x000F0000)
#define	RTC_TR_HU_0 ((uint32_t)0x00010000)
#define	RTC_TR_HU_1 ((uint32_t)0x00020000)
#define	RTC_TR_HU_2 ((uint32_t)0x00040000)
#define	RTC_TR_HU_3 ((uint32_t)0x00080000)
#define	RTC_TR_MNT ((uint32_t)0x00007000)
#define	RTC_TR_MNT_0 ((uint32_t)0x00001000)
#define	RTC_TR_MNT_1 ((uint32_t)0x00002000)
#define	RTC_TR_MNT_2 ((uint32_t)0x00004000)
#define	RTC_TR_MNU ((uint32_t)0x00000F00)
#define	RTC_TR_MNU_0 ((uint32_t)0x00000100)
#define	RTC_TR_MNU_1 ((uint32_t)0x00000200)
#define	RTC_TR_MNU_2 ((uint32_t)0x00000400)
#define	RTC_TR_MNU_3 ((uint32_t)0x00000800)
#define	RTC_TR_ST ((uint32_t)0x00000070)
#define	RTC_TR_ST_0 ((uint32_t)0x00000010)
#define	RTC_TR_ST_1 ((uint32_t)0x00000020)
#define	RTC_TR_ST_2 ((uint32_t)0x00000040)
#define	RTC_TR_SU ((uint32_t)0x0000000F)
#define	RTC_TR_SU_0 ((uint32_t)0x00000001)
#define	RTC_TR_SU_1 ((uint32_t)0x00000002)
#define	RTC_TR_SU_2 ((uint32_t)0x00000004)
#define	RTC_TR_SU_3 ((uint32_t)0x00000008)
#define	RTC_DR_YT ((uint32_t)0x00F00000)
#define	RTC_DR_YT_0 ((uint32_t)0x00100000)
#define	RTC_DR_YT_1 ((uint32_t)0x00200000)
#define	RTC_DR_YT_2 ((uint32_t)0x00400000)
#define	RTC_DR_YT_3 ((uint32_t)0x00800000)
#define	RTC_DR_YU ((uint32_t)0x000F0000)
#define	RTC_DR_YU_0 ((uint32_t)0x00010000)
#define	RTC_DR_YU_1 ((uint32_t)0x00020000)
#define	RTC_DR_YU_2 ((uint32_t)0x00040000)
#define	RTC_DR_YU_3 ((uint32_t)0x00080000)
#define	RTC_DR_WDU ((uint32_t)0x0000E000)
#define	RTC_DR_WDU_0 ((uint32_t)0x00002000)
#define	RTC_DR_WDU_1 ((uint32_t)0x00004000)
#define	RTC_DR_WDU_2 ((uint32_t)0x00008000)
#define	RTC_DR_MT ((uint32_t)0x00001000)
#define	RTC_DR_MU ((uint32_t)0x00000F00)
#define	RTC_DR_MU_0 ((uint32_t)0x00000100)
#define	RTC_DR_MU_1 ((uint32_t)0x00000200)
#define	RTC_DR_MU_2 ((uint32_t)0x00000400)
#define	RTC_DR_MU_3 ((uint32_t)0x00000800)
#define	RTC_DR_DT ((uint32_t)0x00000030)
#define	RTC_DR_DT_0 ((uint32_t)0x00000010)
#define	RTC_DR_DT_1 ((uint32_t)0x00000020)
#define	RTC_DR_DU ((uint32_t)0x0000000F)
#define	RTC_DR_DU_0 ((uint32_t)0x00000001)
#define	RTC_DR_DU_1 ((uint32_t)0x00000002)
#define	RTC_DR_DU_2 ((uint32_t)0x00000004)
#define	RTC_DR_DU_3 ((uint32_t)0x00000008)
#define	RTC_CR_COE ((uint32_t)0x00800000)
#define	RTC_CR_OSEL ((uint32_t)0x00600000)
#define	RTC_CR_OSEL_0 ((uint32_t)0x00200000)
#define	RTC_CR_OSEL_1 ((uint32_t)0x00400000)
#define	RTC_CR_POL ((uint32_t)0x00100000)
#define	RTC_CR_COSEL ((uint32_t)0x00080000)
#define	RTC_CR_BCK ((uint32_t)0x00040000)
#define	RTC_CR_SUB1H ((uint32_t)0x00020000)
#define	RTC_CR_ADD1H ((uint32_t)0x00010000)
#define	RTC_CR_TSIE ((uint32_t)0x00008000)
#define	RTC_CR_WUTIE ((uint32_t)0x00004000)
#define	RTC_CR_ALRBIE ((uint32_t)0x00002000)
#define	RTC_CR_ALRAIE ((uint32_t)0x00001000)
#define	RTC_CR_TSE ((uint32_t)0x00000800)
#define	RTC_CR_WUTE ((uint32_t)0x00000400)
#define	RTC_CR_ALRBE ((uint32_t)0x00000200)
#define	RTC_CR_ALRAE ((uint32_t)0x00000100)
#define	RTC_CR_DCE ((uint32_t)0x00000080)
#define	RTC_CR_FMT ((uint32_t)0x00000040)
#define	RTC_CR_BYPSHAD ((uint32_t)0x00000020)
#define	RTC_CR_REFCKON ((uint32_t)0x00000010)
#define	RTC_CR_TSEDGE ((uint32_t)0x00000008)
#define	RTC_CR_WUCKSEL ((uint32_t)0x00000007)
#define	RTC_CR_WUCKSEL_0 ((uint32_t)0x00000001)
#define	RTC_CR_WUCKSEL_1 ((uint32_t)0x00000002)
#define	RTC_CR_WUCKSEL_2 ((uint32_t)0x00000004)
#define	RTC_ISR_RECALPF ((uint32_t)0x00010000)
#define	RTC_ISR_TAMP3F ((uint32_t)0x00008000)
#define	RTC_ISR_TAMP2F ((uint32_t)0x00004000)
#define	RTC_ISR_TAMP1F ((uint32_t)0x00002000)
#define	RTC_ISR_TSOVF ((uint32_t)0x00001000)
#define	RTC_ISR_TSF ((uint32_t)0x00000800)
#define	RTC_ISR_WUTF ((uint32_t)0x00000400)
#define	RTC_ISR_ALRBF ((uint32_t)0x00000200)
#define	RTC_ISR_ALRAF ((uint32_t)0x00000100)
#define	RTC_ISR_INIT ((uint32_t)0x00000080)
#define	RTC_ISR_INITF ((uint32_t)0x00000040)
#define	RTC_ISR_RSF ((uint32_t)0x00000020)
#define	RTC_ISR_INITS ((uint32_t)0x00000010)
#define	RTC_ISR_SHPF ((uint32_t)0x00000008)
#define	RTC_ISR_WUTWF ((uint32_t)0x00000004)
#define	RTC_ISR_ALRBWF ((uint32_t)0x00000002)
#define	RTC_ISR_ALRAWF ((uint32_t)0x00000001)
#define	RTC_PRER_PREDIV_A ((uint32_t)0x007F0000)
#define	RTC_PRER_PREDIV_S ((uint32_t)0x00007FFF)
#define	RTC_WUTR_WUT ((uint32_t)0x0000FFFF)
#define	RTC_CALIBR_DCS ((uint32_t)0x00000080)
#define	RTC_CALIBR_DC ((uint32_t)0x0000001F)
#define	RTC_ALRMAR_MSK4 ((uint32_t)0x80000000)
#define	RTC_ALRMAR_WDSEL ((uint32_t)0x40000000)
#define	RTC_ALRMAR_DT ((uint32_t)0x30000000)
#define	RTC_ALRMAR_DT_0 ((uint32_t)0x10000000)
#define	RTC_ALRMAR_DT_1 ((uint32_t)0x20000000)
#define	RTC_ALRMAR_DU ((uint32_t)0x0F000000)
#define	RTC_ALRMAR_DU_0 ((uint32_t)0x01000000)
#define	RTC_ALRMAR_DU_1 ((uint32_t)0x02000000)
#define	RTC_ALRMAR_DU_2 ((uint32_t)0x04000000)
#define	RTC_ALRMAR_DU_3 ((uint32_t)0x08000000)
#define	RTC_ALRMAR_MSK3 ((uint32_t)0x00800000)
#define	RTC_ALRMAR_PM ((uint32_t)0x00400000)
#define	RTC_ALRMAR_HT ((uint32_t)0x00300000)
#define	RTC_ALRMAR_HT_0 ((uint32_t)0x00100000)
#define	RTC_ALRMAR_HT_1 ((uint32_t)0x00200000)
#define	RTC_ALRMAR_HU ((uint32_t)0x000F0000)
#define	RTC_ALRMAR_HU_0 ((uint32_t)0x00010000)
#define	RTC_ALRMAR_HU_1 ((uint32_t)0x00020000)
#define	RTC_ALRMAR_HU_2 ((uint32_t)0x00040000)
#define	RTC_ALRMAR_HU_3 ((uint32_t)0x00080000)
#define	RTC_ALRMAR_MSK2 ((uint32_t)0x00008000)
#define	RTC_ALRMAR_MNT ((uint32_t)0x00007000)
#define	RTC_ALRMAR_MNT_0 ((uint32_t)0x00001000)
#define	RTC_ALRMAR_MNT_1 ((uint32_t)0x00002000)
#define	RTC_ALRMAR_MNT_2 ((uint32_t)0x00004000)
#define	RTC_ALRMAR_MNU ((uint32_t)0x00000F00)
#define	RTC_ALRMAR_MNU_0 ((uint32_t)0x00000100)
#define	RTC_ALRMAR_MNU_1 ((uint32_t)0x00000200)
#define	RTC_ALRMAR_MNU_2 ((uint32_t)0x00000400)
#define	RTC_ALRMAR_MNU_3 ((uint32_t)0x00000800)
#define	RTC_ALRMAR_MSK1 ((uint32_t)0x00000080)
#define	RTC_ALRMAR_ST ((uint32_t)0x00000070)
#define	RTC_ALRMAR_ST_0 ((uint32_t)0x00000010)
#define	RTC_ALRMAR_ST_1 ((uint32_t)0x00000020)
#define	RTC_ALRMAR_ST_2 ((uint32_t)0x00000040)
#define	RTC_ALRMAR_SU ((uint32_t)0x0000000F)
#define	RTC_ALRMAR_SU_0 ((uint32_t)0x00000001)
#define	RTC_ALRMAR_SU_1 ((uint32_t)0x00000002)
#define	RTC_ALRMAR_SU_2 ((uint32_t)0x00000004)
#define	RTC_ALRMAR_SU_3 ((uint32_t)0x00000008)
#define	RTC_ALRMBR_MSK4 ((uint32_t)0x80000000)
#define	RTC_ALRMBR_WDSEL ((uint32_t)0x40000000)
#define	RTC_ALRMBR_DT ((uint32_t)0x30000000)
#define	RTC_ALRMBR_DT_0 ((uint32_t)0x10000000)
#define	RTC_ALRMBR_DT_1 ((uint32_t)0x20000000)
#define	RTC_ALRMBR_DU ((uint32_t)0x0F000000)
#define	RTC_ALRMBR_DU_0 ((uint32_t)0x01000000)
#define	RTC_ALRMBR_DU_1 ((uint32_t)0x02000000)
#define	RTC_ALRMBR_DU_2 ((uint32_t)0x04000000)
#define	RTC_ALRMBR_DU_3 ((uint32_t)0x08000000)
#define	RTC_ALRMBR_MSK3 ((uint32_t)0x00800000)
#define	RTC_ALRMBR_PM ((uint32_t)0x00400000)
#define	RTC_ALRMBR_HT ((uint32_t)0x00300000)
#define	RTC_ALRMBR_HT_0 ((uint32_t)0x00100000)
#define	RTC_ALRMBR_HT_1 ((uint32_t)0x00200000)
#define	RTC_ALRMBR_HU ((uint32_t)0x000F0000)
#define	RTC_ALRMBR_HU_0 ((uint32_t)0x00010000)
#define	RTC_ALRMBR_HU_1 ((uint32_t)0x00020000)
#define	RTC_ALRMBR_HU_2 ((uint32_t)0x00040000)
#define	RTC_ALRMBR_HU_3 ((uint32_t)0x00080000)
#define	RTC_ALRMBR_MSK2 ((uint32_t)0x00008000)
#define	RTC_ALRMBR_MNT ((uint32_t)0x00007000)
#define	RTC_ALRMBR_MNT_0 ((uint32_t)0x00001000)
#define	RTC_ALRMBR_MNT_1 ((uint32_t)0x00002000)
#define	RTC_ALRMBR_MNT_2 ((uint32_t)0x00004000)
#define	RTC_ALRMBR_MNU ((uint32_t)0x00000F00)
#define	RTC_ALRMBR_MNU_0 ((uint32_t)0x00000100)
#define	RTC_ALRMBR_MNU_1 ((uint32_t)0x00000200)
#define	RTC_ALRMBR_MNU_2 ((uint32_t)0x00000400)
#define	RTC_ALRMBR_MNU_3 ((uint32_t)0x00000800)
#define	RTC_ALRMBR_MSK1 ((uint32_t)0x00000080)
#define	RTC_ALRMBR_ST ((uint32_t)0x00000070)
#define	RTC_ALRMBR_ST_0 ((uint32_t)0x00000010)
#define	RTC_ALRMBR_ST_1 ((uint32_t)0x00000020)
#define	RTC_ALRMBR_ST_2 ((uint32_t)0x00000040)
#define	RTC_ALRMBR_SU ((uint32_t)0x0000000F)
#define	RTC_ALRMBR_SU_0 ((uint32_t)0x00000001)
#define	RTC_ALRMBR_SU_1 ((uint32_t)0x00000002)
#define	RTC_ALRMBR_SU_2 ((uint32_t)0x00000004)
#define	RTC_ALRMBR_SU_3 ((uint32_t)0x00000008)
#define	RTC_WPR_KEY ((uint32_t)0x000000FF)
#define	RTC_SSR_SS ((uint32_t)0x0000FFFF)
#define	RTC_SHIFTR_SUBFS ((uint32_t)0x00007FFF)
#define	RTC_SHIFTR_ADD1S ((uint32_t)0x80000000)
#define	RTC_TSTR_PM ((uint32_t)0x00400000)
#define	RTC_TSTR_HT ((uint32_t)0x00300000)
#define	RTC_TSTR_HT_0 ((uint32_t)0x00100000)
#define	RTC_TSTR_HT_1 ((uint32_t)0x00200000)
#define	RTC_TSTR_HU ((uint32_t)0x000F0000)
#define	RTC_TSTR_HU_0 ((uint32_t)0x00010000)
#define	RTC_TSTR_HU_1 ((uint32_t)0x00020000)
#define	RTC_TSTR_HU_2 ((uint32_t)0x00040000)
#define	RTC_TSTR_HU_3 ((uint32_t)0x00080000)
#define	RTC_TSTR_MNT ((uint32_t)0x00007000)
#define	RTC_TSTR_MNT_0 ((uint32_t)0x00001000)
#define	RTC_TSTR_MNT_1 ((uint32_t)0x00002000)
#define	RTC_TSTR_MNT_2 ((uint32_t)0x00004000)
#define	RTC_TSTR_MNU ((uint32_t)0x00000F00)
#define	RTC_TSTR_MNU_0 ((uint32_t)0x00000100)
#define	RTC_TSTR_MNU_1 ((uint32_t)0x00000200)
#define	RTC_TSTR_MNU_2 ((uint32_t)0x00000400)
#define	RTC_TSTR_MNU_3 ((uint32_t)0x00000800)
#define	RTC_TSTR_ST ((uint32_t)0x00000070)
#define	RTC_TSTR_ST_0 ((uint32_t)0x00000010)
#define	RTC_TSTR_ST_1 ((uint32_t)0x00000020)
#define	RTC_TSTR_ST_2 ((uint32_t)0x00000040)
#define	RTC_TSTR_SU ((uint32_t)0x0000000F)
#define	RTC_TSTR_SU_0 ((uint32_t)0x00000001)
#define	RTC_TSTR_SU_1 ((uint32_t)0x00000002)
#define	RTC_TSTR_SU_2 ((uint32_t)0x00000004)
#define	RTC_TSTR_SU_3 ((uint32_t)0x00000008)
#define	RTC_TSDR_WDU ((uint32_t)0x0000E000)
#define	RTC_TSDR_WDU_0 ((uint32_t)0x00002000)
#define	RTC_TSDR_WDU_1 ((uint32_t)0x00004000)
#define	RTC_TSDR_WDU_2 ((uint32_t)0x00008000)
#define	RTC_TSDR_MT ((uint32_t)0x00001000)
#define	RTC_TSDR_MU ((uint32_t)0x00000F00)
#define	RTC_TSDR_MU_0 ((uint32_t)0x00000100)
#define	RTC_TSDR_MU_1 ((uint32_t)0x00000200)
#define	RTC_TSDR_MU_2 ((uint32_t)0x00000400)
#define	RTC_TSDR_MU_3 ((uint32_t)0x00000800)
#define	RTC_TSDR_DT ((uint32_t)0x00000030)
#define	RTC_TSDR_DT_0 ((uint32_t)0x00000010)
#define	RTC_TSDR_DT_1 ((uint32_t)0x00000020)
#define	RTC_TSDR_DU ((uint32_t)0x0000000F)
#define	RTC_TSDR_DU_0 ((uint32_t)0x00000001)
#define	RTC_TSDR_DU_1 ((uint32_t)0x00000002)
#define	RTC_TSDR_DU_2 ((uint32_t)0x00000004)
#define	RTC_TSDR_DU_3 ((uint32_t)0x00000008)
#define	RTC_TSSSR_SS ((uint32_t)0x0000FFFF)
#define	RTC_CALR_CALP ((uint32_t)0x00008000)
#define	RTC_CALR_CALW8 ((uint32_t)0x00004000)
#define	RTC_CALR_CALW16 ((uint32_t)0x00002000)
#define	RTC_CALR_CALM ((uint32_t)0x000001FF)
#define	RTC_CALR_CALM_0 ((uint32_t)0x00000001)
#define	RTC_CALR_CALM_1 ((uint32_t)0x00000002)
#define	RTC_CALR_CALM_2 ((uint32_t)0x00000004)
#define	RTC_CALR_CALM_3 ((uint32_t)0x00000008)
#define	RTC_CALR_CALM_4 ((uint32_t)0x00000010)
#define	RTC_CALR_CALM_5 ((uint32_t)0x00000020)
#define	RTC_CALR_CALM_6 ((uint32_t)0x00000040)
#define	RTC_CALR_CALM_7 ((uint32_t)0x00000080)
#define	RTC_CALR_CALM_8 ((uint32_t)0x00000100)
#define	RTC_TAFCR_ALARMOUTTYPE ((uint32_t)0x00040000)
#define	RTC_TAFCR_TAMPPUDIS ((uint32_t)0x00008000)
#define	RTC_TAFCR_TAMPPRCH ((uint32_t)0x00006000)
#define	RTC_TAFCR_TAMPPRCH_0 ((uint32_t)0x00002000)
#define	RTC_TAFCR_TAMPPRCH_1 ((uint32_t)0x00004000)
#define	RTC_TAFCR_TAMPFLT ((uint32_t)0x00001800)
#define	RTC_TAFCR_TAMPFLT_0 ((uint32_t)0x00000800)
#define	RTC_TAFCR_TAMPFLT_1 ((uint32_t)0x00001000)
#define	RTC_TAFCR_TAMPFREQ ((uint32_t)0x00000700)
#define	RTC_TAFCR_TAMPFREQ_0 ((uint32_t)0x00000100)
#define	RTC_TAFCR_TAMPFREQ_1 ((uint32_t)0x00000200)
#define	RTC_TAFCR_TAMPFREQ_2 ((uint32_t)0x00000400)
#define	RTC_TAFCR_TAMPTS ((uint32_t)0x00000080)
#define	RTC_TAFCR_TAMP3TRG ((uint32_t)0x00000040)
#define	RTC_TAFCR_TAMP3E ((uint32_t)0x00000020)
#define	RTC_TAFCR_TAMP2TRG ((uint32_t)0x00000010)
#define	RTC_TAFCR_TAMP2E ((uint32_t)0x00000008)
#define	RTC_TAFCR_TAMPIE ((uint32_t)0x00000004)
#define	RTC_TAFCR_TAMP1TRG ((uint32_t)0x00000002)
#define	RTC_TAFCR_TAMP1E ((uint32_t)0x00000001)
#define	RTC_ALRMASSR_MASKSS ((uint32_t)0x0F000000)
#define	RTC_ALRMASSR_MASKSS_0 ((uint32_t)0x01000000)
#define	RTC_ALRMASSR_MASKSS_1 ((uint32_t)0x02000000)
#define	RTC_ALRMASSR_MASKSS_2 ((uint32_t)0x04000000)
#define	RTC_ALRMASSR_MASKSS_3 ((uint32_t)0x08000000)
#define	RTC_ALRMASSR_SS ((uint32_t)0x00007FFF)
#define	RTC_ALRMBSSR_MASKSS ((uint32_t)0x0F000000)
#define	RTC_ALRMBSSR_MASKSS_0 ((uint32_t)0x01000000)
#define	RTC_ALRMBSSR_MASKSS_1 ((uint32_t)0x02000000)
#define	RTC_ALRMBSSR_MASKSS_2 ((uint32_t)0x04000000)
#define	RTC_ALRMBSSR_MASKSS_3 ((uint32_t)0x08000000)
#define	RTC_ALRMBSSR_SS ((uint32_t)0x00007FFF)
#define	RTC_BKP0R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP1R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP2R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP3R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP4R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP5R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP6R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP7R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP8R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP9R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP10R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP11R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP12R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP13R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP14R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP15R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP16R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP17R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP18R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP19R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP20R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP21R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP22R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP23R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP24R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP25R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP26R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP27R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP28R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP29R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP30R ((uint32_t)0xFFFFFFFF)
#define	RTC_BKP31R ((uint32_t)0xFFFFFFFF)
#define	SDIO_POWER_PWRCTRL ((uint8_t)0x03)
#define	SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01)
#define	SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02)
#define	SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF)
#define	SDIO_CLKCR_CLKEN ((uint16_t)0x0100)
#define	SDIO_CLKCR_PWRSAV ((uint16_t)0x0200)
#define	SDIO_CLKCR_BYPASS ((uint16_t)0x0400)
#define	SDIO_CLKCR_WIDBUS ((uint16_t)0x1800)
#define	SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800)
#define	SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000)
#define	SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000)
#define	SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000)
#define	SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF)
#define	SDIO_CMD_CMDINDEX ((uint16_t)0x003F)
#define	SDIO_CMD_WAITRESP ((uint16_t)0x00C0)
#define	SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040)
#define	SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080)
#define	SDIO_CMD_WAITINT ((uint16_t)0x0100)
#define	SDIO_CMD_WAITPEND ((uint16_t)0x0200)
#define	SDIO_CMD_CPSMEN ((uint16_t)0x0400)
#define	SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800)
#define	SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000)
#define	SDIO_CMD_NIEN ((uint16_t)0x2000)
#define	SDIO_CMD_CEATACMD ((uint16_t)0x4000)
#define	SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F)
#define	SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF)
#define	SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF)
#define	SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF)
#define	SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF)
#define	SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF)
#define	SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF)
#define	SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF)
#define	SDIO_DCTRL_DTEN ((uint16_t)0x0001)
#define	SDIO_DCTRL_DTDIR ((uint16_t)0x0002)
#define	SDIO_DCTRL_DTMODE ((uint16_t)0x0004)
#define	SDIO_DCTRL_DMAEN ((uint16_t)0x0008)
#define	SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0)
#define	SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010)
#define	SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020)
#define	SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040)
#define	SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080)
#define	SDIO_DCTRL_RWSTART ((uint16_t)0x0100)
#define	SDIO_DCTRL_RWSTOP ((uint16_t)0x0200)
#define	SDIO_DCTRL_RWMOD ((uint16_t)0x0400)
#define	SDIO_DCTRL_SDIOEN ((uint16_t)0x0800)
#define	SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF)
#define	SDIO_STA_CCRCFAIL ((uint32_t)0x00000001)
#define	SDIO_STA_DCRCFAIL ((uint32_t)0x00000002)
#define	SDIO_STA_CTIMEOUT ((uint32_t)0x00000004)
#define	SDIO_STA_DTIMEOUT ((uint32_t)0x00000008)
#define	SDIO_STA_TXUNDERR ((uint32_t)0x00000010)
#define	SDIO_STA_RXOVERR ((uint32_t)0x00000020)
#define	SDIO_STA_CMDREND ((uint32_t)0x00000040)
#define	SDIO_STA_CMDSENT ((uint32_t)0x00000080)
#define	SDIO_STA_DATAEND ((uint32_t)0x00000100)
#define	SDIO_STA_STBITERR ((uint32_t)0x00000200)
#define	SDIO_STA_DBCKEND ((uint32_t)0x00000400)
#define	SDIO_STA_CMDACT ((uint32_t)0x00000800)
#define	SDIO_STA_TXACT ((uint32_t)0x00001000)
#define	SDIO_STA_RXACT ((uint32_t)0x00002000)
#define	SDIO_STA_TXFIFOHE ((uint32_t)0x00004000)
#define	SDIO_STA_RXFIFOHF ((uint32_t)0x00008000)
#define	SDIO_STA_TXFIFOF ((uint32_t)0x00010000)
#define	SDIO_STA_RXFIFOF ((uint32_t)0x00020000)
#define	SDIO_STA_TXFIFOE ((uint32_t)0x00040000)
#define	SDIO_STA_RXFIFOE ((uint32_t)0x00080000)
#define	SDIO_STA_TXDAVL ((uint32_t)0x00100000)
#define	SDIO_STA_RXDAVL ((uint32_t)0x00200000)
#define	SDIO_STA_SDIOIT ((uint32_t)0x00400000)
#define	SDIO_STA_CEATAEND ((uint32_t)0x00800000)
#define	SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001)
#define	SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002)
#define	SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004)
#define	SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008)
#define	SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010)
#define	SDIO_ICR_RXOVERRC ((uint32_t)0x00000020)
#define	SDIO_ICR_CMDRENDC ((uint32_t)0x00000040)
#define	SDIO_ICR_CMDSENTC ((uint32_t)0x00000080)
#define	SDIO_ICR_DATAENDC ((uint32_t)0x00000100)
#define	SDIO_ICR_STBITERRC ((uint32_t)0x00000200)
#define	SDIO_ICR_DBCKENDC ((uint32_t)0x00000400)
#define	SDIO_ICR_SDIOITC ((uint32_t)0x00400000)
#define	SDIO_ICR_CEATAENDC ((uint32_t)0x00800000)
#define	SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001)
#define	SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002)
#define	SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004)
#define	SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008)
#define	SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010)
#define	SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020)
#define	SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040)
#define	SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080)
#define	SDIO_MASK_DATAENDIE ((uint32_t)0x00000100)
#define	SDIO_MASK_STBITERRIE ((uint32_t)0x00000200)
#define	SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400)
#define	SDIO_MASK_CMDACTIE ((uint32_t)0x00000800)
#define	SDIO_MASK_TXACTIE ((uint32_t)0x00001000)
#define	SDIO_MASK_RXACTIE ((uint32_t)0x00002000)
#define	SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000)
#define	SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000)
#define	SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000)
#define	SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000)
#define	SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000)
#define	SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000)
#define	SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000)
#define	SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000)
#define	SDIO_MASK_SDIOITIE ((uint32_t)0x00400000)
#define	SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000)
#define	SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF)
#define	SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF)
#define	SPI_CR1_CPHA ((uint16_t)0x0001)
#define	SPI_CR1_CPOL ((uint16_t)0x0002)
#define	SPI_CR1_MSTR ((uint16_t)0x0004)
#define	SPI_CR1_BR ((uint16_t)0x0038)
#define	SPI_CR1_BR_0 ((uint16_t)0x0008)
#define	SPI_CR1_BR_1 ((uint16_t)0x0010)
#define	SPI_CR1_BR_2 ((uint16_t)0x0020)
#define	SPI_CR1_SPE ((uint16_t)0x0040)
#define	SPI_CR1_LSBFIRST ((uint16_t)0x0080)
#define	SPI_CR1_SSI ((uint16_t)0x0100)
#define	SPI_CR1_SSM ((uint16_t)0x0200)
#define	SPI_CR1_RXONLY ((uint16_t)0x0400)
#define	SPI_CR1_DFF ((uint16_t)0x0800)
#define	SPI_CR1_CRCNEXT ((uint16_t)0x1000)
#define	SPI_CR1_CRCEN ((uint16_t)0x2000)
#define	SPI_CR1_BIDIOE ((uint16_t)0x4000)
#define	SPI_CR1_BIDIMODE ((uint16_t)0x8000)
#define	SPI_CR2_RXDMAEN ((uint8_t)0x01)
#define	SPI_CR2_TXDMAEN ((uint8_t)0x02)
#define	SPI_CR2_SSOE ((uint8_t)0x04)
#define	SPI_CR2_FRF ((uint8_t)0x08)
#define	SPI_CR2_ERRIE ((uint8_t)0x20)
#define	SPI_CR2_RXNEIE ((uint8_t)0x40)
#define	SPI_CR2_TXEIE ((uint8_t)0x80)
#define	SPI_SR_RXNE ((uint8_t)0x01)
#define	SPI_SR_TXE ((uint8_t)0x02)
#define	SPI_SR_CHSIDE ((uint8_t)0x04)
#define	SPI_SR_UDR ((uint8_t)0x08)
#define	SPI_SR_CRCERR ((uint8_t)0x10)
#define	SPI_SR_MODF ((uint8_t)0x20)
#define	SPI_SR_OVR ((uint8_t)0x40)
#define	SPI_SR_BSY ((uint8_t)0x80)
#define	SPI_DR_DR ((uint16_t)0xFFFF)
#define	SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF)
#define	SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF)
#define	SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF)
#define	SPI_I2SCFGR_CHLEN ((uint16_t)0x0001)
#define	SPI_I2SCFGR_DATLEN ((uint16_t)0x0006)
#define	SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002)
#define	SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004)
#define	SPI_I2SCFGR_CKPOL ((uint16_t)0x0008)
#define	SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030)
#define	SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010)
#define	SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020)
#define	SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080)
#define	SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300)
#define	SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100)
#define	SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200)
#define	SPI_I2SCFGR_I2SE ((uint16_t)0x0400)
#define	SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800)
#define	SPI_I2SPR_I2SDIV ((uint16_t)0x00FF)
#define	SPI_I2SPR_ODD ((uint16_t)0x0100)
#define	SPI_I2SPR_MCKOE ((uint16_t)0x0200)
#define	SYSCFG_MEMRMP_MEM_MODE ((uint32_t)0x00000003)
#define	SYSCFG_MEMRMP_MEM_MODE_0 ((uint32_t)0x00000001)
#define	SYSCFG_MEMRMP_MEM_MODE_1 ((uint32_t)0x00000002)
#define	SYSCFG_MEMRMP_BOOT_MODE ((uint32_t)0x00000300)
#define	SYSCFG_MEMRMP_BOOT_MODE_0 ((uint32_t)0x00000100)
#define	SYSCFG_MEMRMP_BOOT_MODE_1 ((uint32_t)0x00000200)
#define	SYSCFG_PMC_USB_PU ((uint32_t)0x00000001)
#define	SYSCFG_EXTICR1_EXTI0 ((uint16_t)0x000F)
#define	SYSCFG_EXTICR1_EXTI1 ((uint16_t)0x00F0)
#define	SYSCFG_EXTICR1_EXTI2 ((uint16_t)0x0F00)
#define	SYSCFG_EXTICR1_EXTI3 ((uint16_t)0xF000)
#define	SYSCFG_EXTICR1_EXTI0_PA ((uint16_t)0x0000)
	EXTI0 configuration.
#define	SYSCFG_EXTICR1_EXTI0_PB ((uint16_t)0x0001)
#define	SYSCFG_EXTICR1_EXTI0_PC ((uint16_t)0x0002)
#define	SYSCFG_EXTICR1_EXTI0_PD ((uint16_t)0x0003)
#define	SYSCFG_EXTICR1_EXTI0_PE ((uint16_t)0x0004)
#define	SYSCFG_EXTICR1_EXTI0_PH ((uint16_t)0x0005)
#define	SYSCFG_EXTICR1_EXTI0_PF ((uint16_t)0x0006)
#define	SYSCFG_EXTICR1_EXTI0_PG ((uint16_t)0x0007)
#define	SYSCFG_EXTICR1_EXTI1_PA ((uint16_t)0x0000)
	EXTI1 configuration.
#define	SYSCFG_EXTICR1_EXTI1_PB ((uint16_t)0x0010)
#define	SYSCFG_EXTICR1_EXTI1_PC ((uint16_t)0x0020)
#define	SYSCFG_EXTICR1_EXTI1_PD ((uint16_t)0x0030)
#define	SYSCFG_EXTICR1_EXTI1_PE ((uint16_t)0x0040)
#define	SYSCFG_EXTICR1_EXTI1_PH ((uint16_t)0x0050)
#define	SYSCFG_EXTICR1_EXTI1_PF ((uint16_t)0x0060)
#define	SYSCFG_EXTICR1_EXTI1_PG ((uint16_t)0x0070)
#define	SYSCFG_EXTICR1_EXTI2_PA ((uint16_t)0x0000)
	EXTI2 configuration.
#define	SYSCFG_EXTICR1_EXTI2_PB ((uint16_t)0x0100)
#define	SYSCFG_EXTICR1_EXTI2_PC ((uint16_t)0x0200)
#define	SYSCFG_EXTICR1_EXTI2_PD ((uint16_t)0x0300)
#define	SYSCFG_EXTICR1_EXTI2_PE ((uint16_t)0x0400)
#define	SYSCFG_EXTICR1_EXTI2_PH ((uint16_t)0x0500)
#define	SYSCFG_EXTICR1_EXTI2_PF ((uint16_t)0x0600)
#define	SYSCFG_EXTICR1_EXTI2_PG ((uint16_t)0x0700)
#define	SYSCFG_EXTICR1_EXTI3_PA ((uint16_t)0x0000)
	EXTI3 configuration.
#define	SYSCFG_EXTICR1_EXTI3_PB ((uint16_t)0x1000)
#define	SYSCFG_EXTICR1_EXTI3_PC ((uint16_t)0x2000)
#define	SYSCFG_EXTICR1_EXTI3_PD ((uint16_t)0x3000)
#define	SYSCFG_EXTICR1_EXTI3_PE ((uint16_t)0x4000)
#define	SYSCFG_EXTICR1_EXTI3_PF ((uint16_t)0x3000)
#define	SYSCFG_EXTICR1_EXTI3_PG ((uint16_t)0x4000)
#define	SYSCFG_EXTICR2_EXTI4 ((uint16_t)0x000F)
#define	SYSCFG_EXTICR2_EXTI5 ((uint16_t)0x00F0)
#define	SYSCFG_EXTICR2_EXTI6 ((uint16_t)0x0F00)
#define	SYSCFG_EXTICR2_EXTI7 ((uint16_t)0xF000)
#define	SYSCFG_EXTICR2_EXTI4_PA ((uint16_t)0x0000)
	EXTI4 configuration.
#define	SYSCFG_EXTICR2_EXTI4_PB ((uint16_t)0x0001)
#define	SYSCFG_EXTICR2_EXTI4_PC ((uint16_t)0x0002)
#define	SYSCFG_EXTICR2_EXTI4_PD ((uint16_t)0x0003)
#define	SYSCFG_EXTICR2_EXTI4_PE ((uint16_t)0x0004)
#define	SYSCFG_EXTICR2_EXTI4_PF ((uint16_t)0x0006)
#define	SYSCFG_EXTICR2_EXTI4_PG ((uint16_t)0x0007)
#define	SYSCFG_EXTICR2_EXTI5_PA ((uint16_t)0x0000)
	EXTI5 configuration.
#define	SYSCFG_EXTICR2_EXTI5_PB ((uint16_t)0x0010)
#define	SYSCFG_EXTICR2_EXTI5_PC ((uint16_t)0x0020)
#define	SYSCFG_EXTICR2_EXTI5_PD ((uint16_t)0x0030)
#define	SYSCFG_EXTICR2_EXTI5_PE ((uint16_t)0x0040)
#define	SYSCFG_EXTICR2_EXTI5_PF ((uint16_t)0x0060)
#define	SYSCFG_EXTICR2_EXTI5_PG ((uint16_t)0x0070)
#define	SYSCFG_EXTICR2_EXTI6_PA ((uint16_t)0x0000)
	EXTI6 configuration.
#define	SYSCFG_EXTICR2_EXTI6_PB ((uint16_t)0x0100)
#define	SYSCFG_EXTICR2_EXTI6_PC ((uint16_t)0x0200)
#define	SYSCFG_EXTICR2_EXTI6_PD ((uint16_t)0x0300)
#define	SYSCFG_EXTICR2_EXTI6_PE ((uint16_t)0x0400)
#define	SYSCFG_EXTICR2_EXTI6_PF ((uint16_t)0x0600)
#define	SYSCFG_EXTICR2_EXTI6_PG ((uint16_t)0x0700)
#define	SYSCFG_EXTICR2_EXTI7_PA ((uint16_t)0x0000)
	EXTI7 configuration.
#define	SYSCFG_EXTICR2_EXTI7_PB ((uint16_t)0x1000)
#define	SYSCFG_EXTICR2_EXTI7_PC ((uint16_t)0x2000)
#define	SYSCFG_EXTICR2_EXTI7_PD ((uint16_t)0x3000)
#define	SYSCFG_EXTICR2_EXTI7_PE ((uint16_t)0x4000)
#define	SYSCFG_EXTICR2_EXTI7_PF ((uint16_t)0x6000)
#define	SYSCFG_EXTICR2_EXTI7_PG ((uint16_t)0x7000)
#define	SYSCFG_EXTICR3_EXTI8 ((uint16_t)0x000F)
#define	SYSCFG_EXTICR3_EXTI9 ((uint16_t)0x00F0)
#define	SYSCFG_EXTICR3_EXTI10 ((uint16_t)0x0F00)
#define	SYSCFG_EXTICR3_EXTI11 ((uint16_t)0xF000)
#define	SYSCFG_EXTICR3_EXTI8_PA ((uint16_t)0x0000)
	EXTI8 configuration.
#define	SYSCFG_EXTICR3_EXTI8_PB ((uint16_t)0x0001)
#define	SYSCFG_EXTICR3_EXTI8_PC ((uint16_t)0x0002)
#define	SYSCFG_EXTICR3_EXTI8_PD ((uint16_t)0x0003)
#define	SYSCFG_EXTICR3_EXTI8_PE ((uint16_t)0x0004)
#define	SYSCFG_EXTICR3_EXTI8_PF ((uint16_t)0x0006)
#define	SYSCFG_EXTICR3_EXTI8_PG ((uint16_t)0x0007)
#define	SYSCFG_EXTICR3_EXTI9_PA ((uint16_t)0x0000)
	EXTI9 configuration.
#define	SYSCFG_EXTICR3_EXTI9_PB ((uint16_t)0x0010)
#define	SYSCFG_EXTICR3_EXTI9_PC ((uint16_t)0x0020)
#define	SYSCFG_EXTICR3_EXTI9_PD ((uint16_t)0x0030)
#define	SYSCFG_EXTICR3_EXTI9_PE ((uint16_t)0x0040)
#define	SYSCFG_EXTICR3_EXTI9_PF ((uint16_t)0x0060)
#define	SYSCFG_EXTICR3_EXTI9_PG ((uint16_t)0x0070)
#define	SYSCFG_EXTICR3_EXTI10_PA ((uint16_t)0x0000)
	EXTI10 configuration.
#define	SYSCFG_EXTICR3_EXTI10_PB ((uint16_t)0x0100)
#define	SYSCFG_EXTICR3_EXTI10_PC ((uint16_t)0x0200)
#define	SYSCFG_EXTICR3_EXTI10_PD ((uint16_t)0x0300)
#define	SYSCFG_EXTICR3_EXTI10_PE ((uint16_t)0x0400)
#define	SYSCFG_EXTICR3_EXTI10_PF ((uint16_t)0x0600)
#define	SYSCFG_EXTICR3_EXTI10_PG ((uint16_t)0x0700)
#define	SYSCFG_EXTICR3_EXTI11_PA ((uint16_t)0x0000)
	EXTI11 configuration.
#define	SYSCFG_EXTICR3_EXTI11_PB ((uint16_t)0x1000)
#define	SYSCFG_EXTICR3_EXTI11_PC ((uint16_t)0x2000)
#define	SYSCFG_EXTICR3_EXTI11_PD ((uint16_t)0x3000)
#define	SYSCFG_EXTICR3_EXTI11_PE ((uint16_t)0x4000)
#define	SYSCFG_EXTICR3_EXTI11_PF ((uint16_t)0x6000)
#define	SYSCFG_EXTICR3_EXTI11_PG ((uint16_t)0x7000)
#define	SYSCFG_EXTICR4_EXTI12 ((uint16_t)0x000F)
#define	SYSCFG_EXTICR4_EXTI13 ((uint16_t)0x00F0)
#define	SYSCFG_EXTICR4_EXTI14 ((uint16_t)0x0F00)
#define	SYSCFG_EXTICR4_EXTI15 ((uint16_t)0xF000)
#define	SYSCFG_EXTICR4_EXTI12_PA ((uint16_t)0x0000)
	EXTI12 configuration.
#define	SYSCFG_EXTICR4_EXTI12_PB ((uint16_t)0x0001)
#define	SYSCFG_EXTICR4_EXTI12_PC ((uint16_t)0x0002)
#define	SYSCFG_EXTICR4_EXTI12_PD ((uint16_t)0x0003)
#define	SYSCFG_EXTICR4_EXTI12_PE ((uint16_t)0x0004)
#define	SYSCFG_EXTICR4_EXTI12_PF ((uint16_t)0x0006)
#define	SYSCFG_EXTICR4_EXTI12_PG ((uint16_t)0x0007)
#define	SYSCFG_EXTICR4_EXTI13_PA ((uint16_t)0x0000)
	EXTI13 configuration.
#define	SYSCFG_EXTICR4_EXTI13_PB ((uint16_t)0x0010)
#define	SYSCFG_EXTICR4_EXTI13_PC ((uint16_t)0x0020)
#define	SYSCFG_EXTICR4_EXTI13_PD ((uint16_t)0x0030)
#define	SYSCFG_EXTICR4_EXTI13_PE ((uint16_t)0x0040)
#define	SYSCFG_EXTICR4_EXTI13_PF ((uint16_t)0x0060)
#define	SYSCFG_EXTICR4_EXTI13_PG ((uint16_t)0x0070)
#define	SYSCFG_EXTICR4_EXTI14_PA ((uint16_t)0x0000)
	EXTI14 configuration.
#define	SYSCFG_EXTICR4_EXTI14_PB ((uint16_t)0x0100)
#define	SYSCFG_EXTICR4_EXTI14_PC ((uint16_t)0x0200)
#define	SYSCFG_EXTICR4_EXTI14_PD ((uint16_t)0x0300)
#define	SYSCFG_EXTICR4_EXTI14_PE ((uint16_t)0x0400)
#define	SYSCFG_EXTICR4_EXTI14_PF ((uint16_t)0x0600)
#define	SYSCFG_EXTICR4_EXTI14_PG ((uint16_t)0x0700)
#define	SYSCFG_EXTICR4_EXTI15_PA ((uint16_t)0x0000)
	EXTI15 configuration.
#define	SYSCFG_EXTICR4_EXTI15_PB ((uint16_t)0x1000)
#define	SYSCFG_EXTICR4_EXTI15_PC ((uint16_t)0x2000)
#define	SYSCFG_EXTICR4_EXTI15_PD ((uint16_t)0x3000)
#define	SYSCFG_EXTICR4_EXTI15_PE ((uint16_t)0x4000)
#define	SYSCFG_EXTICR4_EXTI15_PF ((uint16_t)0x6000)
#define	SYSCFG_EXTICR4_EXTI15_PG ((uint16_t)0x7000)
#define	RI_ICR_IC1Z ((uint32_t)0x0000000F)
#define	RI_ICR_IC1Z_0 ((uint32_t)0x00000001)
#define	RI_ICR_IC1Z_1 ((uint32_t)0x00000002)
#define	RI_ICR_IC1Z_2 ((uint32_t)0x00000004)
#define	RI_ICR_IC1Z_3 ((uint32_t)0x00000008)
#define	RI_ICR_IC2Z ((uint32_t)0x000000F0)
#define	RI_ICR_IC2Z_0 ((uint32_t)0x00000010)
#define	RI_ICR_IC2Z_1 ((uint32_t)0x00000020)
#define	RI_ICR_IC2Z_2 ((uint32_t)0x00000040)
#define	RI_ICR_IC2Z_3 ((uint32_t)0x00000080)
#define	RI_ICR_IC3Z ((uint32_t)0x00000F00)
#define	RI_ICR_IC3Z_0 ((uint32_t)0x00000100)
#define	RI_ICR_IC3Z_1 ((uint32_t)0x00000200)
#define	RI_ICR_IC3Z_2 ((uint32_t)0x00000400)
#define	RI_ICR_IC3Z_3 ((uint32_t)0x00000800)
#define	RI_ICR_IC4Z ((uint32_t)0x0000F000)
#define	RI_ICR_IC4Z_0 ((uint32_t)0x00001000)
#define	RI_ICR_IC4Z_1 ((uint32_t)0x00002000)
#define	RI_ICR_IC4Z_2 ((uint32_t)0x00004000)
#define	RI_ICR_IC4Z_3 ((uint32_t)0x00008000)
#define	RI_ICR_TIM ((uint32_t)0x00030000)
#define	RI_ICR_TIM_0 ((uint32_t)0x00010000)
#define	RI_ICR_TIM_1 ((uint32_t)0x00020000)
#define	RI_ICR_IC1 ((uint32_t)0x00040000)
#define	RI_ICR_IC2 ((uint32_t)0x00080000)
#define	RI_ICR_IC3 ((uint32_t)0x00100000)
#define	RI_ICR_IC4 ((uint32_t)0x00200000)
#define	RI_ASCR1_CH ((uint32_t)0x03FCFFFF)
#define	RI_ASCR1_CH_0 ((uint32_t)0x00000001)
#define	RI_ASCR1_CH_1 ((uint32_t)0x00000002)
#define	RI_ASCR1_CH_2 ((uint32_t)0x00000004)
#define	RI_ASCR1_CH_3 ((uint32_t)0x00000008)
#define	RI_ASCR1_CH_4 ((uint32_t)0x00000010)
#define	RI_ASCR1_CH_5 ((uint32_t)0x00000020)
#define	RI_ASCR1_CH_6 ((uint32_t)0x00000040)
#define	RI_ASCR1_CH_7 ((uint32_t)0x00000080)
#define	RI_ASCR1_CH_8 ((uint32_t)0x00000100)
#define	RI_ASCR1_CH_9 ((uint32_t)0x00000200)
#define	RI_ASCR1_CH_10 ((uint32_t)0x00000400)
#define	RI_ASCR1_CH_11 ((uint32_t)0x00000800)
#define	RI_ASCR1_CH_12 ((uint32_t)0x00001000)
#define	RI_ASCR1_CH_13 ((uint32_t)0x00002000)
#define	RI_ASCR1_CH_14 ((uint32_t)0x00004000)
#define	RI_ASCR1_CH_15 ((uint32_t)0x00008000)
#define	RI_ASCR1_CH_31 ((uint32_t)0x00010000)
#define	RI_ASCR1_CH_18 ((uint32_t)0x00040000)
#define	RI_ASCR1_CH_19 ((uint32_t)0x00080000)
#define	RI_ASCR1_CH_20 ((uint32_t)0x00100000)
#define	RI_ASCR1_CH_21 ((uint32_t)0x00200000)
#define	RI_ASCR1_CH_22 ((uint32_t)0x00400000)
#define	RI_ASCR1_CH_23 ((uint32_t)0x00800000)
#define	RI_ASCR1_CH_24 ((uint32_t)0x01000000)
#define	RI_ASCR1_CH_25 ((uint32_t)0x02000000)
#define	RI_ASCR1_VCOMP ((uint32_t)0x04000000)
#define	RI_ASCR1_CH_27 ((uint32_t)0x00400000)
#define	RI_ASCR1_CH_28 ((uint32_t)0x00800000)
#define	RI_ASCR1_CH_29 ((uint32_t)0x01000000)
#define	RI_ASCR1_CH_30 ((uint32_t)0x02000000)
#define	RI_ASCR1_SCM ((uint32_t)0x80000000)
#define	RI_ASCR2_GR10_1 ((uint32_t)0x00000001)
#define	RI_ASCR2_GR10_2 ((uint32_t)0x00000002)
#define	RI_ASCR2_GR10_3 ((uint32_t)0x00000004)
#define	RI_ASCR2_GR10_4 ((uint32_t)0x00000008)
#define	RI_ASCR2_GR6_1 ((uint32_t)0x00000010)
#define	RI_ASCR2_GR6_2 ((uint32_t)0x00000020)
#define	RI_ASCR2_GR5_1 ((uint32_t)0x00000040)
#define	RI_ASCR2_GR5_2 ((uint32_t)0x00000080)
#define	RI_ASCR2_GR5_3 ((uint32_t)0x00000100)
#define	RI_ASCR2_GR4_1 ((uint32_t)0x00000200)
#define	RI_ASCR2_GR4_2 ((uint32_t)0x00000400)
#define	RI_ASCR2_GR4_3 ((uint32_t)0x00000800)
#define	RI_ASCR2_GR4_4 ((uint32_t)0x00008000)
#define	RI_ASCR2_CH0b ((uint32_t)0x00010000)
#define	RI_ASCR2_CH1b ((uint32_t)0x00020000)
#define	RI_ASCR2_CH2b ((uint32_t)0x00040000)
#define	RI_ASCR2_CH3b ((uint32_t)0x00080000)
#define	RI_ASCR2_CH6b ((uint32_t)0x00100000)
#define	RI_ASCR2_CH7b ((uint32_t)0x00200000)
#define	RI_ASCR2_CH8b ((uint32_t)0x00400000)
#define	RI_ASCR2_CH9b ((uint32_t)0x00800000)
#define	RI_ASCR2_CH10b ((uint32_t)0x01000000)
#define	RI_ASCR2_CH11b ((uint32_t)0x02000000)
#define	RI_ASCR2_CH12b ((uint32_t)0x04000000)
#define	RI_ASCR2_GR6_3 ((uint32_t)0x08000000)
#define	RI_ASCR2_GR6_4 ((uint32_t)0x10000000)
#define	RI_ASCR2_GR5_4 ((uint32_t)0x20000000)
#define	RI_HYSCR1_PA ((uint32_t)0x0000FFFF)
#define	RI_HYSCR1_PA_0 ((uint32_t)0x00000001)
#define	RI_HYSCR1_PA_1 ((uint32_t)0x00000002)
#define	RI_HYSCR1_PA_2 ((uint32_t)0x00000004)
#define	RI_HYSCR1_PA_3 ((uint32_t)0x00000008)
#define	RI_HYSCR1_PA_4 ((uint32_t)0x00000010)
#define	RI_HYSCR1_PA_5 ((uint32_t)0x00000020)
#define	RI_HYSCR1_PA_6 ((uint32_t)0x00000040)
#define	RI_HYSCR1_PA_7 ((uint32_t)0x00000080)
#define	RI_HYSCR1_PA_8 ((uint32_t)0x00000100)
#define	RI_HYSCR1_PA_9 ((uint32_t)0x00000200)
#define	RI_HYSCR1_PA_10 ((uint32_t)0x00000400)
#define	RI_HYSCR1_PA_11 ((uint32_t)0x00000800)
#define	RI_HYSCR1_PA_12 ((uint32_t)0x00001000)
#define	RI_HYSCR1_PA_13 ((uint32_t)0x00002000)
#define	RI_HYSCR1_PA_14 ((uint32_t)0x00004000)
#define	RI_HYSCR1_PA_15 ((uint32_t)0x00008000)
#define	RI_HYSCR1_PB ((uint32_t)0xFFFF0000)
#define	RI_HYSCR1_PB_0 ((uint32_t)0x00010000)
#define	RI_HYSCR1_PB_1 ((uint32_t)0x00020000)
#define	RI_HYSCR1_PB_2 ((uint32_t)0x00040000)
#define	RI_HYSCR1_PB_3 ((uint32_t)0x00080000)
#define	RI_HYSCR1_PB_4 ((uint32_t)0x00100000)
#define	RI_HYSCR1_PB_5 ((uint32_t)0x00200000)
#define	RI_HYSCR1_PB_6 ((uint32_t)0x00400000)
#define	RI_HYSCR1_PB_7 ((uint32_t)0x00800000)
#define	RI_HYSCR1_PB_8 ((uint32_t)0x01000000)
#define	RI_HYSCR1_PB_9 ((uint32_t)0x02000000)
#define	RI_HYSCR1_PB_10 ((uint32_t)0x04000000)
#define	RI_HYSCR1_PB_11 ((uint32_t)0x08000000)
#define	RI_HYSCR1_PB_12 ((uint32_t)0x10000000)
#define	RI_HYSCR1_PB_13 ((uint32_t)0x20000000)
#define	RI_HYSCR1_PB_14 ((uint32_t)0x40000000)
#define	RI_HYSCR1_PB_15 ((uint32_t)0x80000000)
#define	RI_HYSCR2_PC ((uint32_t)0x0000FFFF)
#define	RI_HYSCR2_PC_0 ((uint32_t)0x00000001)
#define	RI_HYSCR2_PC_1 ((uint32_t)0x00000002)
#define	RI_HYSCR2_PC_2 ((uint32_t)0x00000004)
#define	RI_HYSCR2_PC_3 ((uint32_t)0x00000008)
#define	RI_HYSCR2_PC_4 ((uint32_t)0x00000010)
#define	RI_HYSCR2_PC_5 ((uint32_t)0x00000020)
#define	RI_HYSCR2_PC_6 ((uint32_t)0x00000040)
#define	RI_HYSCR2_PC_7 ((uint32_t)0x00000080)
#define	RI_HYSCR2_PC_8 ((uint32_t)0x00000100)
#define	RI_HYSCR2_PC_9 ((uint32_t)0x00000200)
#define	RI_HYSCR2_PC_10 ((uint32_t)0x00000400)
#define	RI_HYSCR2_PC_11 ((uint32_t)0x00000800)
#define	RI_HYSCR2_PC_12 ((uint32_t)0x00001000)
#define	RI_HYSCR2_PC_13 ((uint32_t)0x00002000)
#define	RI_HYSCR2_PC_14 ((uint32_t)0x00004000)
#define	RI_HYSCR2_PC_15 ((uint32_t)0x00008000)
#define	RI_HYSCR2_PD ((uint32_t)0xFFFF0000)
#define	RI_HYSCR2_PD_0 ((uint32_t)0x00010000)
#define	RI_HYSCR2_PD_1 ((uint32_t)0x00020000)
#define	RI_HYSCR2_PD_2 ((uint32_t)0x00040000)
#define	RI_HYSCR2_PD_3 ((uint32_t)0x00080000)
#define	RI_HYSCR2_PD_4 ((uint32_t)0x00100000)
#define	RI_HYSCR2_PD_5 ((uint32_t)0x00200000)
#define	RI_HYSCR2_PD_6 ((uint32_t)0x00400000)
#define	RI_HYSCR2_PD_7 ((uint32_t)0x00800000)
#define	RI_HYSCR2_PD_8 ((uint32_t)0x01000000)
#define	RI_HYSCR2_PD_9 ((uint32_t)0x02000000)
#define	RI_HYSCR2_PD_10 ((uint32_t)0x04000000)
#define	RI_HYSCR2_PD_11 ((uint32_t)0x08000000)
#define	RI_HYSCR2_PD_12 ((uint32_t)0x10000000)
#define	RI_HYSCR2_PD_13 ((uint32_t)0x20000000)
#define	RI_HYSCR2_PD_14 ((uint32_t)0x40000000)
#define	RI_HYSCR2_PD_15 ((uint32_t)0x80000000)
#define	RI_HYSCR2_PE ((uint32_t)0x0000FFFF)
#define	RI_HYSCR2_PE_0 ((uint32_t)0x00000001)
#define	RI_HYSCR2_PE_1 ((uint32_t)0x00000002)
#define	RI_HYSCR2_PE_2 ((uint32_t)0x00000004)
#define	RI_HYSCR2_PE_3 ((uint32_t)0x00000008)
#define	RI_HYSCR2_PE_4 ((uint32_t)0x00000010)
#define	RI_HYSCR2_PE_5 ((uint32_t)0x00000020)
#define	RI_HYSCR2_PE_6 ((uint32_t)0x00000040)
#define	RI_HYSCR2_PE_7 ((uint32_t)0x00000080)
#define	RI_HYSCR2_PE_8 ((uint32_t)0x00000100)
#define	RI_HYSCR2_PE_9 ((uint32_t)0x00000200)
#define	RI_HYSCR2_PE_10 ((uint32_t)0x00000400)
#define	RI_HYSCR2_PE_11 ((uint32_t)0x00000800)
#define	RI_HYSCR2_PE_12 ((uint32_t)0x00001000)
#define	RI_HYSCR2_PE_13 ((uint32_t)0x00002000)
#define	RI_HYSCR2_PE_14 ((uint32_t)0x00004000)
#define	RI_HYSCR2_PE_15 ((uint32_t)0x00008000)
#define	RI_HYSCR3_PF ((uint32_t)0xFFFF0000)
#define	RI_HYSCR3_PF_0 ((uint32_t)0x00010000)
#define	RI_HYSCR3_PF_1 ((uint32_t)0x00020000)
#define	RI_HYSCR3_PF_2 ((uint32_t)0x00040000)
#define	RI_HYSCR3_PF_3 ((uint32_t)0x00080000)
#define	RI_HYSCR3_PF_4 ((uint32_t)0x00100000)
#define	RI_HYSCR3_PF_5 ((uint32_t)0x00200000)
#define	RI_HYSCR3_PF_6 ((uint32_t)0x00400000)
#define	RI_HYSCR3_PF_7 ((uint32_t)0x00800000)
#define	RI_HYSCR3_PF_8 ((uint32_t)0x01000000)
#define	RI_HYSCR3_PF_9 ((uint32_t)0x02000000)
#define	RI_HYSCR3_PF_10 ((uint32_t)0x04000000)
#define	RI_HYSCR3_PF_11 ((uint32_t)0x08000000)
#define	RI_HYSCR3_PF_12 ((uint32_t)0x10000000)
#define	RI_HYSCR3_PF_13 ((uint32_t)0x20000000)
#define	RI_HYSCR3_PF_14 ((uint32_t)0x40000000)
#define	RI_HYSCR3_PF_15 ((uint32_t)0x80000000)
#define	RI_HYSCR4_PG ((uint32_t)0x0000FFFF)
#define	RI_HYSCR4_PG_0 ((uint32_t)0x00000001)
#define	RI_HYSCR4_PG_1 ((uint32_t)0x00000002)
#define	RI_HYSCR4_PG_2 ((uint32_t)0x00000004)
#define	RI_HYSCR4_PG_3 ((uint32_t)0x00000008)
#define	RI_HYSCR4_PG_4 ((uint32_t)0x00000010)
#define	RI_HYSCR4_PG_5 ((uint32_t)0x00000020)
#define	RI_HYSCR4_PG_6 ((uint32_t)0x00000040)
#define	RI_HYSCR4_PG_7 ((uint32_t)0x00000080)
#define	RI_HYSCR4_PG_8 ((uint32_t)0x00000100)
#define	RI_HYSCR4_PG_9 ((uint32_t)0x00000200)
#define	RI_HYSCR4_PG_10 ((uint32_t)0x00000400)
#define	RI_HYSCR4_PG_11 ((uint32_t)0x00000800)
#define	RI_HYSCR4_PG_12 ((uint32_t)0x00001000)
#define	RI_HYSCR4_PG_13 ((uint32_t)0x00002000)
#define	RI_HYSCR4_PG_14 ((uint32_t)0x00004000)
#define	RI_HYSCR4_PG_15 ((uint32_t)0x00008000)
#define	TIM_CR1_CEN ((uint16_t)0x0001)
#define	TIM_CR1_UDIS ((uint16_t)0x0002)
#define	TIM_CR1_URS ((uint16_t)0x0004)
#define	TIM_CR1_OPM ((uint16_t)0x0008)
#define	TIM_CR1_DIR ((uint16_t)0x0010)
#define	TIM_CR1_CMS ((uint16_t)0x0060)
#define	TIM_CR1_CMS_0 ((uint16_t)0x0020)
#define	TIM_CR1_CMS_1 ((uint16_t)0x0040)
#define	TIM_CR1_ARPE ((uint16_t)0x0080)
#define	TIM_CR1_CKD ((uint16_t)0x0300)
#define	TIM_CR1_CKD_0 ((uint16_t)0x0100)
#define	TIM_CR1_CKD_1 ((uint16_t)0x0200)
#define	TIM_CR2_CCDS ((uint16_t)0x0008)
#define	TIM_CR2_MMS ((uint16_t)0x0070)
#define	TIM_CR2_MMS_0 ((uint16_t)0x0010)
#define	TIM_CR2_MMS_1 ((uint16_t)0x0020)
#define	TIM_CR2_MMS_2 ((uint16_t)0x0040)
#define	TIM_CR2_TI1S ((uint16_t)0x0080)
#define	TIM_SMCR_SMS ((uint16_t)0x0007)
#define	TIM_SMCR_SMS_0 ((uint16_t)0x0001)
#define	TIM_SMCR_SMS_1 ((uint16_t)0x0002)
#define	TIM_SMCR_SMS_2 ((uint16_t)0x0004)
#define	TIM_SMCR_OCCS ((uint16_t)0x0008)
#define	TIM_SMCR_TS ((uint16_t)0x0070)
#define	TIM_SMCR_TS_0 ((uint16_t)0x0010)
#define	TIM_SMCR_TS_1 ((uint16_t)0x0020)
#define	TIM_SMCR_TS_2 ((uint16_t)0x0040)
#define	TIM_SMCR_MSM ((uint16_t)0x0080)
#define	TIM_SMCR_ETF ((uint16_t)0x0F00)
#define	TIM_SMCR_ETF_0 ((uint16_t)0x0100)
#define	TIM_SMCR_ETF_1 ((uint16_t)0x0200)
#define	TIM_SMCR_ETF_2 ((uint16_t)0x0400)
#define	TIM_SMCR_ETF_3 ((uint16_t)0x0800)
#define	TIM_SMCR_ETPS ((uint16_t)0x3000)
#define	TIM_SMCR_ETPS_0 ((uint16_t)0x1000)
#define	TIM_SMCR_ETPS_1 ((uint16_t)0x2000)
#define	TIM_SMCR_ECE ((uint16_t)0x4000)
#define	TIM_SMCR_ETP ((uint16_t)0x8000)
#define	TIM_DIER_UIE ((uint16_t)0x0001)
#define	TIM_DIER_CC1IE ((uint16_t)0x0002)
#define	TIM_DIER_CC2IE ((uint16_t)0x0004)
#define	TIM_DIER_CC3IE ((uint16_t)0x0008)
#define	TIM_DIER_CC4IE ((uint16_t)0x0010)
#define	TIM_DIER_TIE ((uint16_t)0x0040)
#define	TIM_DIER_UDE ((uint16_t)0x0100)
#define	TIM_DIER_CC1DE ((uint16_t)0x0200)
#define	TIM_DIER_CC2DE ((uint16_t)0x0400)
#define	TIM_DIER_CC3DE ((uint16_t)0x0800)
#define	TIM_DIER_CC4DE ((uint16_t)0x1000)
#define	TIM_DIER_TDE ((uint16_t)0x4000)
#define	TIM_SR_UIF ((uint16_t)0x0001)
#define	TIM_SR_CC1IF ((uint16_t)0x0002)
#define	TIM_SR_CC2IF ((uint16_t)0x0004)
#define	TIM_SR_CC3IF ((uint16_t)0x0008)
#define	TIM_SR_CC4IF ((uint16_t)0x0010)
#define	TIM_SR_TIF ((uint16_t)0x0040)
#define	TIM_SR_CC1OF ((uint16_t)0x0200)
#define	TIM_SR_CC2OF ((uint16_t)0x0400)
#define	TIM_SR_CC3OF ((uint16_t)0x0800)
#define	TIM_SR_CC4OF ((uint16_t)0x1000)
#define	TIM_EGR_UG ((uint8_t)0x01)
#define	TIM_EGR_CC1G ((uint8_t)0x02)
#define	TIM_EGR_CC2G ((uint8_t)0x04)
#define	TIM_EGR_CC3G ((uint8_t)0x08)
#define	TIM_EGR_CC4G ((uint8_t)0x10)
#define	TIM_EGR_TG ((uint8_t)0x40)
#define	TIM_CCMR1_CC1S ((uint16_t)0x0003)
#define	TIM_CCMR1_CC1S_0 ((uint16_t)0x0001)
#define	TIM_CCMR1_CC1S_1 ((uint16_t)0x0002)
#define	TIM_CCMR1_OC1FE ((uint16_t)0x0004)
#define	TIM_CCMR1_OC1PE ((uint16_t)0x0008)
#define	TIM_CCMR1_OC1M ((uint16_t)0x0070)
#define	TIM_CCMR1_OC1M_0 ((uint16_t)0x0010)
#define	TIM_CCMR1_OC1M_1 ((uint16_t)0x0020)
#define	TIM_CCMR1_OC1M_2 ((uint16_t)0x0040)
#define	TIM_CCMR1_OC1CE ((uint16_t)0x0080)
#define	TIM_CCMR1_CC2S ((uint16_t)0x0300)
#define	TIM_CCMR1_CC2S_0 ((uint16_t)0x0100)
#define	TIM_CCMR1_CC2S_1 ((uint16_t)0x0200)
#define	TIM_CCMR1_OC2FE ((uint16_t)0x0400)
#define	TIM_CCMR1_OC2PE ((uint16_t)0x0800)
#define	TIM_CCMR1_OC2M ((uint16_t)0x7000)
#define	TIM_CCMR1_OC2M_0 ((uint16_t)0x1000)
#define	TIM_CCMR1_OC2M_1 ((uint16_t)0x2000)
#define	TIM_CCMR1_OC2M_2 ((uint16_t)0x4000)
#define	TIM_CCMR1_OC2CE ((uint16_t)0x8000)
#define	TIM_CCMR1_IC1PSC ((uint16_t)0x000C)
#define	TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004)
#define	TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008)
#define	TIM_CCMR1_IC1F ((uint16_t)0x00F0)
#define	TIM_CCMR1_IC1F_0 ((uint16_t)0x0010)
#define	TIM_CCMR1_IC1F_1 ((uint16_t)0x0020)
#define	TIM_CCMR1_IC1F_2 ((uint16_t)0x0040)
#define	TIM_CCMR1_IC1F_3 ((uint16_t)0x0080)
#define	TIM_CCMR1_IC2PSC ((uint16_t)0x0C00)
#define	TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400)
#define	TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800)
#define	TIM_CCMR1_IC2F ((uint16_t)0xF000)
#define	TIM_CCMR1_IC2F_0 ((uint16_t)0x1000)
#define	TIM_CCMR1_IC2F_1 ((uint16_t)0x2000)
#define	TIM_CCMR1_IC2F_2 ((uint16_t)0x4000)
#define	TIM_CCMR1_IC2F_3 ((uint16_t)0x8000)
#define	TIM_CCMR2_CC3S ((uint16_t)0x0003)
#define	TIM_CCMR2_CC3S_0 ((uint16_t)0x0001)
#define	TIM_CCMR2_CC3S_1 ((uint16_t)0x0002)
#define	TIM_CCMR2_OC3FE ((uint16_t)0x0004)
#define	TIM_CCMR2_OC3PE ((uint16_t)0x0008)
#define	TIM_CCMR2_OC3M ((uint16_t)0x0070)
#define	TIM_CCMR2_OC3M_0 ((uint16_t)0x0010)
#define	TIM_CCMR2_OC3M_1 ((uint16_t)0x0020)
#define	TIM_CCMR2_OC3M_2 ((uint16_t)0x0040)
#define	TIM_CCMR2_OC3CE ((uint16_t)0x0080)
#define	TIM_CCMR2_CC4S ((uint16_t)0x0300)
#define	TIM_CCMR2_CC4S_0 ((uint16_t)0x0100)
#define	TIM_CCMR2_CC4S_1 ((uint16_t)0x0200)
#define	TIM_CCMR2_OC4FE ((uint16_t)0x0400)
#define	TIM_CCMR2_OC4PE ((uint16_t)0x0800)
#define	TIM_CCMR2_OC4M ((uint16_t)0x7000)
#define	TIM_CCMR2_OC4M_0 ((uint16_t)0x1000)
#define	TIM_CCMR2_OC4M_1 ((uint16_t)0x2000)
#define	TIM_CCMR2_OC4M_2 ((uint16_t)0x4000)
#define	TIM_CCMR2_OC4CE ((uint16_t)0x8000)
#define	TIM_CCMR2_IC3PSC ((uint16_t)0x000C)
#define	TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004)
#define	TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008)
#define	TIM_CCMR2_IC3F ((uint16_t)0x00F0)
#define	TIM_CCMR2_IC3F_0 ((uint16_t)0x0010)
#define	TIM_CCMR2_IC3F_1 ((uint16_t)0x0020)
#define	TIM_CCMR2_IC3F_2 ((uint16_t)0x0040)
#define	TIM_CCMR2_IC3F_3 ((uint16_t)0x0080)
#define	TIM_CCMR2_IC4PSC ((uint16_t)0x0C00)
#define	TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400)
#define	TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800)
#define	TIM_CCMR2_IC4F ((uint16_t)0xF000)
#define	TIM_CCMR2_IC4F_0 ((uint16_t)0x1000)
#define	TIM_CCMR2_IC4F_1 ((uint16_t)0x2000)
#define	TIM_CCMR2_IC4F_2 ((uint16_t)0x4000)
#define	TIM_CCMR2_IC4F_3 ((uint16_t)0x8000)
#define	TIM_CCER_CC1E ((uint16_t)0x0001)
#define	TIM_CCER_CC1P ((uint16_t)0x0002)
#define	TIM_CCER_CC1NP ((uint16_t)0x0008)
#define	TIM_CCER_CC2E ((uint16_t)0x0010)
#define	TIM_CCER_CC2P ((uint16_t)0x0020)
#define	TIM_CCER_CC2NP ((uint16_t)0x0080)
#define	TIM_CCER_CC3E ((uint16_t)0x0100)
#define	TIM_CCER_CC3P ((uint16_t)0x0200)
#define	TIM_CCER_CC3NP ((uint16_t)0x0800)
#define	TIM_CCER_CC4E ((uint16_t)0x1000)
#define	TIM_CCER_CC4P ((uint16_t)0x2000)
#define	TIM_CCER_CC4NP ((uint16_t)0x8000)
#define	TIM_CNT_CNT ((uint16_t)0xFFFF)
#define	TIM_PSC_PSC ((uint16_t)0xFFFF)
#define	TIM_ARR_ARR ((uint16_t)0xFFFF)
#define	TIM_CCR1_CCR1 ((uint16_t)0xFFFF)
#define	TIM_CCR2_CCR2 ((uint16_t)0xFFFF)
#define	TIM_CCR3_CCR3 ((uint16_t)0xFFFF)
#define	TIM_CCR4_CCR4 ((uint16_t)0xFFFF)
#define	TIM_DCR_DBA ((uint16_t)0x001F)
#define	TIM_DCR_DBA_0 ((uint16_t)0x0001)
#define	TIM_DCR_DBA_1 ((uint16_t)0x0002)
#define	TIM_DCR_DBA_2 ((uint16_t)0x0004)
#define	TIM_DCR_DBA_3 ((uint16_t)0x0008)
#define	TIM_DCR_DBA_4 ((uint16_t)0x0010)
#define	TIM_DCR_DBL ((uint16_t)0x1F00)
#define	TIM_DCR_DBL_0 ((uint16_t)0x0100)
#define	TIM_DCR_DBL_1 ((uint16_t)0x0200)
#define	TIM_DCR_DBL_2 ((uint16_t)0x0400)
#define	TIM_DCR_DBL_3 ((uint16_t)0x0800)
#define	TIM_DCR_DBL_4 ((uint16_t)0x1000)
#define	TIM_DMAR_DMAB ((uint16_t)0xFFFF)
#define	TIM_OR_TI1RMP ((uint16_t)0x0003)
#define	TIM_OR_TI1RMP_0 ((uint16_t)0x0001)
#define	TIM_OR_TI1RMP_1 ((uint16_t)0x0002)
#define	USART_SR_PE ((uint16_t)0x0001)
#define	USART_SR_FE ((uint16_t)0x0002)
#define	USART_SR_NE ((uint16_t)0x0004)
#define	USART_SR_ORE ((uint16_t)0x0008)
#define	USART_SR_IDLE ((uint16_t)0x0010)
#define	USART_SR_RXNE ((uint16_t)0x0020)
#define	USART_SR_TC ((uint16_t)0x0040)
#define	USART_SR_TXE ((uint16_t)0x0080)
#define	USART_SR_LBD ((uint16_t)0x0100)
#define	USART_SR_CTS ((uint16_t)0x0200)
#define	USART_DR_DR ((uint16_t)0x01FF)
#define	USART_BRR_DIV_FRACTION ((uint16_t)0x000F)
#define	USART_BRR_DIV_MANTISSA ((uint16_t)0xFFF0)
#define	USART_CR1_SBK ((uint16_t)0x0001)
#define	USART_CR1_RWU ((uint16_t)0x0002)
#define	USART_CR1_RE ((uint16_t)0x0004)
#define	USART_CR1_TE ((uint16_t)0x0008)
#define	USART_CR1_IDLEIE ((uint16_t)0x0010)
#define	USART_CR1_RXNEIE ((uint16_t)0x0020)
#define	USART_CR1_TCIE ((uint16_t)0x0040)
#define	USART_CR1_TXEIE ((uint16_t)0x0080)
#define	USART_CR1_PEIE ((uint16_t)0x0100)
#define	USART_CR1_PS ((uint16_t)0x0200)
#define	USART_CR1_PCE ((uint16_t)0x0400)
#define	USART_CR1_WAKE ((uint16_t)0x0800)
#define	USART_CR1_M ((uint16_t)0x1000)
#define	USART_CR1_UE ((uint16_t)0x2000)
#define	USART_CR1_OVER8 ((uint16_t)0x8000)
#define	USART_CR2_ADD ((uint16_t)0x000F)
#define	USART_CR2_LBDL ((uint16_t)0x0020)
#define	USART_CR2_LBDIE ((uint16_t)0x0040)
#define	USART_CR2_LBCL ((uint16_t)0x0100)
#define	USART_CR2_CPHA ((uint16_t)0x0200)
#define	USART_CR2_CPOL ((uint16_t)0x0400)
#define	USART_CR2_CLKEN ((uint16_t)0x0800)
#define	USART_CR2_STOP ((uint16_t)0x3000)
#define	USART_CR2_STOP_0 ((uint16_t)0x1000)
#define	USART_CR2_STOP_1 ((uint16_t)0x2000)
#define	USART_CR2_LINEN ((uint16_t)0x4000)
#define	USART_CR3_EIE ((uint16_t)0x0001)
#define	USART_CR3_IREN ((uint16_t)0x0002)
#define	USART_CR3_IRLP ((uint16_t)0x0004)
#define	USART_CR3_HDSEL ((uint16_t)0x0008)
#define	USART_CR3_NACK ((uint16_t)0x0010)
#define	USART_CR3_SCEN ((uint16_t)0x0020)
#define	USART_CR3_DMAR ((uint16_t)0x0040)
#define	USART_CR3_DMAT ((uint16_t)0x0080)
#define	USART_CR3_RTSE ((uint16_t)0x0100)
#define	USART_CR3_CTSE ((uint16_t)0x0200)
#define	USART_CR3_CTSIE ((uint16_t)0x0400)
#define	USART_CR3_ONEBIT ((uint16_t)0x0800)
#define	USART_GTPR_PSC ((uint16_t)0x00FF)
#define	USART_GTPR_PSC_0 ((uint16_t)0x0001)
#define	USART_GTPR_PSC_1 ((uint16_t)0x0002)
#define	USART_GTPR_PSC_2 ((uint16_t)0x0004)
#define	USART_GTPR_PSC_3 ((uint16_t)0x0008)
#define	USART_GTPR_PSC_4 ((uint16_t)0x0010)
#define	USART_GTPR_PSC_5 ((uint16_t)0x0020)
#define	USART_GTPR_PSC_6 ((uint16_t)0x0040)
#define	USART_GTPR_PSC_7 ((uint16_t)0x0080)
#define	USART_GTPR_GT ((uint16_t)0xFF00)
#define	USB_EP0R_EA ((uint16_t)0x000F)
#define	USB_EP0R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP0R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP0R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP0R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP0R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP0R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP0R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP0R_SETUP ((uint16_t)0x0800)
#define	USB_EP0R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP0R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP0R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP0R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP0R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP1R_EA ((uint16_t)0x000F)
#define	USB_EP1R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP1R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP1R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP1R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP1R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP1R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP1R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP1R_SETUP ((uint16_t)0x0800)
#define	USB_EP1R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP1R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP1R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP1R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP1R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP2R_EA ((uint16_t)0x000F)
#define	USB_EP2R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP2R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP2R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP2R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP2R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP2R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP2R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP2R_SETUP ((uint16_t)0x0800)
#define	USB_EP2R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP2R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP2R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP2R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP2R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP3R_EA ((uint16_t)0x000F)
#define	USB_EP3R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP3R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP3R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP3R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP3R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP3R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP3R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP3R_SETUP ((uint16_t)0x0800)
#define	USB_EP3R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP3R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP3R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP3R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP3R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP4R_EA ((uint16_t)0x000F)
#define	USB_EP4R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP4R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP4R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP4R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP4R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP4R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP4R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP4R_SETUP ((uint16_t)0x0800)
#define	USB_EP4R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP4R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP4R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP4R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP4R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP5R_EA ((uint16_t)0x000F)
#define	USB_EP5R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP5R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP5R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP5R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP5R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP5R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP5R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP5R_SETUP ((uint16_t)0x0800)
#define	USB_EP5R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP5R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP5R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP5R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP5R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP6R_EA ((uint16_t)0x000F)
#define	USB_EP6R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP6R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP6R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP6R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP6R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP6R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP6R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP6R_SETUP ((uint16_t)0x0800)
#define	USB_EP6R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP6R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP6R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP6R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP6R_CTR_RX ((uint16_t)0x8000)
#define	USB_EP7R_EA ((uint16_t)0x000F)
#define	USB_EP7R_STAT_TX ((uint16_t)0x0030)
#define	USB_EP7R_STAT_TX_0 ((uint16_t)0x0010)
#define	USB_EP7R_STAT_TX_1 ((uint16_t)0x0020)
#define	USB_EP7R_DTOG_TX ((uint16_t)0x0040)
#define	USB_EP7R_CTR_TX ((uint16_t)0x0080)
#define	USB_EP7R_EP_KIND ((uint16_t)0x0100)
#define	USB_EP7R_EP_TYPE ((uint16_t)0x0600)
#define	USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200)
#define	USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400)
#define	USB_EP7R_SETUP ((uint16_t)0x0800)
#define	USB_EP7R_STAT_RX ((uint16_t)0x3000)
#define	USB_EP7R_STAT_RX_0 ((uint16_t)0x1000)
#define	USB_EP7R_STAT_RX_1 ((uint16_t)0x2000)
#define	USB_EP7R_DTOG_RX ((uint16_t)0x4000)
#define	USB_EP7R_CTR_RX ((uint16_t)0x8000)
#define	USB_CNTR_FRES ((uint16_t)0x0001)
#define	USB_CNTR_PDWN ((uint16_t)0x0002)
#define	USB_CNTR_LP_MODE ((uint16_t)0x0004)
#define	USB_CNTR_FSUSP ((uint16_t)0x0008)
#define	USB_CNTR_RESUME ((uint16_t)0x0010)
#define	USB_CNTR_ESOFM ((uint16_t)0x0100)
#define	USB_CNTR_SOFM ((uint16_t)0x0200)
#define	USB_CNTR_RESETM ((uint16_t)0x0400)
#define	USB_CNTR_SUSPM ((uint16_t)0x0800)
#define	USB_CNTR_WKUPM ((uint16_t)0x1000)
#define	USB_CNTR_ERRM ((uint16_t)0x2000)
#define	USB_CNTR_PMAOVRM ((uint16_t)0x4000)
#define	USB_CNTR_CTRM ((uint16_t)0x8000)
#define	USB_ISTR_EP_ID ((uint16_t)0x000F)
#define	USB_ISTR_DIR ((uint16_t)0x0010)
#define	USB_ISTR_ESOF ((uint16_t)0x0100)
#define	USB_ISTR_SOF ((uint16_t)0x0200)
#define	USB_ISTR_RESET ((uint16_t)0x0400)
#define	USB_ISTR_SUSP ((uint16_t)0x0800)
#define	USB_ISTR_WKUP ((uint16_t)0x1000)
#define	USB_ISTR_ERR ((uint16_t)0x2000)
#define	USB_ISTR_PMAOVR ((uint16_t)0x4000)
#define	USB_ISTR_CTR ((uint16_t)0x8000)
#define	USB_FNR_FN ((uint16_t)0x07FF)
#define	USB_FNR_LSOF ((uint16_t)0x1800)
#define	USB_FNR_LCK ((uint16_t)0x2000)
#define	USB_FNR_RXDM ((uint16_t)0x4000)
#define	USB_FNR_RXDP ((uint16_t)0x8000)
#define	USB_DADDR_ADD ((uint8_t)0x7F)
#define	USB_DADDR_ADD0 ((uint8_t)0x01)
#define	USB_DADDR_ADD1 ((uint8_t)0x02)
#define	USB_DADDR_ADD2 ((uint8_t)0x04)
#define	USB_DADDR_ADD3 ((uint8_t)0x08)
#define	USB_DADDR_ADD4 ((uint8_t)0x10)
#define	USB_DADDR_ADD5 ((uint8_t)0x20)
#define	USB_DADDR_ADD6 ((uint8_t)0x40)
#define	USB_DADDR_EF ((uint8_t)0x80)
#define	USB_BTABLE_BTABLE ((uint16_t)0xFFF8)
#define	USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE)
#define	USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE)
#define	USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE)
#define	USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE)
#define	USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE)
#define	USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE)
#define	USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE)
#define	USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE)
#define	USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF)
#define	USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF)
#define	USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF)
#define	USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF)
#define	USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF)
#define	USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF)
#define	USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF)
#define	USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF)
#define	USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF)
#define	USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000)
#define	USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000)
#define	USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE)
#define	USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE)
#define	USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE)
#define	USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE)
#define	USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE)
#define	USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE)
#define	USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE)
#define	USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE)
#define	USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF)
#define	USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF)
#define	USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF)
#define	USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF)
#define	USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF)
#define	USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF)
#define	USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF)
#define	USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF)
#define	USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00)
#define	USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400)
#define	USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800)
#define	USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000)
#define	USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000)
#define	USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000)
#define	USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000)
#define	USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF)
#define	USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)
#define	USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)
#define	USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)
#define	USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)
#define	USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)
#define	USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)
#define	USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000)
#define	USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000)
#define	USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)
#define	USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)
#define	USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)
#define	USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)
#define	USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)
#define	USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)
#define	USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000)
#define	WWDG_CR_T ((uint8_t)0x7F)
#define	WWDG_CR_T0 ((uint8_t)0x01)
#define	WWDG_CR_T1 ((uint8_t)0x02)
#define	WWDG_CR_T2 ((uint8_t)0x04)
#define	WWDG_CR_T3 ((uint8_t)0x08)
#define	WWDG_CR_T4 ((uint8_t)0x10)
#define	WWDG_CR_T5 ((uint8_t)0x20)
#define	WWDG_CR_T6 ((uint8_t)0x40)
#define	WWDG_CR_WDGA ((uint8_t)0x80)
#define	WWDG_CFR_W ((uint16_t)0x007F)
#define	WWDG_CFR_W0 ((uint16_t)0x0001)
#define	WWDG_CFR_W1 ((uint16_t)0x0002)
#define	WWDG_CFR_W2 ((uint16_t)0x0004)
#define	WWDG_CFR_W3 ((uint16_t)0x0008)
#define	WWDG_CFR_W4 ((uint16_t)0x0010)
#define	WWDG_CFR_W5 ((uint16_t)0x0020)
#define	WWDG_CFR_W6 ((uint16_t)0x0040)
#define	WWDG_CFR_WDGTB ((uint16_t)0x0180)
#define	WWDG_CFR_WDGTB0 ((uint16_t)0x0080)
#define	WWDG_CFR_WDGTB1 ((uint16_t)0x0100)
#define	WWDG_CFR_EWI ((uint16_t)0x0200)
#define	WWDG_SR_EWIF ((uint8_t)0x01)
#define	SysTick_CTRL_ENABLE ((uint32_t)0x00000001)
#define	SysTick_CTRL_TICKINT ((uint32_t)0x00000002)
#define	SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004)
#define	SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000)
#define	SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF)
#define	SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF)
#define	SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF)
#define	SysTick_CALIB_SKEW ((uint32_t)0x40000000)
#define	SysTick_CALIB_NOREF ((uint32_t)0x80000000)
#define	NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF)
#define	NVIC_ISER_SETENA_0 ((uint32_t)0x00000001)
#define	NVIC_ISER_SETENA_1 ((uint32_t)0x00000002)
#define	NVIC_ISER_SETENA_2 ((uint32_t)0x00000004)
#define	NVIC_ISER_SETENA_3 ((uint32_t)0x00000008)
#define	NVIC_ISER_SETENA_4 ((uint32_t)0x00000010)
#define	NVIC_ISER_SETENA_5 ((uint32_t)0x00000020)
#define	NVIC_ISER_SETENA_6 ((uint32_t)0x00000040)
#define	NVIC_ISER_SETENA_7 ((uint32_t)0x00000080)
#define	NVIC_ISER_SETENA_8 ((uint32_t)0x00000100)
#define	NVIC_ISER_SETENA_9 ((uint32_t)0x00000200)
#define	NVIC_ISER_SETENA_10 ((uint32_t)0x00000400)
#define	NVIC_ISER_SETENA_11 ((uint32_t)0x00000800)
#define	NVIC_ISER_SETENA_12 ((uint32_t)0x00001000)
#define	NVIC_ISER_SETENA_13 ((uint32_t)0x00002000)
#define	NVIC_ISER_SETENA_14 ((uint32_t)0x00004000)
#define	NVIC_ISER_SETENA_15 ((uint32_t)0x00008000)
#define	NVIC_ISER_SETENA_16 ((uint32_t)0x00010000)
#define	NVIC_ISER_SETENA_17 ((uint32_t)0x00020000)
#define	NVIC_ISER_SETENA_18 ((uint32_t)0x00040000)
#define	NVIC_ISER_SETENA_19 ((uint32_t)0x00080000)
#define	NVIC_ISER_SETENA_20 ((uint32_t)0x00100000)
#define	NVIC_ISER_SETENA_21 ((uint32_t)0x00200000)
#define	NVIC_ISER_SETENA_22 ((uint32_t)0x00400000)
#define	NVIC_ISER_SETENA_23 ((uint32_t)0x00800000)
#define	NVIC_ISER_SETENA_24 ((uint32_t)0x01000000)
#define	NVIC_ISER_SETENA_25 ((uint32_t)0x02000000)
#define	NVIC_ISER_SETENA_26 ((uint32_t)0x04000000)
#define	NVIC_ISER_SETENA_27 ((uint32_t)0x08000000)
#define	NVIC_ISER_SETENA_28 ((uint32_t)0x10000000)
#define	NVIC_ISER_SETENA_29 ((uint32_t)0x20000000)
#define	NVIC_ISER_SETENA_30 ((uint32_t)0x40000000)
#define	NVIC_ISER_SETENA_31 ((uint32_t)0x80000000)
#define	NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF)
#define	NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001)
#define	NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002)
#define	NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004)
#define	NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008)
#define	NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010)
#define	NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020)
#define	NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040)
#define	NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080)
#define	NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100)
#define	NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200)
#define	NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400)
#define	NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800)
#define	NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000)
#define	NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000)
#define	NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000)
#define	NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000)
#define	NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000)
#define	NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000)
#define	NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000)
#define	NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000)
#define	NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000)
#define	NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000)
#define	NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000)
#define	NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000)
#define	NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000)
#define	NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000)
#define	NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000)
#define	NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000)
#define	NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000)
#define	NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000)
#define	NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000)
#define	NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000)
#define	NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF)
#define	NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001)
#define	NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002)
#define	NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004)
#define	NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008)
#define	NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010)
#define	NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020)
#define	NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040)
#define	NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080)
#define	NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100)
#define	NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200)
#define	NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400)
#define	NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800)
#define	NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000)
#define	NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000)
#define	NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000)
#define	NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000)
#define	NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000)
#define	NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000)
#define	NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000)
#define	NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000)
#define	NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000)
#define	NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000)
#define	NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000)
#define	NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000)
#define	NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000)
#define	NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000)
#define	NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000)
#define	NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000)
#define	NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000)
#define	NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000)
#define	NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000)
#define	NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000)
#define	NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF)
#define	NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001)
#define	NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002)
#define	NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004)
#define	NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008)
#define	NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010)
#define	NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020)
#define	NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040)
#define	NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080)
#define	NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100)
#define	NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200)
#define	NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400)
#define	NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800)
#define	NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000)
#define	NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000)
#define	NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000)
#define	NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000)
#define	NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000)
#define	NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000)
#define	NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000)
#define	NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000)
#define	NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000)
#define	NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000)
#define	NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000)
#define	NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000)
#define	NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000)
#define	NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000)
#define	NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000)
#define	NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000)
#define	NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000)
#define	NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000)
#define	NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000)
#define	NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000)
#define	NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF)
#define	NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001)
#define	NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002)
#define	NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004)
#define	NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008)
#define	NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010)
#define	NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020)
#define	NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040)
#define	NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080)
#define	NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100)
#define	NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200)
#define	NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400)
#define	NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800)
#define	NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000)
#define	NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000)
#define	NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000)
#define	NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000)
#define	NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000)
#define	NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000)
#define	NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000)
#define	NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000)
#define	NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000)
#define	NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000)
#define	NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000)
#define	NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000)
#define	NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000)
#define	NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000)
#define	NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000)
#define	NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000)
#define	NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000)
#define	NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000)
#define	NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000)
#define	NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000)
#define	NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF)
#define	NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00)
#define	NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000)
#define	NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000)
#define	NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF)
#define	NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00)
#define	NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000)
#define	NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000)
#define	NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF)
#define	NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00)
#define	NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000)
#define	NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000)
#define	NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF)
#define	NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00)
#define	NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000)
#define	NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000)
#define	NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF)
#define	NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00)
#define	NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000)
#define	NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000)
#define	NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF)
#define	NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00)
#define	NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000)
#define	NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000)
#define	NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF)
#define	NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00)
#define	NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000)
#define	NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000)
#define	NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF)
#define	NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00)
#define	NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000)
#define	NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000)
#define	SCB_CPUID_REVISION ((uint32_t)0x0000000F)
#define	SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0)
#define	SCB_CPUID_Constant ((uint32_t)0x000F0000)
#define	SCB_CPUID_VARIANT ((uint32_t)0x00F00000)
#define	SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000)
#define	SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF)
#define	SCB_ICSR_RETTOBASE ((uint32_t)0x00000800)
#define	SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000)
#define	SCB_ICSR_ISRPENDING ((uint32_t)0x00400000)
#define	SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000)
#define	SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000)
#define	SCB_ICSR_PENDSTSET ((uint32_t)0x04000000)
#define	SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000)
#define	SCB_ICSR_PENDSVSET ((uint32_t)0x10000000)
#define	SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000)
#define	SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80)
#define	SCB_VTOR_TBLBASE ((uint32_t)0x20000000)
#define	SCB_AIRCR_VECTRESET ((uint32_t)0x00000001)
#define	SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002)
#define	SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004)
#define	SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700)
#define	SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100)
#define	SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200)
#define	SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400)
#define	SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000)
#define	SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100)
#define	SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200)
#define	SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300)
#define	SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400)
#define	SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500)
#define	SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600)
#define	SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700)
#define	SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000)
#define	SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000)
#define	SCB_SCR_SLEEPONEXIT ((uint8_t)0x02)
#define	SCB_SCR_SLEEPDEEP ((uint8_t)0x04)
#define	SCB_SCR_SEVONPEND ((uint8_t)0x10)
#define	SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001)
#define	SCB_CCR_USERSETMPEND ((uint16_t)0x0002)
#define	SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008)
#define	SCB_CCR_DIV_0_TRP ((uint16_t)0x0010)
#define	SCB_CCR_BFHFNMIGN ((uint16_t)0x0100)
#define	SCB_CCR_STKALIGN ((uint16_t)0x0200)
#define	SCB_SHPR_PRI_N ((uint32_t)0x000000FF)
#define	SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00)
#define	SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000)
#define	SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000)
#define	SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001)
#define	SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002)
#define	SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008)
#define	SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080)
#define	SCB_SHCSR_MONITORACT ((uint32_t)0x00000100)
#define	SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400)
#define	SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800)
#define	SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000)
#define	SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000)
#define	SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000)
#define	SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000)
#define	SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000)
#define	SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000)
#define	SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000)
#define	SCB_CFSR_IACCVIOL ((uint32_t)0x00000001)
#define	SCB_CFSR_DACCVIOL ((uint32_t)0x00000002)
#define	SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008)
#define	SCB_CFSR_MSTKERR ((uint32_t)0x00000010)
#define	SCB_CFSR_MMARVALID ((uint32_t)0x00000080)
#define	SCB_CFSR_IBUSERR ((uint32_t)0x00000100)
#define	SCB_CFSR_PRECISERR ((uint32_t)0x00000200)
#define	SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400)
#define	SCB_CFSR_UNSTKERR ((uint32_t)0x00000800)
#define	SCB_CFSR_STKERR ((uint32_t)0x00001000)
#define	SCB_CFSR_BFARVALID ((uint32_t)0x00008000)
#define	SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000)
#define	SCB_CFSR_INVSTATE ((uint32_t)0x00020000)
#define	SCB_CFSR_INVPC ((uint32_t)0x00040000)
#define	SCB_CFSR_NOCP ((uint32_t)0x00080000)
#define	SCB_CFSR_UNALIGNED ((uint32_t)0x01000000)
#define	SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000)
#define	SCB_HFSR_VECTTBL ((uint32_t)0x00000002)
#define	SCB_HFSR_FORCED ((uint32_t)0x40000000)
#define	SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000)
#define	SCB_DFSR_HALTED ((uint8_t)0x01)
#define	SCB_DFSR_BKPT ((uint8_t)0x02)
#define	SCB_DFSR_DWTTRAP ((uint8_t)0x04)
#define	SCB_DFSR_VCATCH ((uint8_t)0x08)
#define	SCB_DFSR_EXTERNAL ((uint8_t)0x10)
#define	SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF)
#define	SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF)
#define	SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF)
#define	SET_BIT(REG, BIT) ((REG) \|= (BIT))
#define	CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define	READ_BIT(REG, BIT) ((REG) & (BIT))
#define	CLEAR_REG(REG) ((REG) = (0x0))
#define	WRITE_REG(REG, VAL) ((REG) = (VAL))
#define	READ_REG(REG) ((REG))
#define	MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) \| (SETMASK)))
Typedefs
typedef enum IRQn	IRQn_Type
typedef enum FlagStatus	ITStatus
Enumerations
enum	IRQn { NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, IROn_SUPC = AT91C_ID_SUPC, IROn_RSTC = AT91C_ID_RSTC, IROn_RTC = AT91C_ID_RTC, IROn_RTT = AT91C_ID_RTT, IROn_WDG = AT91C_ID_WDG, IROn_PMC = AT91C_ID_PMC, IROn_EFC0 = AT91C_ID_EFC0, IROn_EFC1 = AT91C_ID_EFC1, IROn_DBGU = AT91C_ID_DBGU, IROn_HSMC4 = AT91C_ID_HSMC4, IROn_PIOA = AT91C_ID_PIOA, IROn_PIOB = AT91C_ID_PIOB, IROn_PIOC = AT91C_ID_PIOC, IROn_US0 = AT91C_ID_US0, IROn_US1 = AT91C_ID_US1, IROn_US2 = AT91C_ID_US2, IROn_US3 = AT91C_ID_US3, IROn_MCI0 = AT91C_ID_MCI0, IROn_TWI0 = AT91C_ID_TWI0, IROn_TWI1 = AT91C_ID_TWI1, IROn_SPI0 = AT91C_ID_SPI0, IROn_SSC0 = AT91C_ID_SSC0, IROn_TC0 = AT91C_ID_TC0, IROn_TC1 = AT91C_ID_TC1, IROn_TC2 = AT91C_ID_TC2, IROn_PWMC = AT91C_ID_PWMC, IROn_ADCC0 = AT91C_ID_ADCC0, IROn_ADCC1 = AT91C_ID_ADCC1, IROn_HDMA = AT91C_ID_HDMA, IROn_UDPHS = AT91C_ID_UDPHS, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3, TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7, UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11, I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15, PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19, EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23, USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27, ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31, PLL1_IRQn = 32, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3, TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7, UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11, I2C2_IRQn = 12, Reserved0_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15, PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19, EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23, USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27, ENET_IRQn = 28, MCI_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31, PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34, UART4_IRQn = 35, SSP2_IRQn = 36, LCD_IRQn = 37, GPIO_IRQn = 38, PWM0_IRQn = 39, EEPROM_IRQn = 40, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0, PVD_IRQn = 1, TAMPER_IRQn = 2, RTC_IRQn = 3, FLASH_IRQn = 4, RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8, EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Channel1_IRQn = 11, DMA1_Channel2_IRQn = 12, DMA1_Channel3_IRQn = 13, DMA1_Channel4_IRQn = 14, DMA1_Channel5_IRQn = 15, DMA1_Channel6_IRQn = 16, DMA1_Channel7_IRQn = 17, NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0, PVD_IRQn = 1, TAMP_STAMP_IRQn = 2, RTC_WKUP_IRQn = 3, FLASH_IRQn = 4, RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8, EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Stream0_IRQn = 11, DMA1_Stream1_IRQn = 12, DMA1_Stream2_IRQn = 13, DMA1_Stream3_IRQn = 14, DMA1_Stream4_IRQn = 15, DMA1_Stream5_IRQn = 16, DMA1_Stream6_IRQn = 17, ADC_IRQn = 18, CAN1_TX_IRQn = 19, CAN1_RX0_IRQn = 20, CAN1_RX1_IRQn = 21, CAN1_SCE_IRQn = 22, EXTI9_5_IRQn = 23, TIM1_BRK_TIM9_IRQn = 24, TIM1_UP_TIM10_IRQn = 25, TIM1_TRG_COM_TIM11_IRQn = 26, TIM1_CC_IRQn = 27, TIM2_IRQn = 28, TIM3_IRQn = 29, TIM4_IRQn = 30, I2C1_EV_IRQn = 31, I2C1_ER_IRQn = 32, I2C2_EV_IRQn = 33, I2C2_ER_IRQn = 34, SPI1_IRQn = 35, SPI2_IRQn = 36, USART1_IRQn = 37, USART2_IRQn = 38, USART3_IRQn = 39, EXTI15_10_IRQn = 40, RTC_Alarm_IRQn = 41, OTG_FS_WKUP_IRQn = 42, TIM8_BRK_TIM12_IRQn = 43, TIM8_UP_TIM13_IRQn = 44, TIM8_TRG_COM_TIM14_IRQn = 45, TIM8_CC_IRQn = 46, DMA1_Stream7_IRQn = 47, FSMC_IRQn = 48, SDIO_IRQn = 49, TIM5_IRQn = 50, SPI3_IRQn = 51, UART4_IRQn = 52, UART5_IRQn = 53, TIM6_DAC_IRQn = 54, TIM7_IRQn = 55, DMA2_Stream0_IRQn = 56, DMA2_Stream1_IRQn = 57, DMA2_Stream2_IRQn = 58, DMA2_Stream3_IRQn = 59, DMA2_Stream4_IRQn = 60, ETH_IRQn = 61, ETH_WKUP_IRQn = 62, CAN2_TX_IRQn = 63, CAN2_RX0_IRQn = 64, CAN2_RX1_IRQn = 65, CAN2_SCE_IRQn = 66, OTG_FS_IRQn = 67, DMA2_Stream5_IRQn = 68, DMA2_Stream6_IRQn = 69, DMA2_Stream7_IRQn = 70, USART6_IRQn = 71, I2C3_EV_IRQn = 72, I2C3_ER_IRQn = 73, OTG_HS_EP1_OUT_IRQn = 74, OTG_HS_EP1_IN_IRQn = 75, OTG_HS_WKUP_IRQn = 76, OTG_HS_IRQn = 77, DCMI_IRQn = 78, CRYP_IRQn = 79, HASH_RNG_IRQn = 80, NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0, PVD_IRQn = 1, TAMP_STAMP_IRQn = 2, RTC_WKUP_IRQn = 3, FLASH_IRQn = 4, RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8, EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Stream0_IRQn = 11, DMA1_Stream1_IRQn = 12, DMA1_Stream2_IRQn = 13, DMA1_Stream3_IRQn = 14, DMA1_Stream4_IRQn = 15, DMA1_Stream5_IRQn = 16, DMA1_Stream6_IRQn = 17, ADC_IRQn = 18, CAN1_TX_IRQn = 19, CAN1_RX0_IRQn = 20, CAN1_RX1_IRQn = 21, CAN1_SCE_IRQn = 22, EXTI9_5_IRQn = 23, TIM1_BRK_TIM9_IRQn = 24, TIM1_UP_TIM10_IRQn = 25, TIM1_TRG_COM_TIM11_IRQn = 26, TIM1_CC_IRQn = 27, TIM2_IRQn = 28, TIM3_IRQn = 29, TIM4_IRQn = 30, I2C1_EV_IRQn = 31, I2C1_ER_IRQn = 32, I2C2_EV_IRQn = 33, I2C2_ER_IRQn = 34, SPI1_IRQn = 35, SPI2_IRQn = 36, USART1_IRQn = 37, USART2_IRQn = 38, USART3_IRQn = 39, EXTI15_10_IRQn = 40, RTC_Alarm_IRQn = 41, OTG_FS_WKUP_IRQn = 42, TIM8_BRK_TIM12_IRQn = 43, TIM8_UP_TIM13_IRQn = 44, TIM8_TRG_COM_TIM14_IRQn = 45, TIM8_CC_IRQn = 46, DMA1_Stream7_IRQn = 47, FSMC_IRQn = 48, SDIO_IRQn = 49, TIM5_IRQn = 50, SPI3_IRQn = 51, UART4_IRQn = 52, UART5_IRQn = 53, TIM6_DAC_IRQn = 54, TIM7_IRQn = 55, DMA2_Stream0_IRQn = 56, DMA2_Stream1_IRQn = 57, DMA2_Stream2_IRQn = 58, DMA2_Stream3_IRQn = 59, DMA2_Stream4_IRQn = 60, ETH_IRQn = 61, ETH_WKUP_IRQn = 62, CAN2_TX_IRQn = 63, CAN2_RX0_IRQn = 64, CAN2_RX1_IRQn = 65, CAN2_SCE_IRQn = 66, OTG_FS_IRQn = 67, DMA2_Stream5_IRQn = 68, DMA2_Stream6_IRQn = 69, DMA2_Stream7_IRQn = 70, USART6_IRQn = 71, I2C3_EV_IRQn = 72, I2C3_ER_IRQn = 73, OTG_HS_EP1_OUT_IRQn = 74, OTG_HS_EP1_IN_IRQn = 75, OTG_HS_WKUP_IRQn = 76, OTG_HS_IRQn = 77, DCMI_IRQn = 78, CRYP_IRQn = 79, HASH_RNG_IRQn = 80, FPU_IRQn = 81, NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVC_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WWDG_IRQn = 0, PVD_IRQn = 1, TAMPER_STAMP_IRQn = 2, RTC_WKUP_IRQn = 3, FLASH_IRQn = 4, RCC_IRQn = 5, EXTI0_IRQn = 6, EXTI1_IRQn = 7, EXTI2_IRQn = 8, EXTI3_IRQn = 9, EXTI4_IRQn = 10, DMA1_Channel1_IRQn = 11, DMA1_Channel2_IRQn = 12, DMA1_Channel3_IRQn = 13, DMA1_Channel4_IRQn = 14, DMA1_Channel5_IRQn = 15, DMA1_Channel6_IRQn = 16, DMA1_Channel7_IRQn = 17, ADC1_IRQn = 18, USB_HP_IRQn = 19, USB_LP_IRQn = 20, DAC_IRQn = 21, COMP_IRQn = 22, EXTI9_5_IRQn = 23, LCD_IRQn = 24, TIM9_IRQn = 25, TIM10_IRQn = 26, TIM11_IRQn = 27, TIM2_IRQn = 28, TIM3_IRQn = 29, TIM4_IRQn = 30, I2C1_EV_IRQn = 31, I2C1_ER_IRQn = 32, I2C2_EV_IRQn = 33, I2C2_ER_IRQn = 34, SPI1_IRQn = 35, SPI2_IRQn = 36, USART1_IRQn = 37, USART2_IRQn = 38, USART3_IRQn = 39, EXTI15_10_IRQn = 40, RTC_Alarm_IRQn = 41, USB_FS_WKUP_IRQn = 42, TIM6_IRQn = 43, TIM7_IRQn = 44, SDIO_IRQn = 45, TIM5_IRQn = 46, SPI3_IRQn = 47, UART4_IRQn = 48, UART5_IRQn = 49, DMA2_Channel1_IRQn = 50, DMA2_Channel2_IRQn = 51, DMA2_Channel3_IRQn = 52, DMA2_Channel4_IRQn = 53, DMA2_Channel5_IRQn = 54, AES_IRQn = 55, COMP_ACQ_IRQn = 56 }
enum	FlagStatus { RESET = 0, SET = !RESET, RESET = 0, SET = !RESET, RESET = 0, SET = !RESET, RESET = 0, SET = !RESET }
enum	FunctionalState { DISABLE = 0, ENABLE = !DISABLE, DISABLE = 0, ENABLE = !DISABLE, DISABLE = 0, ENABLE = !DISABLE, DISABLE = 0, ENABLE = !DISABLE }
enum	ErrorStatus { ERROR = 0, SUCCESS = !ERROR, ERROR = 0, SUCCESS = !ERROR, ERROR = 0, SUCCESS = !ERROR, ERROR = 0, SUCCESS = !ERROR }

Detailed Description

CMSIS Cortex-M3 Device Peripheral Access Layer Header File. This file contains all the peripheral register's definitions, bits definitions and memory mapping for STM32L1xx High-, Medium-density and Medium-density Plus devices.

Author:: MCD Application Team

Version:: V1.1.1

Date:

09-March-2012 The file is the unique include file that the application programmer is using in the C source code, usually in main.c. This file contains:

Configuration section that allows to select:
- The device used in the target application
- To use or not the peripheral�s drivers in application code(i.e. code will be based on direct access to peripheral�s registers rather than drivers API), this option is controlled by "#define USE_STDPERIPH_DRIVER"
- To change few application-specific parameters such as the HSE crystal frequency
Data structures and the address mapping for all peripherals
Peripheral's registers declarations and bits definition
Macros to access peripheral�s registers hardware

Attention:

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:

http://www.st.com/software_license_agreement_liberty_v2

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Data Structures

Defines

Typedefs

Enumerations

Detailed Description

© COPYRIGHT 2012 STMicroelectronics