SD host Interface. More...
#include <stm32f10x.h>
Data Fields | |
__IO uint32_t | POWER |
__IO uint32_t | CLKCR |
__IO uint32_t | ARG |
__IO uint32_t | CMD |
__I uint32_t | RESPCMD |
__I uint32_t | RESP1 |
__I uint32_t | RESP2 |
__I uint32_t | RESP3 |
__I uint32_t | RESP4 |
__IO uint32_t | DTIMER |
__IO uint32_t | DLEN |
__IO uint32_t | DCTRL |
__I uint32_t | DCOUNT |
__I uint32_t | STA |
__IO uint32_t | ICR |
__IO uint32_t | MASK |
uint32_t | RESERVED0 [2] |
__I uint32_t | FIFOCNT |
uint32_t | RESERVED1 [13] |
__IO uint32_t | FIFO |
SD host Interface.
SDIO power control register, Address offset: 0x00
SDI clock control register, Address offset: 0x04
SDIO argument register, Address offset: 0x08
SDIO command register, Address offset: 0x0C
SDIO command response register, Address offset: 0x10
SDIO response 1 register, Address offset: 0x14
SDIO response 2 register, Address offset: 0x18
SDIO response 3 register, Address offset: 0x1C
SDIO response 4 register, Address offset: 0x20
SDIO data timer register, Address offset: 0x24
SDIO data length register, Address offset: 0x28
SDIO data control register, Address offset: 0x2C
SDIO data counter register, Address offset: 0x30
SDIO status register, Address offset: 0x34
SDIO interrupt clear register, Address offset: 0x38
SDIO mask register, Address offset: 0x3C
Reserved, 0x40-0x44
SDIO FIFO counter register, Address offset: 0x48
Reserved, 0x4C-0x7C
SDIO data FIFO register, Address offset: 0x80