stm32f2_dma.c File Reference

#include <cfg/arch.h>
#include <arch/cm3.h>
#include <dev/irqreg.h>
#include <arch/cm3/cortex_interrupt.h>
#include <arch/cm3/stm/stm32_dma.h>

Include dependency graph for stm32f2_dma.c:

Defines
#define	CH2NR(ch)   ((ch & 0x70)>>4)
#define	CH2STREAM(base, ch)   (base + 0x10 + ( CH2NR(ch) * 0x18))
Functions
void	DMA_Setup (uint8_t ch, void *dst, void *src, uint16_t length, uint32_t flags)
void	DMA_Enable (uint8_t ch)
void	DMA_Disable (uint8_t ch)
void	DMA_Init (void)
	DMA System Initialization.
void	DMA_IrqMask (uint8_t ch, uint32_t mask, uint8_t ena)
	Control DMA channel interrupt masks.
void	DMA_ClearFlag (uint8_t ch, uint32_t flags)
	Clear DMA channel flags.
uint32_t	DMA_GetFlag (uint8_t ch)
	Get DMA channel flags.

---

Define Documentation

#define CH2NR

(

ch

)

((ch & 0x70)>>4)

Referenced by DMA_ClearFlag(), DMA_GetFlag(), and DMA_IrqMask().

#define CH2STREAM	(		base,
			ch
	)		(base + 0x10 + ( CH2NR(ch) * 0x18))

Referenced by DMA_Disable(), DMA_Enable(), DMA_IrqMask(), and DMA_Setup().

---

Function Documentation

void DMA_Setup	(	uint8_t	ch,
		void *	dst,
		void *	src,
		uint16_t	length,
		uint32_t	flags
	)

References _BI32, CH2STREAM, CM3BBREG, CM3REG, CR, DMA1_BASE, DMA2_BASE, DMA_ClearFlag(), DMA_HTIF, DMA_SxCR_CHSEL, DMA_SxCR_CHSEL_0, DMA_SxCR_DIR, DMA_SxCR_DIR_0, DMA_SxCR_DIR_1, DMA_SxCR_EN, DMA_TCIF, DMA_TEIF, and PERIPH_BASE.

Here is the call graph for this function:

void DMA_Enable

(

uint8_t

ch

)

References _BI32, CH2STREAM, CM3BBREG, CR, DMA1_BASE, DMA2_BASE, and DMA_SxCR_EN.

void DMA_Disable

(

uint8_t

ch

)

References _BI32, CH2STREAM, CM3BBREG, CR, DMA1_BASE, DMA2_BASE, and DMA_SxCR_EN.

Referenced by Stm32I2cBus1Init(), and Stm32I2cBus2Init().

void DMA_Init

(

void

)

DMA System Initialization.

Register all DMA interrupt handlers. Both DMA controllers are initialized separate

References _BI32, CM3BBREG, RCC_AHB1ENR_DMA1EN, RCC_AHB1ENR_DMA2EN, RCC_AHB1RSTR_DMA1RST, RCC_AHB1RSTR_DMA2RST, and RCC_BASE.

Referenced by Stm32I2cBus1Init(), and Stm32I2cBus2Init().

void DMA_IrqMask	(	uint8_t	ch,
		uint32_t	mask,
		uint8_t	ena
	)

Control DMA channel interrupt masks.

Setup interrupt mask on given channel. Channel numbers are from 0..n while documentation numbers them from 1..n. For that please use the defines DMAx_Cn.

Parameters:

ch	Channel number to set interrupt mask.
mask	Mask to set on the designated channel interrupts.
ena	Enable (1) or Disable (0) the bits in the mask.

On F2/F4, Interrupt enable bits and interrupt clear flags don't correspond! The Clear flags are arranged with sffereing spacing!

References CH2NR, CH2STREAM, CM3REG, CR, DMA1_BASE, DMA2_BASE, DMA_HTIF, DMA_LIFCR_CDMEIF0, DMA_LIFCR_CFEIF0, DMA_LIFCR_CHTIF0, DMA_LIFCR_CTCIF0, DMA_LIFCR_CTEIF0, DMA_SxCR_HTIE, DMA_SxCR_TCIE, DMA_SxCR_TEIE, DMA_TCIF, and DMA_TEIF.

void DMA_ClearFlag	(	uint8_t	ch,
		uint32_t	flags
	)

Clear DMA channel flags.

Parameters:

ch	Channel number.
flags	Mask of flags to clear.

References CH2NR, CM3REG, DMA1_BASE, DMA2_BASE, DMA_HTIF, DMA_LIFCR_CDMEIF0, DMA_LIFCR_CFEIF0, DMA_LIFCR_CHTIF0, DMA_LIFCR_CTCIF0, DMA_LIFCR_CTEIF0, DMA_TCIF, and DMA_TEIF.

Referenced by DMA_Init(), and DMA_Setup().

uint32_t DMA_GetFlag

(

uint8_t

ch

)

Get DMA channel flags.

Get interrupt / status flags of given channel.

Parameters:

ch	Channel number to set interrupt mask.

Returns:

flags Mask of flags to clear.

References CH2NR, CM3REG, DMA1_BASE, DMA2_BASE, DMA_HTIF, DMA_LISR_HTIF0, DMA_LISR_TCIF0, DMA_LISR_TEIF0, DMA_TCIF, and DMA_TEIF.