#include <cfg/arch.h>

Include dependency graph for stm32_dma.h:

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Defines
#define	DMA_TEIF 0x8
	STM32 DMA Status and Interrupt Flags.
#define	DMA_HTIF 0x4
#define	DMA_TCIF 0x2
#define	DMA_GIF 0x1
#define	DMA_FLAGMASK 0xF
#define	DMA_IRQMASK 0x1
#define	DMA_CONTROL0 0x00
#define	DMA_CONTROL1 0x80
#define	DMA_STREAM0 0x00
#define	DMA_STREAM1 0x10
#define	DMA_STREAM2 0x20
#define	DMA_STREAM3 0x30
#define	DMA_STREAM4 0x40
#define	DMA_STREAM5 0x50
#define	DMA_STREAM6 0x60
#define	DMA_STREAM7 0x70
#define	DMA_CHANNEL0 0x00
#define	DMA_CHANNEL1 0x01
#define	DMA_CHANNEL2 0x02
#define	DMA_CHANNEL3 0x03
#define	DMA_CHANNEL4 0x04
#define	DMA_CHANNEL5 0x05
#define	DMA_CHANNEL6 0x06
#define	DMA_CHANNEL7 0x07
Functions
void	Dma1IrqEntry (void *arg)
void	DMA_Setup (uint8_t ch, void dst, void src, uint16_t length, uint32_t flags)
void	DMA_Enable (uint8_t ch)
void	DMA_Disable (uint8_t ch)
void	DMA_Init (void)
	DMA System Initialization.
void	DMA_IrqMask (uint8_t ch, uint32_t mask, uint8_t ena)
	Control DMA channel interrupt masks.
void	DMA_ClearFlag (uint8_t ch, uint32_t flags)
	Clear DMA channel flags.
uint32_t	DMA_GetFlag (uint8_t ch)
	Get DMA channel flags.

Define Documentation

#define DMA_TEIF 0x8

STM32 DMA Status and Interrupt Flags.

Referenced by DMA_ClearFlag(), DMA_GetFlag(), DMA_IrqMask(), and DMA_Setup().

#define DMA_HTIF 0x4

Referenced by DMA_ClearFlag(), DMA_GetFlag(), DMA_IrqMask(), and DMA_Setup().

#define DMA_TCIF 0x2

Referenced by DMA_ClearFlag(), DMA_GetFlag(), DMA_IrqMask(), and DMA_Setup().

#define DMA_GIF 0x1

#define DMA_FLAGMASK 0xF

Referenced by DMA_ClearFlag(), DMA_GetFlag(), and DMA_IrqMask().

#define DMA_IRQMASK 0x1

#define DMA_CONTROL0 0x00

#define DMA_CONTROL1 0x80

#define DMA_STREAM0 0x00

#define DMA_STREAM1 0x10

#define DMA_STREAM2 0x20

#define DMA_STREAM3 0x30

#define DMA_STREAM4 0x40

#define DMA_STREAM5 0x50

#define DMA_STREAM6 0x60

#define DMA_STREAM7 0x70

#define DMA_CHANNEL0 0x00

#define DMA_CHANNEL1 0x01

#define DMA_CHANNEL2 0x02

#define DMA_CHANNEL3 0x03

#define DMA_CHANNEL4 0x04

#define DMA_CHANNEL5 0x05

#define DMA_CHANNEL6 0x06

#define DMA_CHANNEL7 0x07

Function Documentation

void Dma1IrqEntry ( void * arg )

void DMA_Setup	(	uint8_t	ch,
		void *	dst,
		void *	src,
		uint16_t	length,
		uint32_t	flags
	)

References _BI32, DMA_Channel_TypeDef::CCR, CH2STREAM, CM3BBREG, CM3REG, DMA_Channel_TypeDef::CMAR, DMA_Channel_TypeDef::CNDTR, DMA_Channel_TypeDef::CPAR, CR, DMA1_BASE, DMA2_BASE, DMA_CCR1_DIR, DMA_CCR1_EN, DMA_CCR1_MEM2MEM, DMA_CCR2_DIR, DMATAB::dma_ch, DMA_ClearFlag(), DMA_HTIF, DMA_SxCR_CHSEL, DMA_SxCR_CHSEL_0, DMA_SxCR_DIR, DMA_SxCR_DIR_0, DMA_SxCR_DIR_1, DMA_SxCR_EN, DMA_TCIF, DMA_TEIF, and PERIPH_BASE.

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void DMA_Enable ( uint8_t ch )

References _BI32, DMA_Channel_TypeDef::CCR, CH2STREAM, CM3BBREG, CR, DMA1_BASE, DMA2_BASE, DMA_CCR1_EN, and DMA_SxCR_EN.

void DMA_Disable ( uint8_t ch )

References _BI32, DMA_Channel_TypeDef::CCR, CH2STREAM, CM3BBREG, CR, DMA1_BASE, DMA2_BASE, DMA_CCR1_EN, and DMA_SxCR_EN.

Referenced by Stm32I2cBus1Init(), and Stm32I2cBus2Init().

void DMA_Init ( void )

DMA System Initialization.

Register all DMA interrupt handlers.

Register all DMA interrupt handlers. Both DMA controllers are initialized separate

References _BI32, DMA_Channel_TypeDef::CCR, CM3BBREG, DMA1, dma1_args, DMA2, dma2_args, DMA_ClearFlag(), DMA_Handler_IRQ(), DMA_IRQn, IntEnable(), IntRegister(), NULL, RCC, RCC_AHB1ENR_DMA1EN, RCC_AHB1ENR_DMA2EN, RCC_AHB1RSTR_DMA1RST, RCC_AHB1RSTR_DMA2RST, RCC_AHBENR_DMA1EN, RCC_AHBENR_DMA2EN, RCC_BASE, and STM_HAS_DMA1.

Referenced by Stm32I2cBus1Init(), and Stm32I2cBus2Init().

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void DMA_IrqMask	(	uint8_t	ch,
		uint32_t	mask,
		uint8_t	ena
	)

Control DMA channel interrupt masks.

Setup interrupt mask on given channel. Channel numbers are from 0..n while documentation numbers them from 1..n. For that please use the defines DMAx_Cn.

Parameters:

ch	Channel number to set interrupt mask.
mask	Mask to set on the designated channel interrupts.
ena	Enable (1) or Disable (0) the bits in the mask.

Setup interrupt mask on given channel. Channel numbers are from 0..n while documentation numbers them from 1..n. For that please use the defines DMAx_Cn.

Parameters:

ch	Channel number to set interrupt mask.
mask	Mask to set on the designated channel interrupts.
ena	Enable (1) or Disable (0) the bits in the mask.

On F2/F4, Interrupt enable bits and interrupt clear flags don't correspond! The Clear flags are arranged with sffereing spacing!

References DMA_Channel_TypeDef::CCR, CH2NR, CH2STREAM, CM3REG, CR, DMA1_BASE, DMA2_BASE, DMA_FLAGMASK, DMA_HTIF, DMA_LIFCR_CDMEIF0, DMA_LIFCR_CFEIF0, DMA_LIFCR_CHTIF0, DMA_LIFCR_CTCIF0, DMA_LIFCR_CTEIF0, DMA_SxCR_HTIE, DMA_SxCR_TCIE, DMA_SxCR_TEIE, DMA_TCIF, DMA_TEIF, DMATAB::fofs, and DMA_TypeDef::IFCR.

void DMA_ClearFlag	(	uint8_t	ch,
		uint32_t	flags
	)

Clear DMA channel flags.

Setup interrupt mask on given channel. Channel numbers are from 0..n while documentation numbers them from 1..n. For that please use the defines DMAx_Cn.

Parameters:

ch	Channel number.
flags	Mask of flags to clear.
ch	Channel number.
flags	Mask of flags to clear.

References CH2NR, CM3REG, DMA1_BASE, DMA2_BASE, DMA_FLAGMASK, DMA_HTIF, DMA_LIFCR_CDMEIF0, DMA_LIFCR_CFEIF0, DMA_LIFCR_CHTIF0, DMA_LIFCR_CTCIF0, DMA_LIFCR_CTEIF0, DMA_TCIF, DMA_TEIF, and DMA_TypeDef::IFCR.

Referenced by DMA_Init(), and DMA_Setup().

uint32_t DMA_GetFlag ( uint8_t ch )

Get DMA channel flags.

Get interrupt / status flags of given channel.

Parameters:

ch	Channel number to set interrupt mask.

Returns:: flags Mask of flags to clear.

References CH2NR, CM3REG, DMA1_BASE, DMA2_BASE, DMA_FLAGMASK, DMA_HTIF, DMA_LISR_HTIF0, DMA_LISR_TCIF0, DMA_LISR_TEIF0, DMA_TCIF, DMA_TEIF, DMATAB::fofs, and DMA_TypeDef::ISR.

Defines

Functions

Define Documentation

Function Documentation