cm3.h File Reference

#include <stddef.h>
#include <cfg/arch.h>
#include <arch/cm3/cortexM3.h>
#include <dev/mweeprom.h>

Include dependency graph for cm3.h:

Go to the source code of this file.

Defines
#define	ARM_MODE_USER   0x10
#define	ARM_MODE_FIQ   0x11
#define	ARM_MODE_IRQ   0x12
#define	ARM_MODE_SVC   0x13
#define	ARM_MODE_ABORT   0x17
#define	ARM_MODE_UNDEF   0x1B
#define	ARM_MODE_SYS   0x1F
#define	ARM_MODE_MASK   0x1F
#define	I_BIT   0x80
#define	ARM_CPSR_I_BIT   0x80
#define	F_BIT   0x40
#define	ARM_CPSR_F_BIT   0x40
#define	T_BIT   0x20
#define	ARM_CPSR_T_BIT   0x20
#define	CONST   const
#define	INLINE   inline
#define	PSTR(p)   (p)
#define	PRG_RDB(p)   (*((const char *)(p)))
#define	prog_char   const char
#define	PGM_P   prog_char *
#define	SIGNAL(x)   __attribute__((interrupt_handler)) void x(void)
#define	RAMFUNC   __attribute__ ((long_call, section (".ramfunc")))
#define	main   NutAppMain
#define	strlen_P(x)   strlen((char *)(x))
#define	strcpy_P(x, y)   strcpy(x,(char *)(y))
#define	strcmp_P(x, y)   strcmp((char *)(x), (char *)(y))
#define	memcpy_P(x, y, z)   memcpy(x, y, z)
#define	_NOP()   __asm__ __volatile__ ("mov r0, r0 @ _NOP")
#define	outb(_reg, _val)   (*((volatile unsigned char *)(_reg)) = (_val))
#define	outw(_reg, _val)   (*((volatile unsigned short *)(_reg)) = (_val))
#define	outr(_reg, _val)   (*((volatile unsigned int *)(_reg)) = (_val))
#define	inb(_reg)   (*((volatile unsigned char *)(_reg)))
#define	inw(_reg)   (*((volatile unsigned short *)(_reg)))
#define	inr(_reg)   (*((volatile unsigned int *)(_reg)))
#define	_BV(bit)   (1 << (bit))
#define	sbi(_reg, _bit)   outr(_reg, inr(_reg) | _BV(_bit))
#define	cbi(_reg, _bit)   outr(_reg, inr(_reg) & ~_BV(_bit))
#define	bit_is_set(_reg, _bit)   ((inr(_reg) & _BV(_bit)) != 0)
#define	bit_is_clear(_reg, _bit)   ((inr(_reg) & _BV(_bit)) == 0)
#define	mem_barrier()   __asm__ __volatile__("":::"memory")
#define	_BI2(arg)   (((arg) & 0x00000002) ? 1: 0)
	Get the Bit position index of the highest bit from a bit value.
#define	_BI4(arg)   (((arg) & 0x0000000c) ? ( _BI2(arg>> 2) + 2) : _BI2(arg))
#define	_BI8(arg)   (((arg) & 0x000000f0) ? ( _BI4(arg>> 4) + 4) : _BI4(arg))
#define	_BI16(arg)   (((arg) & 0x0000ff00) ? ( _BI8(arg>> 8) + 8) : _BI8(arg))
#define	_BI32(arg)   (((arg) & 0xffff0000) ? (_BI16(arg>>16) + 16) : _BI16(arg))
#define	CM3ADDR(base, regstruct, reg)   ((base) + offsetof(regstruct, reg))
	Get the address of a device register by its base and the offset of the register in its register structure.
#define	CM3MEM(addr)   *((volatile unsigned long *)(addr))
	Atomic access via register address of CortexM devices.
#define	CM3MEM16(addr)   *((volatile uint16_t *) (addr))
#define	CM3MEM8(addr)   *((volatile uint8_t *) (addr))
#define	CM3REG(base, regstruct, reg)   ((regstruct *)(base))->reg
#define	CM3BBREG(base, regstruct, reg, bit)   *((volatile uint32_t *) &(((uint8_t *) ((base & 0xF0000000) + 0x02000000 + ((base & 0xFFFFF)<<5))) [(offsetof(regstruct, reg) <<5) + (bit <<2)] ) )
	Atomic bit access via bitband address of CortexM devices.
#define	CM3BB_BASE(base)   (volatile uint32_t *) ((base & 0xF0000000) + 0x02000000 + ((base & 0xFFFFF)<<5))
	Get Base Address of the Bitband region belonging to Device Register structrure.
#define	CM3BB_OFFSET(regstruct, reg, bit)   ((offsetof(regstruct, reg) <<3) + bit)
	Get Offset of Bitband Bit in the (uint32_t*) Bitband Array.
#define	_SFR_MEM8(addr)   (addr)
#define	_SFR_MEM16(addr)   (addr)
#define	ARM_SET_CP15_CR(val)   __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 0" :: "r"(val) : "cc")
#define	ARM_GET_CP15_CR()
Variables
void *	__bss_end
	End of uninitialised data segment. Defined in the linker script.
void *	__stack
	Begin of the stack segment. Defined in the linker script.

---

Define Documentation

#define ARM_MODE_USER   0x10

#define ARM_MODE_FIQ   0x11

#define ARM_MODE_IRQ   0x12

#define ARM_MODE_SVC   0x13

#define ARM_MODE_ABORT   0x17

#define ARM_MODE_UNDEF   0x1B

#define ARM_MODE_SYS   0x1F

#define ARM_MODE_MASK   0x1F

#define I_BIT   0x80

#define ARM_CPSR_I_BIT   0x80

#define F_BIT   0x40

#define ARM_CPSR_F_BIT   0x40

#define T_BIT   0x20

#define ARM_CPSR_T_BIT   0x20

#define CONST   const

#define INLINE   inline

#define PSTR

(

p

)

(p)

#define PRG_RDB

(

p

)

(*((const char *)(p)))

#define prog_char   const char

#define PGM_P   prog_char *

#define SIGNAL

(

x

)

__attribute__((interrupt_handler)) void x(void)

#define RAMFUNC   __attribute__ ((long_call, section (".ramfunc")))

#define main   NutAppMain

#define strlen_P

(

x

)

strlen((char *)(x))

#define strcpy_P	(		x,
			y
	)		strcpy(x,(char *)(y))

#define strcmp_P	(		x,
			y
	)		strcmp((char *)(x), (char *)(y))

#define memcpy_P	(		x,
			y,
			z
	)		memcpy(x, y, z)

#define _NOP

(

)

__asm__ __volatile__ ("mov r0, r0 @ _NOP")

#define outb	(		_reg,
			_val
	)		(*((volatile unsigned char *)(_reg)) = (_val))

#define outw	(		_reg,
			_val
	)		(*((volatile unsigned short *)(_reg)) = (_val))

#define outr	(		_reg,
			_val
	)		(*((volatile unsigned int *)(_reg)) = (_val))

#define inb

(

_reg

)

(*((volatile unsigned char *)(_reg)))

#define inw

(

_reg

)

(*((volatile unsigned short *)(_reg)))

#define inr

(

_reg

)

(*((volatile unsigned int *)(_reg)))

#define _BV

(

bit

)

(1 << (bit))

#define sbi	(		_reg,
			_bit
	)		outr(_reg, inr(_reg) | _BV(_bit))

#define cbi	(		_reg,
			_bit
	)		outr(_reg, inr(_reg) & ~_BV(_bit))

#define bit_is_set	(		_reg,
			_bit
	)		((inr(_reg) & _BV(_bit)) != 0)

#define bit_is_clear	(		_reg,
			_bit
	)		((inr(_reg) & _BV(_bit)) == 0)

#define mem_barrier

(

)

__asm__ __volatile__("":::"memory")

#define _BI2

(

arg

)

(((arg) & 0x00000002) ? 1: 0)

Get the Bit position index of the highest bit from a bit value.

#define _BI4

(

arg

)

(((arg) & 0x0000000c) ? ( _BI2(arg>> 2) + 2) : _BI2(arg))

#define _BI8

(

arg

)

(((arg) & 0x000000f0) ? ( _BI4(arg>> 4) + 4) : _BI4(arg))

#define _BI16

(

arg

)

(((arg) & 0x0000ff00) ? ( _BI8(arg>> 8) + 8) : _BI8(arg))

Referenced by SystemCoreClockUpdate().

#define _BI32

(

arg

)

(((arg) & 0xffff0000) ? (_BI16(arg>>16) + 16) : _BI16(arg))

Referenced by CanEnableRx(), CanInput(), DMA_Disable(), DMA_Enable(), DMA_Init(), DMA_Setup(), GpioPinConfigSet(), NutRegisterCanBus(), SetPllClockSource(), Stm32CanHw1Init(), and Stm32CanHw2Init().

#define CM3ADDR	(		base,
			regstruct,
			reg
	)		((base) + offsetof(regstruct, reg))

Get the address of a device register by its base and the offset of the register in its register structure.

CortexM specific:

#define CM3MEM

(

addr

)

*((volatile unsigned long *)(addr))

Atomic access via register address of CortexM devices.

CortexM specific: Translates a register address into a volatile single cycle read or write access of the register.

Constant base part of address allows room for compiler optimization

#define CM3MEM16

(

addr

)

*((volatile uint16_t *) (addr))

#define CM3MEM8

(

addr

)

*((volatile uint8_t *) (addr))

#define CM3REG	(		base,
			regstruct,
			reg
	)		((regstruct *)(base))->reg

Referenced by DMA_ClearFlag(), DMA_GetFlag(), DMA_IrqMask(), DMA_Setup(), and GpioPortConfigSet().

#define CM3BBREG	(		base,
			regstruct,
			reg,
			bit
	)		*((volatile uint32_t *) &(((uint8_t *) ((base & 0xF0000000) + 0x02000000 + ((base & 0xFFFFF)<<5))) [(offsetof(regstruct, reg) <<5) + (bit <<2)] ) )

Atomic bit access via bitband address of CortexM devices.

CortexM specific: Translates a register address into a volatile single cycle read or write access of the register.

Constant base part of address allows room for compiler optimization. GCC doesn't (201201)

Referenced by DMA_Disable(), DMA_Enable(), DMA_Init(), DMA_Setup(), GpioPinConfigGet(), GpioPinConfigSet(), and SetPllClockSource().

#define CM3BB_BASE

(

base

)

(volatile uint32_t *) ((base & 0xF0000000) + 0x02000000 + ((base & 0xFFFFF)<<5))

Get Base Address of the Bitband region belonging to Device Register structrure.

Referenced by GpioPinConfigSet(), Stm32CanHw1Init(), and Stm32CanHw2Init().

#define CM3BB_OFFSET	(		regstruct,
			reg,
			bit
	)		((offsetof(regstruct, reg) <<3) + bit)

Get Offset of Bitband Bit in the (uint32_t*) Bitband Array.

CM3/4 can do immediate offset access for -255, +4095 bytes around a base. So bits in the first 32 32-bit registers above the base can be reached witout loading an absolute address in a bitband access

Referenced by CanEnableRx(), CanInput(), GpioPinConfigSet(), Stm32CanHw1Init(), and Stm32CanHw2Init().

#define _SFR_MEM8

(

addr

)

(addr)

#define _SFR_MEM16

(

addr

)

(addr)

#define ARM_SET_CP15_CR

(

val

)

__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 0" :: "r"(val) : "cc")

#define ARM_GET_CP15_CR

(

)

Value:

( \
    { \
        unsigned int val; \
        __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 0" : "=r"(val) :: "cc"); \
        val; \
    } \
)

---

Variable Documentation

void* __bss_end

End of uninitialised data segment. Defined in the linker script.

void* __stack

Begin of the stack segment. Defined in the linker script.