Defines | |
#define | NUTGPIOPORT_MAX NUTGPIO_PORT4+1 |
Functions | |
uint32_t | GpioPinConfigGet (int bank, int bit) |
Get pin configuration. | |
int | GpioPortConfigSet (int bank, uint32_t mask, uint32_t flags) |
Set port wide pin configuration. | |
int | GpioPinConfigSet (int bank, int bit, uint32_t flags) |
Set pin configuration. | |
int | GpioRegisterIrqHandler (GPIO_SIGNAL *sig, int bit, void(*handler)(void *), void *arg) |
Register a GPIO pin interrupt handler. | |
int | GpioIrqEnable (GPIO_SIGNAL *sig, int bit) |
Enable a specified GPIO interrupt. | |
int | GpioIrqDisable (GPIO_SIGNAL *sig, int bit) |
Disable a specified GPIO interrupt. | |
int | GpioIrqStatus (GPIO_SIGNAL *sig, int bit) |
Query the status of a specified GPIO interrupt. | |
int | GpioIrqSetMode (GPIO_SIGNAL *sig, int bit, int mode) |
Set the GPIO interrupt mode for a pin. |
#define NUTGPIOPORT_MAX NUTGPIO_PORT4+1 |
Referenced by GpioPinConfigGet(), GpioPinConfigSet(), and GpioPortConfigSet().
uint32_t GpioPinConfigGet | ( | int | bank, |
int | bit | ||
) |
Get pin configuration.
Trying to set undefined ports must be avoided. If NUTDEBUG is enabled an assertion will be rised.
bank | GPIO bank/port number. |
bit | Bit number of the specified bank/port. |
References __IO, CM3BBREG, GPIO_BANKID2BASE, GPIO_CFG_DISABLED, GPIO_CFG_MULTIDRIVE, GPIO_CFG_OUTPUT, GPIO_CFG_PERIPHERAL0, GPIO_CFG_PERIPHERAL1, GPIO_CFG_PERIPHERAL2, GPIO_CFG_PERIPHERAL3, GPIO_CFG_PULLDOWN, GPIO_CFG_PULLUP, GPIO_CFG_REPEATER, LPC_PINCON, NUTASSERT, NUTGPIOPORT_MAX, PINCON_PINMODE_NORMAL, PINCON_PINMODE_PULLDOWN, PINCON_PINMODE_PULLUP, PINCON_PINMODE_REPEATER, PINCON_PINSEL_AF0, PINCON_PINSEL_AF1, PINCON_PINSEL_AF2, PINCON_PINSEL_AF3, PINMODE, PINMODE_OD, PINSEL, and rc.
Set port wide pin configuration.
bank | GPIO bank/port number. |
mask | The given attributes are set for a specific pin, if the corresponding bit in this mask is 1. |
flags | Attribute flags to set. |
References __IO, _BV, CM3REG, GPIO_BANKID2BASE, GPIO_CFG_MULTIDRIVE, GPIO_CFG_OUTPUT, GPIO_CFG_PERIPHERAL1, GPIO_CFG_PERIPHERAL2, GPIO_CFG_PERIPHERAL3, GPIO_CFG_PERIPHERAL_MASK, GPIO_CFG_PULLDOWN, GPIO_CFG_PULLUP, GPIO_CFG_REPEATER, LPC_PINCON, NUTASSERT, NUTGPIOPORT_MAX, PINCON_PINMODE_MASK, PINCON_PINMODE_NORMAL, PINCON_PINMODE_PULLDOWN, PINCON_PINMODE_PULLUP, PINCON_PINMODE_REPEATER, PINCON_PINSEL_AF1, PINCON_PINSEL_AF2, PINCON_PINSEL_AF3, PINCON_PINSEL_MASK, and PINMODE_OD.
int GpioPinConfigSet | ( | int | bank, |
int | bit, | ||
uint32_t | flags | ||
) |
Set pin configuration.
Applications may also use this function to make sure, that a specific attribute is available for a specific pin.
bank | GPIO bank/port number. |
bit | Bit number of the specified bank/port. |
flags | Attribute flags. |
References __IO, _BV, CM3BBREG, GPIO_BANKID2BASE, GPIO_CFG_MULTIDRIVE, GPIO_CFG_OUTPUT, GPIO_CFG_PERIPHERAL1, GPIO_CFG_PERIPHERAL2, GPIO_CFG_PERIPHERAL3, GPIO_CFG_PERIPHERAL_MASK, GPIO_CFG_PULLDOWN, GPIO_CFG_PULLUP, GPIO_CFG_REPEATER, LPC_PINCON, NUTASSERT, NUTGPIOPORT_MAX, PINCON_PINMODE_MASK, PINCON_PINMODE_NORMAL, PINCON_PINMODE_PULLDOWN, PINCON_PINMODE_PULLUP, PINCON_PINMODE_REPEATER, PINCON_PINSEL_AF1, PINCON_PINSEL_AF3, PINCON_PINSEL_MASK, and PINMODE_OD.
int GpioRegisterIrqHandler | ( | GPIO_SIGNAL * | sig, |
int | bit, | ||
void(*)(void *) | handler, | ||
void * | arg | ||
) |
Register a GPIO pin interrupt handler.
Generating interrupts on GPIO pin changes is not supported on all platforms. In this case dedicated external interrupt pins may be used with NutRegisterIrqHandler().
On the LPC17xx interrupts are triggered on rising, falling or both edges. Level triggering is not supported.
After registering, interrupts are disabled. Calling GpioIrqEnable() is required to activate the interrupt.
The following code fragment registers an interrupt handler which is called on a rising edge of bit 4 of the first GPIO port:
#include <dev/gpio.h> static void PinChange(void *arg) { ... } { ... GpioPinConfigSet(0, 4, GPIO_CFG_PULLUP); GpioRegisterIrqHandler(&sig_GPIO0, 4, PinChange, NULL); GpioIrqSetMode(&sig_GPIO0, 4, NUT_IRQMODE_RISINGEDGE); GpioIrqEnable(&sig_GPIO0, 4); ... }
sig | Bank/port interrupt to be associated with this handler. |
bit | Bit number of the specified bank/port. |
handler | This routine will be called by Nut/OS, when the specified pin changes its state. |
arg | Argument to be passed to the interrupt handler routine. |
References GPIO_SIGNAL::ios_handler, GPIO_SIGNAL::ios_vector, GPIO_VECTOR::iov_arg, GPIO_VECTOR::iov_handler, IRQ_HANDLER::ir_handler, LPC_GPIOINT, malloc(), memset(), NULL, NutIrqEnable(), NutRegisterIrqHandler(), rc, and sig_PIO.
int GpioIrqEnable | ( | GPIO_SIGNAL * | sig, |
int | bit | ||
) |
Enable a specified GPIO interrupt.
A related interrupt handler must have been registered before calling this function. See GpioRegisterIrqHandler().
sig | Interrupt to enable. |
bit | Bit number of the specified bank/port. |
References GPIO_SIGNAL::ios_ctl, NULL, and NUT_IRQCTL_ENABLE.
int GpioIrqDisable | ( | GPIO_SIGNAL * | sig, |
int | bit | ||
) |
Disable a specified GPIO interrupt.
sig | Interrupt to disable. |
bit | Bit number of the specified bank/port. |
References GPIO_SIGNAL::ios_ctl, NULL, and NUT_IRQCTL_DISABLE.
int GpioIrqStatus | ( | GPIO_SIGNAL * | sig, |
int | bit | ||
) |
Query the status of a specified GPIO interrupt.
A related interrupt handler must have been registered before calling this function. See GpioRegisterIrqHandler().
sig | Interrupt to query |
bit | Bit number of the specified bank/port. |
References GPIO_SIGNAL::ios_ctl, and NUT_IRQCTL_STATUS.
int GpioIrqSetMode | ( | GPIO_SIGNAL * | sig, |
int | bit, | ||
int | mode | ||
) |
Set the GPIO interrupt mode for a pin.
sig | Interrupt to configure. |
bit | Bit number of the specified bank/port. |
mode | one of the following modes: NUT_IRQMODE_RISINGEDGE, NUT_IRQMODE_FALLINGEDGE, NUT_IRQMODE_BOTHEDGE, NUT_IRQMODE_NONE, |
References GPIO_SIGNAL::ios_ctl, and NUT_IRQCTL_SETMODE.