lpc177x_8x_emc.c File Reference

#include <sys/timer.h>
#include <arch/cm3.h>
#include <arch/cm3/nxp/lpc177x_8x.h>
#include <arch/cm3/nxp/lpc177x_8x_emc.h>
#include <arch/cm3/nxp/lpc177x_8x_clk.h>
#include <arch/cm3/nxp/lpc177x_8x_gpio.h>

Include dependency graph for lpc177x_8x_emc.c:

Defines
#define	DEFAULT_CLKOUTDLY   0
#define	DEFAULT_FBCLKDLY   20
#define	DEFAULT_CMDDLY   16
#define	DELAY_RANGE   0x1F
#define	SDRAMTEST_BLOCKSIZE   0x100
#define	SDRAMTEST_JUMPSIZE   0x10000
Functions
void	Lpc177x_8x_EmcInit (void)
	Initialize EMC.
void	Lpc177x_8x_EmcSDRAMAdjustTiming (void)
	Ajust SDRAM SDRAM timing.
int	Lpc177x_8x_EmcSDRAMCheck (SDRAM sdram, uint32_t offset)
	Simple SDRAM test.
void	Lpc177x_8x_EmcSDRAMInit (SDRAM sdram, uint32_t dynamic_config)
	EMC SDRAM initialisation.
void	Lpc177x_8x_EmcConfigEndianMode (uint32_t endian_mode)
	Configure Little Endian/Big Endian mode for EMC.
void	Lpc177x_8x_EmcDynCtrlClockEnable (uint32_t clock_enable)
	Set the value for dynamic clock enable bit.
void	Lpc177x_8x_EmcDynCtrlClockControl (uint32_t clock_control)
	Set the value for dynamic memory clock control: stops or runs continuously.
void	Lpc177x_8x_EmcDynCtrlSelfRefresh (uint32_t self_refresh_mode)
	Switch the Self-refresh mode between normal and self-refresh mode.
void	Lpc177x_8x_EmcDynCtrlMMC (uint32_t mmc_val)
	Enable/disable CLKOUT.
void	Lpc177x_8x_EmcDynCtrlSDRAMCmd (uint32_t sdram_command)
	Issue SDRAM command.
void	Lpc177x_8x_EmcDynCtrlPowerDownMode (uint32_t power_command)
	Switch between Normal operation and deep sleep power mode.
void	Lpc177x_8x_EmcSetDynMemoryParameter (EMC_DYN_MEM_PAR par, uint32_t val)
	Set the value of EMC dynamic memory registers.
void	Lpc177x_8x_EmcStaticExtendedWait (uint32_t timeout)
	Set extended wait time out for accessing static memory.
void	Lpc177x_8x_EmcDynMemConfigMD (uint32_t cs, uint32_t mem_dev)
	Configure the memory device.
void	Lpc177x_8x_EmcDynMemConfigAM (uint32_t cs, uint32_t addr_mapped)
	Map the address for the memory device.
void	Lpc177x_8x_EmcDynMemConfigB (uint32_t cs, uint32_t buff_control)
	Enable/disable the buffer.
void	Lpc177x_8x_EmcDynMemConfigP (uint32_t cs, uint32_t permission)
	Configure write permission: protect or not.
void	Lpc177x_8x_EmcDynMemRAS (uint32_t cs, uint32_t ras_val)
	Set value for RAS latency.
void	Lpc177x_8x_EmcDynMemCAS (uint32_t cs, uint32_t cas_val)
	Set value for CAS latency.
void	Lpc177x_8x_EmcStaticMemConfigMW (uint32_t cs, uint32_t mem_width)
	Configure the memory bus width.
void	Lpc177x_8x_EmcStaticMemConfigPM (uint32_t cs, uint32_t page_mode)
	Configure the page mode.
void	Lpc177x_8x_EmcStaticMemConfigPC (uint32_t cs, uint32_t polarity)
	Configure the chip select polarity.
void	Lpc177x_8x_EmcStaticMemConfigPB (uint32_t cs, uint32_t pb_val)
	Configure the byte lane state.
void	Lpc177x_8x_EmcStaticMemConfigEW (uint32_t cs, uint32_t ex_wait)
	Configure the extended wait value.
void	Lpc177x_8x_EmcStaticMemConfigB (uint32_t cs, uint32_t buf_val)
	Configure the buffer enable value.
void	Lpc177x_8x_EmcStaticMemConfigpP (uint32_t cs, uint32_t permission)
	Configure the write permission.
void	Lpc177x_8x_EmcSetStaticMemoryParameter (uint32_t cs, EMC_STA_MEM_PAR par, uint32_t val)
	Set the value of LPC_EMC static memory registers.
Variables
volatile uint32_t	original_cmdclkdelay = 0
volatile uint32_t	original_fbclkdelay = 0
volatile uint32_t	initial_calibration_value

---

Define Documentation

#define DEFAULT_CLKOUTDLY   0

Referenced by Lpc177x_8x_EmcSDRAMAdjustTiming().

#define DEFAULT_FBCLKDLY   20

Referenced by Lpc177x_8x_EmcSDRAMInit().

#define DEFAULT_CMDDLY   16

Referenced by Lpc177x_8x_EmcSDRAMInit().

#define DELAY_RANGE   0x1F

#define SDRAMTEST_BLOCKSIZE   0x100

Referenced by Lpc177x_8x_EmcSDRAMCheck().

#define SDRAMTEST_JUMPSIZE   0x10000

Referenced by Lpc177x_8x_EmcSDRAMCheck().

---

Function Documentation

void Lpc177x_8x_EmcInit

(

void

)

Initialize EMC.

Initialize the external memory controller. GPIO pins should be correctly configured when calling this function.

Parameters:

none

Returns:

none

References CLKPWR_PCONP_PCEMC, LPC_EMC, LPC_SC, and SysCtlPeripheralClkEnable.

Referenced by NutBoardInit().

void Lpc177x_8x_EmcSDRAMAdjustTiming

(

void

)

Ajust SDRAM SDRAM timing.

This function should be called regularly to re-calibrate the delay lines which might change their correct delays due to thermal influences

Parameters:

none

Returns:

none

References DEFAULT_CLKOUTDLY, initial_calibration_value, LPC_SC, original_cmdclkdelay, and original_fbclkdelay.

int Lpc177x_8x_EmcSDRAMCheck	(	SDRAM	sdram,
		uint32_t	offset
	)

Simple SDRAM test.

This is used at startup time (before the first usage) to find the optimum delay time values.

ATT: This test overwrites the previous SDRAM contents! Please note that IT IS NOT POSSIBLE to preserve these contents because it might be possible that garbage address commands are output and we will not know which locations are addressed during this test. DO NOT USE this test if executing code from SDRAM.

ATT: This test is far from complete. We neither check differen write sizes nor do we use selected pattern to check single bit failures etc.

Parameters:

sdram	configuration struct of the used sdram
offset	constant used to modify the test pattern

Returns:

0 if test is ok, 1 in case of a failure

References _sdram_params::base_addr, SDRAMTEST_BLOCKSIZE, SDRAMTEST_JUMPSIZE, and _sdram_params::size.

Referenced by NutIdleInit().

void Lpc177x_8x_EmcSDRAMInit	(	SDRAM	sdram,
		uint32_t	dynamic_config
	)

EMC SDRAM initialisation.

This function configures the emc to a sdram connected to CS0 SDRAM timing parameters must be given as parameter

Parameters:

sdram	configuration struct of the used sdram
dynamic_config	configuration values for dynamic_config register

Returns:

none

References _BV, _sdram_params::base_addr, _sdram_params::bus_width, _sdram_params::cas_latency, _sdram_params::cols, DEFAULT_CMDDLY, DEFAULT_FBCLKDLY, initial_calibration_value, LPC_EMC, LPC_SC, NS_2_CLKS, NUT_HWCLK_CPU, NutArchClockGet(), original_cmdclkdelay, original_fbclkdelay, _sdram_params::ras_latency, _sdram_params::refresh, _sdram_params::tAPR, _sdram_params::tDAL, _sdram_params::tMRD, _sdram_params::tRAS, _sdram_params::tRC, _sdram_params::tRFC, _sdram_params::tRP, _sdram_params::tRRD, _sdram_params::tSREX, _sdram_params::tWR, and _sdram_params::tXSR.

Referenced by NutBoardInit().

Here is the call graph for this function:

void Lpc177x_8x_EmcConfigEndianMode

(

uint32_t

endian_mode

)

Configure Little Endian/Big Endian mode for EMC.

Parameters:

endian_mode

Endian mode, should be: EMC_LITTLE_ENDIAN_MODE: Little-endian mode EMC_BIG_ENDIAN_MODE : Big-endian mode

Returns:

none

References EMC_Config_MASK, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlClockEnable

(

uint32_t

clock_enable

)

Set the value for dynamic clock enable bit.

Parameters:

clock_enable

clock enable mode, should be: 0: Clock enable of idle devices are deasserted to save power EMC_DynamicControl_CE: All clock enables are driven HIGH continuously

Returns:

none

References EMC_DynamicControl_CE, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlClockControl

(

uint32_t

clock_control

)

Set the value for dynamic memory clock control: stops or runs continuously.

Parameters:

clock_control

clock control mode, should be: 0: CLKOUT stops when all SDRAMs are idle and during self-refresh mode EMC_DynamicControl_CS: CLKOUT runs continuously

Returns:

none

References EMC_DynamicControl_CS, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlSelfRefresh

(

uint32_t

self_refresh_mode

)

Switch the Self-refresh mode between normal and self-refresh mode.

Parameters:

self_refresh_mode

self refresh mode, should be: 0: Normal mode EMC_DynamicControl_SR: Enter self-refresh mode

Returns:

none

References EMC_DynamicControl_SR, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlMMC

(

uint32_t

mmc_val

)

Enable/disable CLKOUT.

Parameters:

MMC_val

Memory clock control mode, should be: 0: CLKOUT enabled EMC_DynamicControl_MMC: CLKOUT disabled

Returns:

none

References EMC_DynamicControl_MMC, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlSDRAMCmd

(

uint32_t

sdram_command

)

Issue SDRAM command.

Parameters:

sdram_command

Command mode, should be: 0x00: Issue SDRAM NORMAL operation command 0x01: Issue SDRAM MODE command 0x02: Issue SDRAM PALL (precharge all) command 0x03: Issue SRAM NOP (no operation) command

Returns:

none

References EMC_DynamicControl_I, and LPC_EMC.

void Lpc177x_8x_EmcDynCtrlPowerDownMode

(

uint32_t

power_command

)

Switch between Normal operation and deep sleep power mode.

Parameters:

power_command

Low-power SDRAM deep-sleep mode, should be: 0: Normal operation EMC_DynamicControl_DP: Enter deep-sleep mode

Returns:

none

References EMC_DynamicControl_DP, and LPC_EMC.

void Lpc177x_8x_EmcSetDynMemoryParameter	(	EMC_DYN_MEM_PAR	par,
		uint32_t	val
	)

Set the value of EMC dynamic memory registers.

Parameters:

par

EMC register that will set value, should be: EMC_DYN_MEM_REFRESH_TIMER: Dynamic Refresh register EMC_DYN_MEM_READ_CONFIG: Dynamic Read Config register EMC_DYN_MEM_TRP: Dynamic RP register EMC_DYN_MEM_TRAS: Dynamic RAS register EMC_DYN_MEM_TSREX: Dynamic SREX register EMC_DYN_MEM_TAPR: Dynamic APR register EMC_DYN_MEM_TDAL: Dynamic DAL register EMC_DYN_MEM_TWR: Dynamic WR register EMC_DYN_MEM_TRC: Dynamic RC register EMC_DYN_MEM_TRFC: Dynamic RFC register EMC_DYN_MEM_TXSR: Dynamic XSR register EMC_DYN_MEM_TRRD: Dynamic RRD register EMC_DYN_MEM_TMRD: Dynamic MRD register

Returns:

none

References EMC_DYN_MEM_READ_CONFIG, EMC_DYN_MEM_REFRESH_TIMER, EMC_DYN_MEM_TAPR, EMC_DYN_MEM_TDAL, EMC_DYN_MEM_TMRD, EMC_DYN_MEM_TRAS, EMC_DYN_MEM_TRC, EMC_DYN_MEM_TRFC, EMC_DYN_MEM_TRP, EMC_DYN_MEM_TRRD, EMC_DYN_MEM_TSREX, EMC_DYN_MEM_TWR, EMC_DYN_MEM_TXSR, and LPC_EMC.

void Lpc177x_8x_EmcStaticExtendedWait

(

uint32_t

timeout

)

Set extended wait time out for accessing static memory.

Parameters:

timeout

timeout value that will be set

Returns:

none

References LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigMD	(	uint32_t	cs,
		uint32_t	mem_dev
	)

Configure the memory device.

Parameters:

cs	number of chip select, should be from 0 to 3
mem_dev	memory device type, should be: 0x00: Low-power SDRAM 0x01: Low-power SDRAM 0x02: Micron Syncflash

Returns:

none

References LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigAM	(	uint32_t	cs,
		uint32_t	addr_mapped
	)

Map the address for the memory device.

Parameters:

cs	number of chip select, should be from 0 to 3
addr_mapped	address where the memory will be mapped

Returns:

none

References _BV, and LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigB	(	uint32_t	cs,
		uint32_t	buff_control
	)

Enable/disable the buffer.

Parameters:

cs	number of chip select, should be from 0 to 3
buff_control	buffer control mode, should be: 0 - buffer disabled EMC_StaticConfig_B: buffer enabled for the selected chip select

Returns:

none

References EMC_DynamicConfig_B, and LPC_EMC.

void Lpc177x_8x_EmcDynMemConfigP	(	uint32_t	cs,
		uint32_t	permission
	)

Configure write permission: protect or not.

Parameters:

cs	number of chip select, should be from 0 to 3
permission	permission mode, should be: 0 - not protected EMC_StaticConfig_P: write protection enabled

Returns:

none

References EMC_DynamicConfig_P, and LPC_EMC.

void Lpc177x_8x_EmcDynMemRAS	(	uint32_t	cs,
		uint32_t	ras_val
	)

Set value for RAS latency.

Parameters:

cs	number of chip select, should be from 0 to 3
ras_val	RAS value should be in range: 0..3

Returns:

none

References LPC_EMC.

void Lpc177x_8x_EmcDynMemCAS	(	uint32_t	cs,
		uint32_t	cas_val
	)

Set value for CAS latency.

Parameters:

cs	number of chip select, should be from 0 to 3
cas_val	CAS value should be in range: 0..3

Returns:

none

References LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigMW	(	uint32_t	cs,
		uint32_t	mem_width
	)

Configure the memory bus width.

Parameters:

cs	number of chip select, should be from 0 to 3
mem_width	memory width, should be: EMC_StaticConfig_MW_8BITS EMC_StaticConfig_MW_16BITS EMC_StaticConfig_MW_32BITS

Returns:

none

References LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigPM	(	uint32_t	cs,
		uint32_t	page_mode
	)

Configure the page mode.

Parameters:

cs	number of chip select, should be from 0 to 3
page_mode	page mode, should be 0: disable EMC_StaticConfig_PM: asynchronous page mode enable

Returns:

none

References EMC_StaticConfig_PM, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigPC	(	uint32_t	cs,
		uint32_t	polarity
	)

Configure the chip select polarity.

Parameters:

cs	number of chip select, should be from 0 to 3
polarity	chip select polarity, should be: 0: Active LOW ship select EMC_StaticConfig_PC: Active HIGH chip select

Returns:

none

References EMC_StaticConfig_PC, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigPB	(	uint32_t	cs,
		uint32_t	pb_val
	)

Configure the byte lane state.

Parameters:

cs	number of chip select, should be from 0 to 3
pb_val	Byte lane state, should be: 0: For reads all bits in BLSn[3:0] are HIGH. EMC_StaticConfig_PB: For reads all bits in BLSn[3:0] are LOW.

Returns:

none

References EMC_StaticConfig_PB, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigEW	(	uint32_t	cs,
		uint32_t	ex_wait
	)

Configure the extended wait value.

Parameters:

cs	number of chip select, should be from 0 to 3
ex_wait	Extended wait mode, should be: 0: Extended wait disabled. EMC_StaticConfig_EW: Extended wait enabled.

Returns:

none

References EMC_StaticConfig_EW, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigB	(	uint32_t	cs,
		uint32_t	buf_val
	)

Configure the buffer enable value.

Parameters:

cs	number of chip select, should be from 0 to 3
buf_val	Buffer mode, should be: 0: Buffer disabled. EMC_StaticConfig_B: Buffer enabled.

Returns:

none

References EMC_StaticConfig_B, and LPC_EMC.

void Lpc177x_8x_EmcStaticMemConfigpP	(	uint32_t	cs,
		uint32_t	permission
	)

Configure the write permission.

Parameters:

cs	number of chip select, should be from 0 to 3
permission	Permission mode, should be: 0: Write not protected. EMC_StaticConfig_P: Write protected.

Returns:

none

References _BV, and LPC_EMC.

void Lpc177x_8x_EmcSetStaticMemoryParameter	(	uint32_t	cs,
		EMC_STA_MEM_PAR	par,
		uint32_t	val
	)

Set the value of LPC_EMC static memory registers.

Parameters:

cs	number of chip select, should be from 0 to 3
par	Static register, should be: EMC_STA_MEM_WAITWEN: StaticWaitWen0 register EMC_STA_MEM_WAITOEN: StaticWaitOen0 register EMC_STA_MEM_WAITRD: StaticWaitRd0 register EMC_STA_MEM_WAITPAGE: StaticWaitPage0 register EMC_STA_MEM_WAITWR: StaticWaitWr0 register EMC_STA_MEM_WAITTURN: StaticWaitTurn0 register
val	register value to set

Returns:

none

References EMC_STA_MEM_WAITOEN, EMC_STA_MEM_WAITPAGE, EMC_STA_MEM_WAITRD, EMC_STA_MEM_WAITTURN, EMC_STA_MEM_WAITWEN, EMC_STA_MEM_WAITWR, and LPC_EMC.

---

Variable Documentation

volatile uint32_t original_cmdclkdelay = 0

Referenced by Lpc177x_8x_EmcSDRAMAdjustTiming(), and Lpc177x_8x_EmcSDRAMInit().

volatile uint32_t original_fbclkdelay = 0

Referenced by Lpc177x_8x_EmcSDRAMAdjustTiming(), and Lpc177x_8x_EmcSDRAMInit().

volatile uint32_t initial_calibration_value

Referenced by Lpc177x_8x_EmcSDRAMAdjustTiming(), and Lpc177x_8x_EmcSDRAMInit().