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Ethernut 3.1 Rev-D

Ethernut 3.1 Rev-A


Hardware References

Ethernut 3.1 Rev-D Hardware User's Manual
including all schematics.

Ethernut 3 Memory Map
Ethernut 3 memory layout.

Ethernut 3 CPLD
A detailed description of the CPLD registers.
Eagle 4.11 schematic and board file.


Solving Incompatibilities
How to create firmware binaries running on Ethernut 3.1 and 3.0.

Nut/OS on Ethernut 3
How to install Nut/OS with a cross compiler and try a few sample applications on Ethernut 3.

JTAG Interface
Introduction to Ethernut 3 JTAG programming. Additionally describes how to restore the TFTP Boot Loader.

OpenOCD and Ethernut 3
How to use OpenOCD with Ethernut 3 and Turtelizer 2.

Booting Ethernut 3
explains in detail how to get your Ethernut 3 application running after power-up.

NPL Upgrade
How to upgrade the CPLD logic. It explains how to build and upload a new contents for the CPLD easily within seconds and without any special programming adapter.

An introduction to the programmable clock chip used on Ethernut 3.0 Rev-D and Rev-E.

Changes Compared to Version 3.0 Rev-E

Several parts had been replaced on board version 3.1:

The following parts had been added:

The following parts had been removed:

Finally all known bugs of the predecessor 3.0 Rev-E had been fixed:

Known Bugs

Due to a missing pull-up resistor, the FBUSY line of the NOR Flash is not functioning. Alternative methods like the toggle bit algorithm or data polling must be used.