Nut/OS  5.0.5
API Reference
Data Fields
SCB_Type Struct Reference
System Control Block (SCB)

Structure type to access the System Control Block (SCB). More...

#include <core_cm3.h>

Collaboration diagram for SCB_Type:
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Data Fields

__I uint32_t CPUID
__IO uint32_t ICSR
__IO uint32_t VTOR
__IO uint32_t AIRCR
__IO uint32_t SCR
__IO uint32_t CCR
__IO uint8_t SHP [12]
__IO uint32_t SHCSR
__IO uint32_t CFSR
__IO uint32_t HFSR
__IO uint32_t DFSR
__IO uint32_t MMFAR
__IO uint32_t BFAR
__IO uint32_t AFSR
__I uint32_t PFR [2]
__I uint32_t DFR
__I uint32_t ADR
__I uint32_t MMFR [4]
__I uint32_t ISAR [5]
uint32_t RESERVED0 [5]
__IO uint32_t CPACR

Detailed Description

Structure type to access the System Control Block (SCB).

Field Documentation

__I uint32_t SCB_Type::CPUID

Offset: 0x000 (R/ ) CPUID Base Register

__IO uint32_t SCB_Type::ICSR

Offset: 0x004 (R/W) Interrupt Control and State Register

__IO uint32_t SCB_Type::VTOR

Offset: 0x008 (R/W) Vector Table Offset Register

__IO uint32_t SCB_Type::AIRCR

Offset: 0x00C (R/W) Application Interrupt and Reset Control Register

__IO uint32_t SCB_Type::SCR

Offset: 0x010 (R/W) System Control Register

__IO uint32_t SCB_Type::CCR

Offset: 0x014 (R/W) Configuration Control Register

__IO uint8_t SCB_Type::SHP

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)

__IO uint32_t SCB_Type::SHCSR

Offset: 0x024 (R/W) System Handler Control and State Register

__IO uint32_t SCB_Type::CFSR

Offset: 0x028 (R/W) Configurable Fault Status Register

__IO uint32_t SCB_Type::HFSR

Offset: 0x02C (R/W) HardFault Status Register

__IO uint32_t SCB_Type::DFSR

Offset: 0x030 (R/W) Debug Fault Status Register

__IO uint32_t SCB_Type::MMFAR

Offset: 0x034 (R/W) MemManage Fault Address Register

__IO uint32_t SCB_Type::BFAR

Offset: 0x038 (R/W) BusFault Address Register

__IO uint32_t SCB_Type::AFSR

Offset: 0x03C (R/W) Auxiliary Fault Status Register

__I uint32_t SCB_Type::PFR

Offset: 0x040 (R/ ) Processor Feature Register

__I uint32_t SCB_Type::DFR

Offset: 0x048 (R/ ) Debug Feature Register

__I uint32_t SCB_Type::ADR

Offset: 0x04C (R/ ) Auxiliary Feature Register

__I uint32_t SCB_Type::MMFR

Offset: 0x050 (R/ ) Memory Model Feature Register

__I uint32_t SCB_Type::ISAR

Offset: 0x060 (R/ ) Instruction Set Attributes Register

uint32_t SCB_Type::RESERVED0
__IO uint32_t SCB_Type::CPACR

Offset: 0x088 (R/W) Coprocessor Access Control Register

The documentation for this struct was generated from the following files: