#include <cfg/mma745x.h>
Go to the source code of this file.
Data Structures | |
struct | mma10bit_t |
struct | mma8bit_t |
struct | mmaInit_t |
struct | mmaState_t |
Defines | |
#define | I2C_SLA_MMA745x 0x1D |
#define | MMA745x_REG_XOUTL 0x00 |
#define | MMA745x_REG_XOUTH 0x01 |
#define | MMA745x_REG_YOUTL 0x02 |
#define | MMA745x_REG_YOUTH 0x03 |
#define | MMA745x_REG_ZOUTL 0x04 |
#define | MMA745x_REG_ZOUTH 0x05 |
#define | MMA745x_REG_XOUT8 0x06 |
#define | MMA745x_REG_YOUT8 0x07 |
#define | MMA745x_REG_ZOUT8 0x08 |
#define | MMA745x_REG_STATUS 0x09 |
#define | MMA745x_REG_DETSRC 0x0A |
#define | MMA745x_REG_TOUT 0x0B |
#define | MMA745x_REG_I2CAD 0x0D |
#define | MMA745x_REG_USRINF 0x0E |
#define | MMA745x_REG_WHOAMI 0x0E |
#define | MMA745x_REG_XOFFL 0x10 |
#define | MMA745x_REG_XOFFH 0x11 |
#define | MMA745x_REG_YOFFL 0x12 |
#define | MMA745x_REG_YOFFH 0x13 |
#define | MMA745x_REG_ZOFFL 0x14 |
#define | MMA745x_REG_ZOFFH 0x15 |
#define | MMA745x_REG_MCTL 0x16 |
#define | MMA745x_REG_INTRST 0x17 |
#define | MMA745x_REG_CTL1 0x18 |
#define | MMA745x_REG_CTL2 0x19 |
#define | MMA745x_REG_LDTH 0x1A |
#define | MMA745x_REG_PDTH 0x1B |
#define | MMA745x_REG_PW 0x1C |
#define | MMA745x_REG_LT 0x1D |
#define | MMA745x_REG_TW 0x1E |
#define | MMA745X_STATUS_DRDY (1 << 0) |
#define | MMA745X_STATUS_DOVR (1 << 1) |
#define | MMA745X_STATUS_PERR (1 << 2) |
#define | MMA745x_DETSRC_INT1 (1 << 0) |
#define | MMA745x_DETSRC_INT2 (1 << 1) |
#define | MMA745x_DETSRC_PDZ (1 << 2) |
#define | MMA745x_DETSRC_PDY (1 << 3) |
#define | MMA745x_DETSRC_PDX (1 << 4) |
#define | MMA745x_DETSRC_LDZ (1 << 5) |
#define | MMA745x_DETSRC_LDY (1 << 6) |
#define | MMA745x_DETSRC_LDX (1 << 7) |
#define | MMA745x_I2CAD_I2CDIS (1 << 7) |
#define | MMA745x_I2CAD_I2CMSK (0x7F) |
#define | MMA745X_MCTL_STBY (0x00 << 0) |
#define | MMA745X_MCTL_MEAS (0x01 << 0) |
#define | MMA745X_MCTL_LVL (0x02 << 0) |
#define | MMA745X_MCTL_PLS (0x03 << 0) |
#define | MMA745X_MCTL_MSK (0x03 << 0) |
#define | MMA745X_MCTL_GLVL_8G (0x00 << 2) |
#define | MMA745X_MCTL_GLVL_4G (0x02 << 2) |
#define | MMA745X_MCTL_GLVL_2G (0x01 << 2) |
#define | MMA745X_MCTL_GLVL_MSK (0x03 << 2) |
#define | MMA745X_MCTL_STON (1 << 4) |
#define | MMA745X_MCTL_SPI3W (1 << 5) |
#define | MMA745X_MCTL_DRPD (1 << 6) |
#define | MMA745x_INTRST_CLRINT1 (1 << 0) |
#define | MMA745x_INTRST_CLRINT2 (1 << 1) |
#define | MMA745x_INTRST_MSK (MMA745x_INTRST_CLRINT1 | MMA745x_INTRST_CLRINT2) |
#define | MMA745x_CTL1_INTREV (1 << 0) |
#define | MMA745x_CTL1_L1P2 (0x00 << 1) |
#define | MMA745x_CTL1_P1L2 (0x01 << 1) |
#define | MMA745x_CTL1_P1P2 (0x02 << 1) |
#define | MMA745x_CTL1_XDA (1 << 3) |
#define | MMA745x_CTL1_YDA (1 << 4) |
#define | MMA745x_CTL1_ZDA (1 << 5) |
#define | MMA745x_CTL1_THOPT (1 << 6) |
#define | MMA745x_CTL1_DFBW (1 << 7) |
#define | MMA745x_CTL2_LDPL (1 << 0) |
#define | MMA745x_CTL2_PDPL (1 << 1) |
#define | MMA745x_CTL2_DRVO (1 << 2) |
#define | MMA745x_LDTH_SMSK 0x7F |
#define | MMA745x_PDTH_SMSK 0x7F |
#define | MMA745x_PW_MSK 0xFF |
#define | MMA745x_LT_MSK 0xFF |
#define | MMA745x_TW_MSK 0xFF |
#define | MMA745X_RANGE MMA745X_MCTL_GLVL_8G |
#define | MMA74xx_MODE (MMA745X_MCTL_MEAS | MMA745X_RANGE) |
#define | MMA_GET_STATE 0 |
#define | MMA_SET_MODE 1 |
#define | MMA_GET_IRQ 2 |
#define | MMA_SET_IRQ 3 |
#define | MMA_CLR_IRQ 4 |
Functions | |
int | Mma745xWrite (uint_fast8_t reg, void *val, size_t len) |
int | Mma745xRead (uint_fast8_t reg, void *val, size_t len) |
int | Mma745xReadVal8 (mma8bit_t *val) |
int | Mma745xReadVal10 (uint8_t ofs, mma10bit_t *val) |
int | Mma745xReadG (mma10bit_t *val) |
int | Mma745xReadCal (mma10bit_t *cal) |
int | Mma745xWriteCal (mma10bit_t *cal) |
int | Mma745xCtl (uint_fast8_t fkt, void *val) |
int | Mma745xInit (uint_fast8_t selftest, mmaInit_t *init) |
#define I2C_SLA_MMA745x 0x1D |
Referenced by Mma745xRead(), and Mma745xWrite().
#define MMA745x_REG_XOUTL 0x00 |
ro: Value X-Axis 10 bit resolution LSB
#define MMA745x_REG_XOUTH 0x01 |
ro: Value X-Axis 10 bit resolution MSB
#define MMA745x_REG_YOUTL 0x02 |
ro: Value Y-Axis 10 bit resolution LSB
#define MMA745x_REG_YOUTH 0x03 |
ro: Value Y-Axis 10 bit resolution MSB
#define MMA745x_REG_ZOUTL 0x04 |
ro: Value Z-Axis 10 bit resolution LSB
#define MMA745x_REG_ZOUTH 0x05 |
ro: Value Z-Axis 10 bit resolution MSB
#define MMA745x_REG_XOUT8 0x06 |
ro: Value X-Axis 8 bit resolution
Referenced by Mma745xReadVal8().
#define MMA745x_REG_YOUT8 0x07 |
ro: Value Y-Axis 8 bit resolution
#define MMA745x_REG_ZOUT8 0x08 |
ro: Value Z-Axis 8 bit resolution
#define MMA745x_REG_STATUS 0x09 |
ro: Status register
Referenced by Mma745xCtl().
#define MMA745x_REG_DETSRC 0x0A |
ro: Detection source register
Referenced by Mma745xCtl().
#define MMA745x_REG_TOUT 0x0B |
ro: Optional temperature output register
#define MMA745x_REG_I2CAD 0x0D |
rw: I2C device address register
#define MMA745x_REG_USRINF 0x0E |
ro: Optional user information register
#define MMA745x_REG_WHOAMI 0x0E |
ro: Optional chip ID register
#define MMA745x_REG_XOFFL 0x10 |
X-Axis offset drift register LSB
Referenced by Mma745xReadCal(), and Mma745xWriteCal().
#define MMA745x_REG_XOFFH 0x11 |
X-Axis offset drift register MSB
#define MMA745x_REG_YOFFL 0x12 |
Y-Axis offset drift register LSB
#define MMA745x_REG_YOFFH 0x13 |
Y-Axis offset drift register MSB
#define MMA745x_REG_ZOFFL 0x14 |
Z-Axis offset drift register LSB
#define MMA745x_REG_ZOFFH 0x15 |
Z-Axis offset drift register MSB
#define MMA745x_REG_MCTL 0x16 |
Mode control register
Referenced by Mma745xCtl(), and Mma745xInit().
#define MMA745x_REG_INTRST 0x17 |
Interrupt latch reset register
Referenced by Mma745xCtl().
#define MMA745x_REG_CTL1 0x18 |
Control register 1
#define MMA745x_REG_CTL2 0x19 |
Control register 2
#define MMA745x_REG_LDTH 0x1A |
Level detection threshold value
#define MMA745x_REG_PDTH 0x1B |
Pulse detection threshold value
#define MMA745x_REG_PW 0x1C |
Pulse duration value
#define MMA745x_REG_LT 0x1D |
Latency time value
#define MMA745x_REG_TW 0x1E |
Time window for 2nd pulse value (double-click detection)
#define MMA745X_STATUS_DRDY (1 << 0) |
1: Data ready
#define MMA745X_STATUS_DOVR (1 << 1) |
1: Overrun (previous data was overwritten before it was read.)
#define MMA745X_STATUS_PERR (1 << 2) |
1: Parity error in trim data, self-test is disabled
#define MMA745x_DETSRC_INT1 (1 << 0) |
1: Interruppt signal INT1 assigned by INTGR detected.
#define MMA745x_DETSRC_INT2 (1 << 1) |
1: Interruppt signal INT2 assigned by INTGR detected.
#define MMA745x_DETSRC_PDZ (1 << 2) |
1: Pulse detection on Z-axis
#define MMA745x_DETSRC_PDY (1 << 3) |
1: Pulse detection on Y-axis
#define MMA745x_DETSRC_PDX (1 << 4) |
1: Pulse detection on X-axis
#define MMA745x_DETSRC_LDZ (1 << 5) |
1: Level detection on Z-axis
#define MMA745x_DETSRC_LDY (1 << 6) |
1: Level detection on Y-axis
#define MMA745x_DETSRC_LDX (1 << 7) |
1: Level detection on X-axis
#define MMA745x_I2CAD_I2CDIS (1 << 7) |
rw: 0: I2C and SPI available / 1: I2C disabled
#define MMA745x_I2CAD_I2CMSK (0x7F) |
ro: Mask to read chips I2C address
#define MMA745X_MCTL_STBY (0x00 << 0) |
rw: Mode standby
#define MMA745X_MCTL_MEAS (0x01 << 0) |
rw: Mode measurement, INT1/DRDY pin may serve as data ready signal.
#define MMA745X_MCTL_LVL (0x02 << 0) |
rw: Mode level detection, INTx may serve as level interrupt.
#define MMA745X_MCTL_PLS (0x03 << 0) |
rw: Mode pulse detection, INTx may serve as pulse interrupt.
#define MMA745X_MCTL_MSK (0x03 << 0) |
Mask mode bits
#define MMA745X_MCTL_GLVL_8G (0x00 << 2) |
rw: Measurement range is 8g.
Referenced by Mma745xReadG().
#define MMA745X_MCTL_GLVL_4G (0x02 << 2) |
rw: Measurement range is 4g.
Referenced by Mma745xReadG().
#define MMA745X_MCTL_GLVL_2G (0x01 << 2) |
rw: Measurement range is 2g.
Referenced by Mma745xReadG().
#define MMA745X_MCTL_GLVL_MSK (0x03 << 2) |
Mask measurement range.
Referenced by Mma745xReadG().
#define MMA745X_MCTL_STON (1 << 4) |
rw: 1: Self-test is anebled.
Referenced by Mma745xInit().
#define MMA745X_MCTL_SPI3W (1 << 5) |
rw: 1: SPI in 3-wire mode, 0: SPI is 4-wire mode.
#define MMA745X_MCTL_DRPD (1 << 6) |
rw: 1: Data ready status is output to INT1/DRDY pin.
#define MMA745x_INTRST_CLRINT1 (1 << 0) |
rw: 1: Clear INT1, 0: Enable INT1
#define MMA745x_INTRST_CLRINT2 (1 << 1) |
rw: 1: Clear INT2, 0: Enable INT2
#define MMA745x_INTRST_MSK (MMA745x_INTRST_CLRINT1 | MMA745x_INTRST_CLRINT2) |
Referenced by Mma745xCtl().
#define MMA745x_CTL1_INTREV (1 << 0) |
rw: 0: Routing: sig INT1 to pin INT1/DRDY, signal INT2 to pin INT2 1: Routing: sig INT1 to pin INT2, signal INT2 to pin INT1/DRDY
#define MMA745x_CTL1_L1P2 (0x00 << 1) |
rw: INT1 signal is level detection, INT2 signal is pulse detection
#define MMA745x_CTL1_P1L2 (0x01 << 1) |
rw: INT1 signal is pulse detection, INT2 signal is level detection
#define MMA745x_CTL1_P1P2 (0x02 << 1) |
rw: INT1 signal is single pulse, INT2 signal is double pulse detection.
#define MMA745x_CTL1_XDA (1 << 3) |
rw: 0: Enable / 1: Disable X-axis for detection.
#define MMA745x_CTL1_YDA (1 << 4) |
rw: 0: Enable / 1: Disable Y-axis for detection.
#define MMA745x_CTL1_ZDA (1 << 5) |
rw: 0: Enable / 1: Disable Z-axis for detection.
#define MMA745x_CTL1_THOPT (1 << 6) |
rw: 0: Threshold is absolute, 1: Threshold is signed integer.
#define MMA745x_CTL1_DFBW (1 << 7) |
rw: 0: Bandwidth filter is 62.5Hz, 1: 125Hz.
#define MMA745x_CTL2_LDPL (1 << 0) |
rw: 0: Level detection polarity positive, 3-axes OR-ed. 1: Level detection polarity negative, 3-axes AND-ed.
#define MMA745x_CTL2_PDPL (1 << 1) |
rw: 0: Pulse detection polarity positive, 3-axes OR-ed. 1: Pulse detection polarity negative, 3-axes AND-ed.
#define MMA745x_CTL2_DRVO (1 << 2) |
rw: 0: Standard / 1: strong drive strength on SDA/SDO pin.
#define MMA745x_LDTH_SMSK 0x7F |
Mask for value if THOPT in CTL1 is 0.
#define MMA745x_PDTH_SMSK 0x7F |
Mask for value if THOPT in CTL1 is 0.
#define MMA745x_PW_MSK 0xFF |
Pulse duration value mask.
#define MMA745x_LT_MSK 0xFF |
Latency time value mask.
#define MMA745x_TW_MSK 0xFF |
Time window for 2nd pulse value (double-click detection)
#define MMA745X_RANGE MMA745X_MCTL_GLVL_8G |
#define MMA74xx_MODE (MMA745X_MCTL_MEAS | MMA745X_RANGE) |
#define MMA_GET_STATE 0 |
Referenced by Mma745xCtl().
#define MMA_SET_MODE 1 |
Referenced by Mma745xCtl().
#define MMA_GET_IRQ 2 |
Referenced by Mma745xCtl().
#define MMA_SET_IRQ 3 |
Referenced by Mma745xCtl().
#define MMA_CLR_IRQ 4 |
Referenced by Mma745xCtl().
int Mma745xWrite | ( | uint_fast8_t | reg, |
void * | val, | ||
size_t | len | ||
) |
brief write to MMA7455L via I2C.
Write one byte to a register in the sensor. reg Register in sensor to address. val Pointer to value to write.
References I2C_SLA_MMA745x, and TwMasterRegWrite.
Referenced by Mma745xCtl(), Mma745xInit(), and Mma745xWriteCal().
int Mma745xRead | ( | uint_fast8_t | reg, |
void * | val, | ||
size_t | len | ||
) |
brief read from MMA7455L via I2C.
Read one byte from a register in the sensor. reg Register in sensor to address. val Pointer to store the value.
References I2C_SLA_MMA745x, and TwMasterRegRead.
Referenced by Mma745xCtl(), Mma745xReadVal10(), and Mma745xReadVal8().
int Mma745xReadVal8 | ( | mma8bit_t * | val | ) |
bief read all axes of the sensor as raw value.
This function read the current sensor values. Depending on the setup the values are in range of: 2g Mode: -2g..0g..2g -> 0x80..0x00..0x7f 4g Mode: -4g..0g..4g -> 0x80..0x00..0x7f 8g Mode: -8g..0g..8g -> 0x80..0x00..0x7f
para Pointer to mma8bit_t struct to store results in. result 0 if request was successfull, else -1;
References MMA745x_REG_XOUT8, and Mma745xRead().
Referenced by Mma745xReadG().
int Mma745xReadVal10 | ( | uint8_t | ofs, |
mma10bit_t * | val | ||
) |
bief read all axes of the sensor as raw value.
This function read the current sensor values. Depending on the setup the values are in range of: 8g Mode: -8g..0g..8g -> 0x0200..0x0000..0x01ff
para Pointer to mma8bit_t struct to store results in. result 0 if request was successfull, else -1;
References Con2Cpl, Mma745xRead(), mma10bit_t::x, mma10bit_t::y, and mma10bit_t::z.
Referenced by Mma745xReadCal().
int Mma745xReadG | ( | mma10bit_t * | val | ) |
References MMA745X_MCTL_GLVL_2G, MMA745X_MCTL_GLVL_4G, MMA745X_MCTL_GLVL_8G, MMA745X_MCTL_GLVL_MSK, Mma745xReadVal8(), mmaInit_t::rMODE, mma10bit_t::x, mma8bit_t::x, mma10bit_t::y, mma8bit_t::y, mma10bit_t::z, and mma8bit_t::z.
int Mma745xReadCal | ( | mma10bit_t * | cal | ) |
int Mma745xWriteCal | ( | mma10bit_t * | cal | ) |
int Mma745xCtl | ( | uint_fast8_t | fkt, |
void * | val | ||
) |
References MMA745x_INTRST_MSK, MMA745x_REG_DETSRC, MMA745x_REG_INTRST, MMA745x_REG_MCTL, MMA745x_REG_STATUS, Mma745xRead(), Mma745xWrite(), MMA_CLR_IRQ, MMA_GET_IRQ, MMA_GET_STATE, MMA_SET_IRQ, MMA_SET_MODE, MPRINTF, and mmaInit_t::rMODE.
int Mma745xInit | ( | uint_fast8_t | selftest, |
mmaInit_t * | init | ||
) |
brief MMA7455L Initialization
Configure GPIO connections and preset MMA7455L registers.
References GPIO_CFG_PULLUP, GpioPinConfigSet(), memcpy(), MMA745X_MCTL_STON, MMA745x_REG_MCTL, Mma745xWrite(), MPRINTF, NULL, and NutHeapAlloc.