Signals
A0 - Address Bus Bit 0
Used with 8-bit data bus only and multiplexed with NLB.
A1-19 - Address Bus Bits 1-19
A20-23 - Address Bus Bits 20-23
Lines are multiplexed with CS7-4. Possible combinations are
A20, A21, A22, A23 (configuration by default)
A20, A21, A22, CS4
A20, A21, CS5, CS4
A20, CS6, CS5, CS4
CS7, CS6, CS5, CS4
ALARM# - RTC Interrupt
When used as frequency output, this signal has a frequency of 32.768kHz, 100Hz, 1Hz or inactive.
When used as interrupt output, this signal notifies the CPU that an alarm has occurred and an action is required.
BMS - Boot Mode Select
The input level on the BMS pin during the last 10 clock cycles before the rising edge of the NRST selects the type of boot memory. Ethernut uses a pull-down to keep this pin low. This selects 16-bit external memory on NCS0.
The BMS pin is multiplexed with the I/O line P24, which can be programmed after reset like any standard PIO line.
CS4-7 - Active High Chip Selects
D0-15 - Data Bus
MCKI - Master Clock Input
MCKO - Master Clock Output
While NRST is active, MCKO remains low. After the reset, the MCKO is valid and outputs an image of the MCK signal. The PIO controller must be programmed to use this pin as standard I/O line.
NCS0-3 - Active Low Chip Selects
Dedicated chip select lines.
NLB - Lower Byte Select
Low byte enable for 16-bit data bus and half word access. Multiplexed with A0.
NOE - Output Enable
Read strobe for 16-bit data bus.
NRD - Read Enable
Read strobe for 8-bit data bus. Multiplexed with NOE.
NRST - Reset
The signal presented on MCKI must be active within the specification for a minimum of 10 clock cycles up to the rising edge of NRST to ensure correct operation. The first processor fetch occurs 80 clock cycles after the rising edge of NRST.
NTRI - Tri-State Mode
To enter tri-state mode, the NTRI pin must be held low during the last 10 clock cycles before the rising edge of NRST. For normal operation, the NTRI pin must be held high during reset by a resistor of up to 400 kΩ. NTRI is multiplexed with I/O line P21 and USART1 serial data transmit line TXD1. Standard RS-232 drivers generally contain internal 400 kΩ pull-up resistors. If TXD1 is connected to a device not including this pull-up, the user must make sure that a high level is tied on NTRI while NRST is asserted.
NUB - Upper Byte Select
High byte enable for 16-bit data bus with half word access capability. Not used and not available on Ethernut.
NWAIT - Wait Request
NWDOVF - Watchdog Overflow
NWE - Write Enable
Write strobe for 16-bit data bus. Multiplexed with NWR0.
NWR0 - Lower Byte Write Enable
Write strobe for 8-bit data bus or for 16-bit data bus with two 8-bit devices. Multiplexed with NWE.
NWR1 - Upper Byte Write Enable
Write strobe used for 16-bit data bus with two 8-bit devices. Multiplexed with NUB.