gpio_nutos.c

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#include <arch/avr32.h>

#include <stdlib.h>
#include <string.h>

#include <dev/gpio.h>

#include <avr32/io.h>


/*
 * Convert the external bank to the AVR32 representation.
 */
static int get_avr32_bank(int bank)
{
    int avr32_bank = 0;

    switch (bank) {
    default:
    case NUTGPIO_PORT:
    case NUTGPIO_PORTA:
        avr32_bank = 0;
        break;
    case NUTGPIO_PORTB:
        avr32_bank = 1;
        break;
    case NUTGPIO_PORTC:
        avr32_bank = 2;
        break;
    case NUTGPIO_PORTD:
        avr32_bank = 3;
        break;
    case NUTGPIO_PORTE:
        avr32_bank = 4;
        break;
    case NUTGPIO_PORTF:
        avr32_bank = 5;
        break;
    case NUTGPIO_PORTG:
        avr32_bank = 6;
        break;
    case NUTGPIO_PORTH:
        avr32_bank = 7;
        break;
    case NUTGPIO_PORTI:
        avr32_bank = 8;
        break;
    case NUTGPIO_PORTJ:
        avr32_bank = 9;
        break;
    case NUTGPIO_PORTK:
        avr32_bank = 10;
        break;
    case NUTGPIO_PORTL:
        avr32_bank = 11;
        break;
    }

    if (avr32_bank >= AVR32_GPIO_PORT_LENGTH) {
        avr32_bank = AVR32_GPIO_PORT_LENGTH - 1;
    }

    return (avr32_bank);
}


static int enable_module_pin(int avr32_bank, int mask, unsigned int function)
{
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    // Enable the correct function.
    switch (function) {
    case GPIO_CFG_PERIPHERAL0: // A function.
        gpio_port->pmr0c = mask;
        gpio_port->pmr1c = mask;
        break;

    case GPIO_CFG_PERIPHERAL1: // B function.
        gpio_port->pmr0s = mask;
        gpio_port->pmr1c = mask;
        break;

    case GPIO_CFG_PERIPHERAL2: // C function.
        gpio_port->pmr0c = mask;
        gpio_port->pmr1s = mask;
        break;

    default:
        return -1;
    }

    // Disable GPIO control.
    gpio_port->gperc = mask;

    return 0;
}

int GpioPinGet(int bank, int bit)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    return (gpio_port->pvr >> (bit & 0x1F)) & 1;
}

void GpioPinSetLow(int bank, int bit)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    gpio_port->ovrc = 1 << (bit & 0x1F);        // Value to be driven on the I/O line: 0.
}

void GpioPinSetHigh(int bank, int bit)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    gpio_port->ovrs = 1 << (bit & 0x1F);        // Value to be driven on the I/O line: 1.
}

void GpioPinSet(int bank, int bit, int value)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    if (value) {
        gpio_port->ovrs = 1 << (bit & 0x1F);    // Value to be driven on the I/O line: 1.
    } else {
        gpio_port->ovrc = 1 << (bit & 0x1F);    // Value to be driven on the I/O line: 0.
    }
}

unsigned int GpioPortGet(int bank)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    return gpio_port->pvr;
}

void GpioPortSetLow(int bank, unsigned int mask)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    gpio_port->ovrc = mask;     // Value to be driven on the I/O line: 0.
}

void GpioPortSetHigh(int bank, unsigned int mask)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    gpio_port->ovrs = mask;     // Value to be driven on the I/O line: 1.
}

void GpioPortSet(int bank, unsigned int value)
{
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    gpio_port->ovr = value;
}

uint32_t GpioPinConfigGet(int bank, int bit)
{
    uint32_t rc = 0;
    uint8_t is_gpio = 0;
    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    if ((gpio_port->gper & _BV(bit)) == 0) {
        rc |= GPIO_CFG_DISABLED;
    } else {
        is_gpio = 1;
    }

    if (gpio_port->oder & _BV(bit)) {
        rc |= GPIO_CFG_OUTPUT;
    }

    if (gpio_port->gfer & _BV(bit)) {
        rc |= GPIO_CFG_DEBOUNCE;
    }

    if (gpio_port->puer & _BV(bit)) {
        rc |= GPIO_CFG_PULLUP;
    }

    if (is_gpio == 0) {
        if (gpio_port->pmr1 & _BV(bit)) {
            if (gpio_port->pmr0 & _BV(bit)) {
                rc |= GPIO_CFG_PERIPHERAL3;
            } else {
                rc |= GPIO_CFG_PERIPHERAL2;
            }
        } else {
            if (gpio_port->pmr0 & _BV(bit)) {
                rc |= GPIO_CFG_PERIPHERAL1;
            } else {
                rc |= GPIO_CFG_PERIPHERAL0;
            }
        }
    }

    return rc;
}

int GpioPortConfigSet(int bank, unsigned int mask, uint32_t flags)
{
#define PERIPHERALS_MASK (GPIO_CFG_PERIPHERAL0|GPIO_CFG_PERIPHERAL1|GPIO_CFG_PERIPHERAL2|GPIO_CFG_PERIPHERAL3)

    int avr32_bank = get_avr32_bank(bank);
    volatile avr32_gpio_port_t *gpio_port = &AVR32_GPIO.port[avr32_bank];

    if (flags & GPIO_CFG_PULLUP) {
        gpio_port->puers = mask;
    } else {
        gpio_port->puerc = mask;
    }

    if (flags & GPIO_CFG_DEBOUNCE) {
        gpio_port->gfers = mask;
    } else {
        gpio_port->gferc = mask;
    }

    if (flags & GPIO_CFG_OUTPUT) {
        gpio_port->oders = mask;
    } else {
        gpio_port->oderc = mask;
    }

    if (flags & PERIPHERALS_MASK) {
        enable_module_pin(avr32_bank, mask, flags & PERIPHERALS_MASK);
    }

    if (flags & (GPIO_CFG_DISABLED | PERIPHERALS_MASK)) {
        gpio_port->gperc = mask;
        gpio_port->oderc = mask;
    } else {
        gpio_port->gpers = mask;
    }

#undef PERIPHERALS_MASK
    return 0;
}

int GpioPinConfigSet(int bank, int bit, uint32_t flags)
{
    GpioPortConfigSet(bank, _BV(bit), flags);

    /* Check the result. */
    if (GpioPinConfigGet(bank, bit) != flags) {
        return -1;
    }
    return 0;
}

int GpioRegisterIrqHandler(GPIO_SIGNAL * sig, int bit, void (*handler) (void *), void *arg)
{
    int rc = 0;

    if (sig->ios_vector == 0) {
        /* This is the first call. Allocate the vector table. */
        sig->ios_vector = malloc(sizeof(GPIO_VECTOR) * 32);
        if (sig->ios_vector) {
            memset(sig->ios_vector, 0, sizeof(GPIO_VECTOR) * 32);
            /* Register our internal PIO interrupt service. */
            rc = NutRegisterIrqHandler(sig->ios_sig, sig->ios_handler, sig->ios_vector);
            if (rc == 0) {
                rc = NutIrqEnable(sig->ios_sig);
            }
        } else {
            rc = -1;
        }
    }
    sig->ios_vector[bit].iov_handler = handler;
    sig->ios_vector[bit].iov_arg = arg;

    return rc;
}

int GpioIrqEnable(GPIO_SIGNAL * sig, int bit)
{
    return (sig->ios_ctl) (NUT_IRQCTL_ENABLE, NULL, bit);
}

int GpioIrqDisable(GPIO_SIGNAL * sig, int bit)
{
    return (sig->ios_ctl) (NUT_IRQCTL_DISABLE, NULL, bit);
}