_AHDLCDCB Struct Reference

Asynchronous HDLC device information structure. More...

#include <dev/ahdlc.h>

Collaboration diagram for _AHDLCDCB:

Data Fields
uint32_t	dcb_modeflags
	Mode flags.
uint32_t	dcb_statusflags
	Status flags.
uint32_t	dcb_rtimeout
	Read timeout.
uint32_t	dcb_wtimeout
	Write timeout.
HANDLE	dcb_tx_rdy
	Queue of threads waiting for output buffer empty.
HANDLE	dcb_rx_rdy
	Queue of threads waiting for a character in the input buffer.
uint8_t	dcb_base
	Hardware base address.
volatile uint8_t *	dcb_rx_buf
	Input buffer.
volatile uint8_t	dcb_rx_idx
	Input buffer index for next incoming byte.
uint8_t	dcb_rd_idx
	Input buffer index for next byte to read.
uint8_t *	dcb_tx_buf
	Output buffer.
volatile uint8_t	dcb_tx_idx
	Output buffer index for next outgoing byte.
uint8_t	dcb_wr_idx
	Output buffer index for next byte to write.
HANDLE	dcb_mf_evt
	HDLC mode change event queue.
uint32_t	dcb_rx_accm
	32-bit receive ACCM.
uint32_t	dcb_tx_accm
	256-bit transmit ACCM.
uint16_t	dcb_rx_mru
	Maximum receive MRU.
uint16_t	dcb_tx_mru
	Maximum transmit MRU.

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Detailed Description

Asynchronous HDLC device information structure.

The start of this structure is equal to the UARTDCB structure.

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Field Documentation

uint32_t _AHDLCDCB::dcb_modeflags

Mode flags.

Referenced by AhdlcAt91IOCtl(), AhdlcAvrIOCtl(), AhdlcOutput(), and AhdlcRx().

uint32_t _AHDLCDCB::dcb_statusflags

Status flags.

uint32_t _AHDLCDCB::dcb_rtimeout

Read timeout.

Referenced by AhdlcAt91IOCtl(), AhdlcAt91Read(), AhdlcAvrIOCtl(), AhdlcAvrRead(), and AhdlcRx().

uint32_t _AHDLCDCB::dcb_wtimeout

Write timeout.

Referenced by AhdlcAt91IOCtl(), and AhdlcAvrIOCtl().

HANDLE _AHDLCDCB::dcb_tx_rdy

Queue of threads waiting for output buffer empty.

Threads are added to this queue when the output buffer is full or when flushing the output buffer.

HANDLE _AHDLCDCB::dcb_rx_rdy

Queue of threads waiting for a character in the input buffer.

Threads are added to this queue when the output buffer is empty.

Referenced by AhdlcAt91IOCtl(), AhdlcAt91Read(), AhdlcAvrIOCtl(), AhdlcAvrRead(), and AhdlcRx().

uint8_t _AHDLCDCB::dcb_base

Hardware base address.

This is a copy of the base address in the NUTDEVICE structure and required by the interrupt routine.

Referenced by AhdlcAt91Init(), AhdlcAt91IOCtl(), and AhdlcAvrInit().

volatile uint8_t* _AHDLCDCB::dcb_rx_buf

Input buffer.

This buffer is filled by the the receiver interrupt, so the contents of the buffer is volatile.

Referenced by AhdlcAt91Init(), AhdlcAt91Read(), AhdlcAvrInit(), AhdlcAvrRead(), and AhdlcRx().

volatile uint8_t _AHDLCDCB::dcb_rx_idx

Input buffer index for next incoming byte.

This volatile index is incremented by the receiver interrupt.

Referenced by AhdlcAt91Read(), AhdlcAvrRead(), and AhdlcRx().

uint8_t _AHDLCDCB::dcb_rd_idx

Input buffer index for next byte to read.

Referenced by AhdlcAt91Read(), AhdlcAvrRead(), and AhdlcRx().

uint8_t* _AHDLCDCB::dcb_tx_buf

Output buffer.

Referenced by AhdlcAt91Init(), and AhdlcAvrInit().

volatile uint8_t _AHDLCDCB::dcb_tx_idx

Output buffer index for next outgoing byte.

This volatile index is incremented by the transmit interrupt.

uint8_t _AHDLCDCB::dcb_wr_idx

Output buffer index for next byte to write.

HANDLE _AHDLCDCB::dcb_mf_evt

HDLC mode change event queue.

The frame receiver thread is waiting on this queue until the device is switched to HDLC mode.

Referenced by AhdlcAt91IOCtl(), AhdlcAvrIOCtl(), and AhdlcRx().

uint32_t _AHDLCDCB::dcb_rx_accm

32-bit receive ACCM.

uint32_t _AHDLCDCB::dcb_tx_accm

256-bit transmit ACCM.

Referenced by AhdlcAt91Init(), AhdlcAvrInit(), and AhdlcAvrIOCtl().

uint16_t _AHDLCDCB::dcb_rx_mru

Maximum receive MRU.

Referenced by AhdlcAt91Init(), AhdlcAvrInit(), AhdlcAvrIOCtl(), and AhdlcRx().

uint16_t _AHDLCDCB::dcb_tx_mru

Maximum transmit MRU.

Referenced by AhdlcAt91Init(), AhdlcAvrInit(), AhdlcAvrIOCtl(), and AhdlcOutput().

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The documentation for this struct was generated from the following file:

• include/dev/ahdlc.h