#include <arch/cm3.h>
#include <arch/cm3/stm/stm32f10x_rcc.h>
#include <sys/nutdebug.h>
#include <stdlib.h>
#include <errno.h>

Include dependency graph for stm32_rcc.c:

Defines
#define	assert_param NUTASSERT
#define	RCC_OFFSET (RCC_BASE - PERIPH_BASE)
#define	CR_OFFSET (RCC_OFFSET + 0x00)
#define	HSION_BitNumber 0x00
#define	CR_HSION_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BitNumber * 4))
#define	PLLON_BitNumber 0x18
#define	CR_PLLON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BitNumber * 4))
#define	CSSON_BitNumber 0x13
#define	CR_CSSON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BitNumber * 4))
#define	CFGR_OFFSET (RCC_OFFSET + 0x04)
#define	USBPRE_BitNumber 0x16
#define	CFGR_USBPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BitNumber * 4))
#define	BDCR_OFFSET (RCC_OFFSET + 0x20)
#define	RTCEN_BitNumber 0x0F
#define	BDCR_RTCEN_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BitNumber * 4))
#define	BDRST_BitNumber 0x10
#define	BDCR_BDRST_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BitNumber * 4))
#define	CSR_OFFSET (RCC_OFFSET + 0x24)
#define	LSION_BitNumber 0x00
#define	CSR_LSION_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BitNumber * 4))
#define	CR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF)
#define	CR_HSEBYP_Set ((uint32_t)0x00040000)
#define	CR_HSEON_Reset ((uint32_t)0xFFFEFFFF)
#define	CR_HSEON_Set ((uint32_t)0x00010000)
#define	CR_HSITRIM_Mask ((uint32_t)0xFFFFFF07)
#define	CFGR_PLL_Mask ((uint32_t)0xFFC0FFFF)
#define	CFGR_PLLMull_Mask ((uint32_t)0x003C0000)
#define	CFGR_PLLSRC_Mask ((uint32_t)0x00010000)
#define	CFGR_PLLXTPRE_Mask ((uint32_t)0x00020000)
#define	CFGR_SWS_Mask ((uint32_t)0x0000000C)
#define	CFGR_SW_Mask ((uint32_t)0xFFFFFFFC)
#define	CFGR_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F)
#define	CFGR_HPRE_Set_Mask ((uint32_t)0x000000F0)
#define	CFGR_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF)
#define	CFGR_PPRE1_Set_Mask ((uint32_t)0x00000700)
#define	CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF)
#define	CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800)
#define	CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF)
#define	CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000)
#define	CSR_RMVF_Set ((uint32_t)0x01000000)
#define	FLAG_Mask ((uint8_t)0x1F)
#define	CIR_BYTE2_ADDRESS ((uint32_t)0x40021009)
#define	CIR_BYTE3_ADDRESS ((uint32_t)0x4002100A)
#define	CFGR_BYTE4_ADDRESS ((uint32_t)0x40021007)
#define	BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET)
#define	HSEStartUp_TimeOut ((uint16_t)0x0500)
Functions
void	RCC_DeInit (void)
	Resets the RCC clock configuration to the default reset state.
void	RCC_HSEConfig (uint32_t RCC_HSE)
	Configures the External High Speed oscillator (HSE).
ErrorStatus	RCC_WaitForHSEStartUp (void)
	Waits for HSE start-up.
void	RCC_AdjustHSICalibrationValue (uint8_t HSICalibrationValue)
	Adjusts the Internal High Speed oscillator (HSI) calibration value.
void	RCC_HSICmd (FunctionalState NewState)
	Enables or disables the Internal High Speed oscillator (HSI).
void	RCC_PLLConfig (uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
	Configures the PLL clock source and multiplication factor.
void	RCC_PLLCmd (FunctionalState NewState)
	Enables or disables the PLL.
void	RCC_SYSCLKConfig (uint32_t RCC_SYSCLKSource)
	Configures the system clock (SYSCLK).
uint8_t	RCC_GetSYSCLKSource (void)
	Returns the clock source used as system clock.
void	RCC_HCLKConfig (uint32_t RCC_SYSCLK)
	Configures the AHB clock (HCLK).
void	RCC_PCLK1Config (uint32_t RCC_HCLK)
	Configures the Low Speed APB clock (PCLK1).
void	RCC_PCLK2Config (uint32_t RCC_HCLK)
	Configures the High Speed APB clock (PCLK2).
void	RCC_ITConfig (uint8_t RCC_IT, FunctionalState NewState)
	Enables or disables the specified RCC interrupts.
void	RCC_USBCLKConfig (uint32_t RCC_USBCLKSource)
	Configures the USB clock (USBCLK).
void	RCC_ADCCLKConfig (uint32_t RCC_PCLK2)
	Configures the ADC clock (ADCCLK).
void	RCC_LSEConfig (uint8_t RCC_LSE)
	Configures the External Low Speed oscillator (LSE).
void	RCC_LSICmd (FunctionalState NewState)
	Enables or disables the Internal Low Speed oscillator (LSI).
void	RCC_RTCCLKConfig (uint32_t RCC_RTCCLKSource)
	Configures the RTC clock (RTCCLK).
void	RCC_RTCCLKCmd (FunctionalState NewState)
	Enables or disables the RTC clock.
void	RCC_GetClocksFreq (RCC_ClocksTypeDef *RCC_Clocks)
	Returns the frequencies of different on chip clocks.
void	RCC_AHBPeriphClockCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
	Enables or disables the AHB peripheral clock.
void	RCC_APB2PeriphClockCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
	Enables or disables the High Speed APB (APB2) peripheral clock.
void	RCC_APB1PeriphClockCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
	Enables or disables the Low Speed APB (APB1) peripheral clock.
void	RCC_APB2PeriphResetCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
	Forces or releases High Speed APB (APB2) peripheral reset.
void	RCC_APB1PeriphResetCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
	Forces or releases Low Speed APB (APB1) peripheral reset.
void	RCC_BackupResetCmd (FunctionalState NewState)
	Forces or releases the Backup domain reset.
void	RCC_ClockSecuritySystemCmd (FunctionalState NewState)
	Enables or disables the Clock Security System.
void	RCC_MCOConfig (uint8_t RCC_MCO)
	Selects the clock source to output on MCO pin.
FlagStatus	RCC_GetFlagStatus (uint8_t RCC_FLAG)
	Checks whether the specified RCC flag is set or not.
void	RCC_ClearFlag (void)
	Clears the RCC reset flags.
ITStatus	RCC_GetITStatus (uint8_t RCC_IT)
	Checks whether the specified RCC interrupt has occurred or not.
void	RCC_ClearITPendingBit (uint8_t RCC_IT)
	Clears the RCC�s interrupt pending bits.

Defines

Functions

Define Documentation