Nut/OS  5.0.5
API Reference
npl.h
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00001 #ifndef _DEV_NPL_H_
00002 #define _DEV_NPL_H_
00003 
00004 /*
00005  * Copyright (C) 2005 by egnite Software GmbH
00006  * Copyright (C) 2009 by egnite GmbH
00007  *
00008  * All rights reserved.
00009  *
00010  * Redistribution and use in source and binary forms, with or without
00011  * modification, are permitted provided that the following conditions
00012  * are met:
00013  *
00014  * 1. Redistributions of source code must retain the above copyright
00015  *    notice, this list of conditions and the following disclaimer.
00016  * 2. Redistributions in binary form must reproduce the above copyright
00017  *    notice, this list of conditions and the following disclaimer in the
00018  *    documentation and/or other materials provided with the distribution.
00019  * 3. Neither the name of the copyright holders nor the names of
00020  *    contributors may be used to endorse or promote products derived
00021  *    from this software without specific prior written permission.
00022  *
00023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00024  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00025  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00026  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
00027  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00028  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00029  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00030  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00031  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00033  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00034  * SUCH DAMAGE.
00035  *
00036  * For additional information see http://www.ethernut.de/
00037  */
00038 
00039 #include <dev/irqreg.h>
00040 
00054 
00062 #ifndef NPL_BASE
00063 #if defined(ETHERNUT3)
00064 #define NPL_BASE        0x21000000
00065 #else
00066 #define NPL_BASE        0xFF00
00067 #endif
00068 #endif
00069 
00072 #define NPL_RSCR        _SFR_MEM8(NPL_BASE + 0x00)
00073 
00074 #define NPL_RSFON_BIT   0       
00075 #define NPL_RSFON       (1 << NPL_RSFON_BIT)  
00076 #define NPL_RSFOFF_BIT  1       
00077 #define NPL_RSFOFF      (1 << NPL_RSFOFF_BIT)  
00078 #define NPL_RSDTR_BIT   2       
00079 #define NPL_RSDTR       (1 << NPL_RSDTR_BIT)  
00080 #define NPL_RSRTS_BIT   3       
00081 #define NPL_RSRTS       (1 << NPL_RSRTS_BIT)  
00082 #define NPL_RSUS0E_BIT  5       
00083 #define NPL_RSUS0E      (1 << NPL_RSUS0E_BIT)  
00084 #define NPL_RSUS1E_BIT  6       
00085 #define NPL_RSUS1E      (1 << NPL_RSUS1E_BIT)  
00086 #define NPL_RSUS1P_BIT  7       
00087 #define NPL_RSUS1P      (1 << NPL_RSUS1P_BIT)  
00091 #define NPL_IMR         _SFR_MEM16(NPL_BASE + 0x04)
00092 
00095 #define NPL_SPICTRL     _SFR_MEM8(NPL_BASE + 0x08)
00096 
00099 #define NPL_SLR         _SFR_MEM16(NPL_BASE + 0x0C)
00100 
00103 #define NPL_SCR         _SFR_MEM16(NPL_BASE + 0x10)
00104 
00107 #define NPL_STATUS      _SFR_MEM16(NPL_BASE + 0x10)
00108 
00109 #define NPL_RSCTS_BIT       0                       
00110 #define NPL_RSCTS           (1 << NPL_RSCTS_BIT)    
00111 #define NPL_RSDSR_BIT       1                       
00112 #define NPL_RSDSR           (1 << NPL_RSDSR_BIT)    
00113 #define NPL_RSDCD_BIT       2                       
00114 #define NPL_RSDCD           (1 << NPL_RSDCD_BIT)    
00115 #define NPL_RSRI_BIT        3                       
00116 #define NPL_RSRI            (1 << NPL_RSRI_BIT)     
00117 #define NPL_RTCALARM_BIT    4                       
00118 #define NPL_RTCALARM        (1 << NPL_RTCALARM_BIT) 
00119 #define NPL_LANWAKEUP_BIT   5                       
00120 #define NPL_LANWAKEUP       (1 << NPL_LANWAKEUP_BIT)
00121 #define NPL_FMBUSY_BIT      6                       
00122 #define NPL_FMBUSY          (1 << NPL_FMBUSY_BIT)   
00123 #define NPL_MMCREADY_BIT    7                       
00124 #define NPL_MMCREADY        (1 << NPL_MMCREADY_BIT) 
00125 #define NPL_RSINVAL_BIT     8                       
00126 #define NPL_RSINVAL         (1 << NPL_RSINVAL_BIT)  
00127 #define NPL_NRSINVAL_BIT    9                       
00128 #define NPL_NRSINVAL        (1 << NPL_NRSINVAL_BIT) 
00129 #define NPL_MMCD_BIT        10                      
00130 #define NPL_MMCD            (1 << NPL_MMCD_BIT)     
00131 #define NPL_NMMCD_BIT       11                      
00132 #define NPL_NMMCD           (1 << NPL_NMMCD_BIT)    
00136 #define NPL_MMCDR       _SFR_MEM8(NPL_BASE + 0x14)
00137 
00140 #define NPL_XER         _SFR_MEM8(NPL_BASE + 0x18)
00141 
00142 #define NPL_MMCS        0x0001  
00143 #define NPL_PANCS       0x0002  
00144 #define NPL_USRLED      0x0004  
00145 #define NPL_NPCS0       0x0008  
00149 #define NPL_VIDR        _SFR_MEM8(NPL_BASE + 0x1C)
00150 
00151 
00152 extern IRQ_HANDLER sig_RSCTS;
00153 extern IRQ_HANDLER sig_RSDSR;
00154 extern IRQ_HANDLER sig_RSDCD;
00155 extern IRQ_HANDLER sig_RSRI;
00156 extern IRQ_HANDLER sig_RTCALARM;
00157 extern IRQ_HANDLER sig_LANWAKEUP;
00158 extern IRQ_HANDLER sig_FMBUSY;
00159 extern IRQ_HANDLER sig_MMCREADY;
00160 extern IRQ_HANDLER sig_RSINVAL;
00161 extern IRQ_HANDLER sig_NRSINVAL;
00162 extern IRQ_HANDLER sig_MMCD;
00163 extern IRQ_HANDLER sig_NMMCD;
00164 
00165 extern int NplRegisterIrqHandler(IRQ_HANDLER * irq, void (*handler) (void *), void *arg);
00166 extern int NplIrqEnable(IRQ_HANDLER * irq);
00167 extern int NplIrqDisable(IRQ_HANDLER * irq);
00168 
00171 #endif