Go to the documentation of this file.00001 #ifndef _ARCH_CM3_NXP_MACH_LPC_ADC_H_
00002 #define _ARCH_CM3_NXP_MACH_LPC_ADC_H_
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00052 #define ADC_CR_OFF 0x00000000
00053
00054 #define ADC_CR_CH_SEL(x) _BV(x)
00055 #define ADC_CR_CLKDIV(d) ((n) << 8)
00056 #define ADC_CR_BURST _BV(16)
00057 #define ADC_CR_PDN _BV(21)
00058 #define ADC_CR_START_MODE_SEL(x) ((x) << 24)
00059 #define ADC_CR_START_MASK ADC_CR_START_MODE_SEL(7)
00060 #define ADC_CR_START_NOW (1UL<<24))
00061 #define ADC_CR_START_EINT0 (2 << 24)
00062 #define ADC_CR_START_CAP01 (3 << 24)
00063 #define ADC_CR_START_MAT01 (4 << 24)
00064 #define ADC_CR_START_MAT03 (5 << 24)
00065 #define ADC_CR_START_MAT10 (6 << 24)
00066 #define ADC_CR_START_MAT11 (7 << 24)
00067 #define ADC_CR_EDGE _BV(27)
00068
00072 #define ADC_GDR_OFF 0x00000004
00073
00074 #define ADC_GDR_RESULT(x) (((x) >> 4) & 0xFFF)
00075 #define ADC_GDR_CH(x) (((x) >> 24) & 7)
00076 #define ADC_GDR_CH_MASK (7 << 24)
00077 #define ADC_GDR_OVERRUN_FLAG _BV(30)
00078 #define ADC_GDR_DONE_FLAG _BV(31)
00079
00083 #define ADC_INTEN_OFF 0x0000000C
00084
00085 #define ADC_INTEN_CH(x) _BV(x)
00086 #define ADC_INTEN_GLOBAL _BV(8)
00087
00091 #define ADC_DR_OFF(x) ((x) * 4 + 0x00000010)
00092
00093 #define ADC_DR_OVERRUN_FLAG _BV(30)
00094 #define ADC_DR_DONE_FLAG _BV(31)
00095
00099 #define ADC_STAT_OFF 0x00000030
00100
00101 #define ADC_STAT_CH_DONE_FLAG(x) _BV(x)
00102 #define ADC_STAT_CH_OVERRUN_FLAG(x) _BV((x) + 8)
00103 #define ADC_STAT_INT_FLAG _BV(16)
00104
00108 #define ADC_TRIM_OFF 0x00000034
00109
00112 #if defined(LPC_ADC_BASE)
00113 #define AD0CR (LPC_ADC_BASE + ADC_CR_OFF)
00114 #define AD0GDR (LPC_ADC_BASE + ADC_GDR_OFF)
00115 #define AD0INTEN (LPC_ADC_BASE + ADC_INTEN_OFF)
00116 #define AD0DR(x) (LPC_ADC_BASE + ADC_DR_OFF(x))
00117 #define AD0STAT (LPC_ADC_BASE + ADC_STAT_OFF)
00118 #define AD0TRIM (LPC_ADC_BASE + ADC_TRIM_OFF)
00119 #endif
00120
00122 #endif