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Data Structures | |
struct | IDEDEVICEINFO |
Defines | |
#define | IDE_SUPPORT_CHS 0 |
#define | IDE_BASE_ADDRESS 0xE000 |
#define | IDECS0 0x0000 |
#define | IDECS1 0x0500 |
#define | DATA_WRITE_REG_LOW (IDECS0 + 0x0100) |
#define | DATA_WRITE_REG_HIGH (IDECS0 + 0x0200) |
#define | DATA_READ_REG_LOW (IDECS0 + 0x0300) |
#define | DATA_READ_REG_HIGH (IDECS0 + 0x0400) |
#define | ERROR_REG (IDECS0 + 1) |
#define | FEATURE_REG (IDECS0 + 1) |
#define | SECTOR_COUNT_REG (IDECS0 + 2) |
#define | SECTOR_REG (IDECS0 + 3) |
#define | CYLINDER_LOW_REG (IDECS0 + 4) |
#define | CYLINDER_HIGH_REG (IDECS0 + 5) |
#define | DISK_HEAD_REG (IDECS0 + 6) |
#define | COMMAND_REG (IDECS0 + 7) |
#define | STATUS_REG (IDECS0 + 7) |
#define | LBA_0_7 (IDECS0 + 3) |
#define | LBA_8_15 (IDECS0 + 4) |
#define | LBA_16_23 (IDECS0 + 5) |
#define | CF_ERROR_REG (IDECS1 + 0) |
#define | CONTROL_REG (IDECS1 + 6) |
#define | ALTERNATE_STATUS (IDECS1 + 6) |
#define | STATUS_BUSY 0x80 |
#define | STATUS_DRIVE_READY 0x40 |
#define | STATUS_DEVIDE_FAULT 0x20 |
#define | STATUS_SEEK_COMPLETE 0x10 |
#define | STATUS_DATA_REQUEST 0x08 |
#define | STATUS_CORRECTED_DATA 0x04 |
#define | STATUS_INDEX 0x02 |
#define | STATUS_ERROR 0x01 |
#define | ERROR_CRC 0x80 |
#define | ERROR_UNC 0x40 |
#define | ERROR_IDN 0x10 |
#define | ERROR_ABT 0x04 |
#define | ERROR_T0N 0x02 |
#define | ERROR_AMN 0x01 |
#define | COMMAND_DEVICE_INFO 0xEC |
#define | COMMAND_DEVICE_INFO_P 0xA1 |
#define | COMMAND_READ_SECTORS 0x20 |
#define | COMMAND_WRITE_SECTORS 0x30 |
#define | COMMAND_RECALIBRATE 0x10 |
#define | COMMAND_DIAG 0x90 |
#define | SERIAL_SIZE 20 |
#define | REV_SIZE 8 |
#define | MODEL_SIZE 40 |
#define | ATAPI_CMD_READ_CAPACITY 0x25 |
#define | ATAPI_CMD_MODE_SELECT 0x55 |
#define | ATAPI_CMD_MODE_SENSE 0x5A |
#define | ATAPI_CMD_READ12 0xA8 |
#define | ATAPI_CMD_SET_CD_SPEED 0xBB |
#define IDE_SUPPORT_CHS 0 |
#define IDE_BASE_ADDRESS 0xE000 |
Referenced by IDEInit().
#define IDECS0 0x0000 |
#define IDECS1 0x0500 |
#define DATA_WRITE_REG_LOW (IDECS0 + 0x0100) |
#define DATA_WRITE_REG_HIGH (IDECS0 + 0x0200) |
#define DATA_READ_REG_LOW (IDECS0 + 0x0300) |
#define DATA_READ_REG_HIGH (IDECS0 + 0x0400) |
#define ERROR_REG (IDECS0 + 1) |
#define FEATURE_REG (IDECS0 + 1) |
#define SECTOR_COUNT_REG (IDECS0 + 2) |
#define SECTOR_REG (IDECS0 + 3) |
#define CYLINDER_LOW_REG (IDECS0 + 4) |
#define CYLINDER_HIGH_REG (IDECS0 + 5) |
#define DISK_HEAD_REG (IDECS0 + 6) |
#define COMMAND_REG (IDECS0 + 7) |
#define STATUS_REG (IDECS0 + 7) |
#define LBA_0_7 (IDECS0 + 3) |
#define LBA_8_15 (IDECS0 + 4) |
#define LBA_16_23 (IDECS0 + 5) |
#define CF_ERROR_REG (IDECS1 + 0) |
#define CONTROL_REG (IDECS1 + 6) |
#define ALTERNATE_STATUS (IDECS1 + 6) |
#define STATUS_BUSY 0x80 |
#define STATUS_DRIVE_READY 0x40 |
#define STATUS_DEVIDE_FAULT 0x20 |
#define STATUS_SEEK_COMPLETE 0x10 |
#define STATUS_DATA_REQUEST 0x08 |
#define STATUS_CORRECTED_DATA 0x04 |
#define STATUS_INDEX 0x02 |
#define STATUS_ERROR 0x01 |
#define ERROR_CRC 0x80 |
#define ERROR_UNC 0x40 |
#define ERROR_IDN 0x10 |
#define ERROR_ABT 0x04 |
#define ERROR_T0N 0x02 |
#define ERROR_AMN 0x01 |
#define COMMAND_DEVICE_INFO 0xEC |
#define COMMAND_DEVICE_INFO_P 0xA1 |
#define COMMAND_READ_SECTORS 0x20 |
#define COMMAND_WRITE_SECTORS 0x30 |
#define COMMAND_RECALIBRATE 0x10 |
#define COMMAND_DIAG 0x90 |
#define SERIAL_SIZE 20 |
#define REV_SIZE 8 |
#define MODEL_SIZE 40 |
#define ATAPI_CMD_READ_CAPACITY 0x25 |
#define ATAPI_CMD_MODE_SELECT 0x55 |
#define ATAPI_CMD_MODE_SENSE 0x5A |
#define ATAPI_CMD_READ12 0xA8 |
Referenced by IDEReadSectors().
#define ATAPI_CMD_SET_CD_SPEED 0xBB |