Nut/OS  5.0.5
API Reference
XgNutArchCm3Stm32

Defines

#define STM_USART_REMAP   GPIO_AF_UART4
 UART4 GPIO configuartion and assignment.
#define TX_GPIO_PORT   NUTGPIO_PORTA
#define TX_GPIO_PIN   0
#define RX_GPIO_PORT   NUTGPIO_PORTA
#define RX_GPIO_PIN   1
#define STM_USART_CLK   RCC_APB1Periph_UART4
 UART4 base configuration.
#define USARTn   UART4
#define USARTnBase   UART4_BASE
#define USARTirqn   UART4_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_UART4
#define DcbUSART   dcb_uart4
#define STM_USART_REMAP   GPIO_AF_UART4
 UART5 GPIO configuartion and assignment.
#define TX_GPIO_PORT   NUTGPIO_PORTC
#define TX_GPIO_PIN   12
#define RX_GPIO_PORT   NUTGPIO_PORTD
#define RX_GPIO_PIN   2
#define STM_USART_CLK   RCC_APB1Periph_UART5
 UART5 base configuration.
#define USARTn   UART5
#define USARTnBase   UART5_BASE
#define USARTirqn   UART5_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_UART5
#define DcbUSART   dcb_uart5
#define STM_USART_REMAP   GPIO_AF_USART2
 USART2 GPIO configuartion and assignment.
#define TX_GPIO_PORT   NUTGPIO_PORTA
#define TX_GPIO_PIN   2
#define RX_GPIO_PORT   NUTGPIO_PORTA
#define RX_GPIO_PIN   3
#define STM_USART_CLK   RCC_APB1Periph_USART2
 USART2 base configuration.
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
#define USARTn   USART2
#define USARTnBase   USART2_BASE
#define USARTirqn   USART2_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_USART2
#define DcbUSART   dcb_usart2
#define STM_USART_REMAP   GPIO_AF_USART3
 USART3 GPIO configuartion and assignment.
#define TX_GPIO_PORT   NUTGPIO_PORTB
#define TX_GPIO_PIN   10
#define RX_GPIO_PORT   NUTGPIO_PORTB
#define RX_GPIO_PIN   11
#define CK_GPIO_PORT   NUTGPIO_PORTB
#define CK_GPIO_PIN   12
#define STM_USART_CLK   RCC_APB1Periph_USART3
 USART3 base configuration.
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
#define USARTn   USART3
#define USARTnBase   USART3_BASE
#define USARTirqn   USART3_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_USART3
#define DcbUSART   dcb_usart3

STM32 UART4 Device

NUTDEVICE devUartStm32_4
 UART4 device information structure.

STM32 UART5 Device

NUTDEVICE devUartStm32_5
 UART5 device information structure.

STM32 USART2 Device

NUTDEVICE devUsartStm32_2
 USART2 device information structure.

STM32 USART3 Device

NUTDEVICE devUsartStm32_3
 USART3 device information structure.

Detailed Description

 * $Id: stm32_usart2.c 4477 2012-08-20 17:50:01Z haraldkipp $
 *
 * $Id: stm32_usart3.c 4477 2012-08-20 17:50:01Z haraldkipp $
 * 

Define Documentation

#define STM_USART_REMAP   GPIO_AF_UART4

UART4 GPIO configuartion and assignment.

#define TX_GPIO_PORT   NUTGPIO_PORTA
#define TX_GPIO_PIN   0
#define RX_GPIO_PORT   NUTGPIO_PORTA
#define RX_GPIO_PIN   1
#define STM_USART_CLK   RCC_APB1Periph_UART4

UART4 base configuration.

#define USARTn   UART4
#define USARTnBase   UART4_BASE
#define USARTirqn   UART4_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_UART4
#define DcbUSART   dcb_uart4
#define STM_USART_REMAP   GPIO_AF_UART4

UART5 GPIO configuartion and assignment.

#define TX_GPIO_PORT   NUTGPIO_PORTC
#define TX_GPIO_PIN   12
#define RX_GPIO_PORT   NUTGPIO_PORTD
#define RX_GPIO_PIN   2
#define STM_USART_CLK   RCC_APB1Periph_UART5

UART5 base configuration.

#define USARTn   UART5
#define USARTnBase   UART5_BASE
#define USARTirqn   UART5_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_UART5
#define DcbUSART   dcb_uart5
#define STM_USART_REMAP   GPIO_AF_USART2

USART2 GPIO configuartion and assignment.

#define TX_GPIO_PORT   NUTGPIO_PORTA
#define TX_GPIO_PIN   2
#define RX_GPIO_PORT   NUTGPIO_PORTA
#define RX_GPIO_PIN   3
#define STM_USART_CLK   RCC_APB1Periph_USART2

USART2 base configuration.

#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
#define USARTn   USART2
#define USARTnBase   USART2_BASE
#define USARTirqn   USART2_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_USART2
#define DcbUSART   dcb_usart2
#define STM_USART_REMAP   GPIO_AF_USART3

USART3 GPIO configuartion and assignment.

Remap NO PART FULL F1: TX PB10 PC10 PD8 RX PB11 PC11 PD9 CK PB12 PC12 PD10 CTS PB13 PB13 PD11 RTS PB14 PB14 PD12 L1/F2/F4: TX PA10 PC10 PD8 RX PB11 PC11 PD9 CK PB12 PC12 PD10 CTS PB13 PD11 RTS PB14 PD12

#define TX_GPIO_PORT   NUTGPIO_PORTB
#define TX_GPIO_PIN   10
#define RX_GPIO_PORT   NUTGPIO_PORTB
#define RX_GPIO_PIN   11
#define CK_GPIO_PORT   NUTGPIO_PORTB
#define CK_GPIO_PIN   12
#define STM_USART_CLK   RCC_APB1Periph_USART3

USART3 base configuration.

#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
#define USARTn   USART3
#define USARTnBase   USART3_BASE
#define USARTirqn   USART3_IRQn
#define USARTclk   NUT_HWCLK_PCLK2
#define UART_DR_PTR   (uint32_t*)(USARTnBase+4)
#define SigUSART   sig_USART3
#define DcbUSART   dcb_usart3

Variable Documentation

Initial value:
 {
    0,                          
    {'u', 'a', 'r', 't', '4', 0, 0, 0, 0},    
    IFTYP_CHAR,                 
    UART4_BASE,                 
    UART4_IRQn,                 
    NULL,                       
    &dcb_uart4,                 
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

UART4 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the STM32s on-chip UART4.

The device is named uart4.

Initial value:
 {
    0,                          
    {'u', 'a', 'r', 't', '5', 0, 0, 0, 0},    
    IFTYP_CHAR,                 
    UART5_BASE,                 
    UART5_IRQn,                 
    NULL,                       
    &dcb_uart5,                 
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

UART5 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the STM32s on-chip UART5.

The device is named uart5.

Initial value:
 {
    0,                          
    {'u', 's', 'a', 'r', 't', '2', 0, 0, 0},    
    IFTYP_CHAR,                 
    USART2_BASE,                
    USART2_IRQn,                
    NULL,                       
    &dcb_usart2,                
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

USART2 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the STM32s on-chip USART2.

The device is named uart2.

Initial value:
 {
    0,                          
    {'u', 's', 'a', 'r', 't', '3', 0, 0, 0},    
    IFTYP_CHAR,                 
    USART3_BASE,                
    USART3_IRQn,                
    NULL,                       
    &dcb_usart3,                
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

USART3 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the STM32s on-chip USART3.

The device is named uart3.