Nut/OS  5.0.5
API Reference
XgNutArchCm3Lpc177x_8xUsart

Defines

#define TX_GPIO_PORT   NUTGPIO_PORT0
 USART0 GPIO configuartion and assignment.
#define TX_GPIO_PIN   2
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL1
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   3
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL1
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
 USART0 base configuration.
#define USARTn   LPC_UART0
#define USARTnBase   LPC_UART0_BASE
#define USARTirqn   UART0_IRQn
#define SigUSART   sig_USART0
#define DcbUSART   dcb_usart0
#define TX_GPIO_PORT   NUTGPIO_PORT0
 USART1 GPIO configuartion and assignment.
#define TX_GPIO_PIN   15
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL1
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   16
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL1
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
 USART1 base configuration.
#define USARTn   LPC_UART1
#define USARTnBase   LPC_UART1_BASE
#define USARTirqn   UART1_IRQn
#define SigUSART   sig_USART1
#define DcbUSART   dcb_usart1
#define TX_GPIO_PORT   NUTGPIO_PORT0
 USART2 GPIO configuartion and assignment.
#define TX_GPIO_PIN   10
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL1
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   11
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL1
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
 USART2 base configuration.
#define USARTn   LPC_UART2
#define USARTnBase   LPC_UART2_BASE
#define USARTirqn   UART2_IRQn
#define SigUSART   sig_USART2
#define DcbUSART   dcb_usart2
#define TX_GPIO_PORT   NUTGPIO_PORT0
 USART3 GPIO configuartion and assignment.
#define TX_GPIO_PIN   26
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL3
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   27
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL3
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None
 USART3 base configuration.
#define USARTn   LPC_UART3
#define USARTnBase   LPC_UART3_BASE
#define USARTirqn   UART3_IRQn
#define SigUSART   sig_USART3
#define DcbUSART   dcb_usart3

LPC17xx USART0 Device

NUTDEVICE devUsartLpc17xx_0
 USART0 device information structure.

LPC17xx USART1 Device

NUTDEVICE devUsartLpc17xx_1
 USART1 device information structure.

LPC17xx USART2 Device

NUTDEVICE devUsartLpc17xx_1
 USART2 device information structure.

LPC17xx USART3 Device

NUTDEVICE devUsartLpc17xx_1
 USART3 device information structure.

Define Documentation

#define TX_GPIO_PORT   NUTGPIO_PORT0

USART0 GPIO configuartion and assignment.

#define TX_GPIO_PIN   2
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL1
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   3
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL1
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None

USART0 base configuration.

#define USARTn   LPC_UART0
#define USARTnBase   LPC_UART0_BASE
#define USARTirqn   UART0_IRQn
#define SigUSART   sig_USART0
#define DcbUSART   dcb_usart0
#define TX_GPIO_PORT   NUTGPIO_PORT0

USART1 GPIO configuartion and assignment.

#define TX_GPIO_PIN   15
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL1
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   16
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL1
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None

USART1 base configuration.

#define USARTn   LPC_UART1
#define USARTnBase   LPC_UART1_BASE
#define USARTirqn   UART1_IRQn
#define SigUSART   sig_USART1
#define DcbUSART   dcb_usart1
#define TX_GPIO_PORT   NUTGPIO_PORT0

USART2 GPIO configuartion and assignment.

#define TX_GPIO_PIN   10
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL1
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   11
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL1
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None

USART2 base configuration.

#define USARTn   LPC_UART2
#define USARTnBase   LPC_UART2_BASE
#define USARTirqn   UART2_IRQn
#define SigUSART   sig_USART2
#define DcbUSART   dcb_usart2
#define TX_GPIO_PORT   NUTGPIO_PORT0

USART3 GPIO configuartion and assignment.

#define TX_GPIO_PIN   26
#define TX_GPIO_PIN_CFG   GPIO_CFG_OUTPUT | GPIO_CFG_PERIPHERAL3
#define RX_GPIO_PORT   NUTGPIO_PORT0
#define RX_GPIO_PIN   27
#define RX_GPIO_PIN_CFG   GPIO_CFG_INPUT | GPIO_CFG_PERIPHERAL3
#define USART_HWFLOWCTRL   USART_HardwareFlowControl_None

USART3 base configuration.

#define USARTn   LPC_UART3
#define USARTnBase   LPC_UART3_BASE
#define USARTirqn   UART3_IRQn
#define SigUSART   sig_USART3
#define DcbUSART   dcb_usart3

Variable Documentation

Initial value:
 {
    0,                          
    {'u', 's', 'a', 'r', 't', '0', 0, 0, 0},    
    IFTYP_CHAR,                 
    LPC_UART0_BASE,             
    UART0_IRQn,                 
    NULL,                       
    &dcb_usart0,                
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

USART0 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the LPC17xx's on-chip USART0.

The device is named usart0.

Initial value:
 {
    0,                          
    {'u', 's', 'a', 'r', 't', '1', 0, 0, 0},    
    IFTYP_CHAR,                 
    LPC_UART1_BASE,             
    UART1_IRQn,                 
    NULL,                       
    &dcb_usart1,                
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

USART1 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the LPC17xx's on-chip USART1.

The device is named usart1.

Initial value:
 {
    0,                          
    {'u', 's', 'a', 'r', 't', '2', 0, 0, 0},    
    IFTYP_CHAR,                 
    LPC_UART2_BASE,             
    UART2_IRQn,                 
    NULL,                       
    &dcb_usart2,                
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

USART2 device information structure.

USART1 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the LPC17xx's on-chip USART2.

The device is named usart2.

Initial value:
 {
    0,                          
    {'u', 's', 'a', 'r', 't', '3', 0, 0, 0},    
    IFTYP_CHAR,                 
    LPC_UART3_BASE,             
    UART3_IRQn,                 
    NULL,                       
    &dcb_usart3,                
    UsartInit,                  
    UsartIOCtl,                 
    UsartRead,                  
    UsartWrite,                 
    UsartOpen,                  
    UsartClose,                 
    UsartSize                   
}

USART3 device information structure.

USART1 device information structure.

An application must pass a pointer to this structure to NutRegisterDevice() before using the serial communication driver of the LPC17xx's on-chip USART3.

The device is named usart3.