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00024 #ifndef __CORE_CMINSTR_H
00025 #define __CORE_CMINSTR_H
00026
00027
00028
00034 #if defined ( __CC_ARM )
00035
00036
00037 #if (__ARMCC_VERSION < 400677)
00038 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
00039 #endif
00040
00041
00046 #define __NOP __nop
00047
00048
00054 #define __WFI __wfi
00055
00056
00062 #define __WFE __wfe
00063
00064
00069 #define __SEV __sev
00070
00071
00078 #define __ISB() __isb(0xF)
00079
00080
00086 #define __DSB() __dsb(0xF)
00087
00088
00094 #define __DMB() __dmb(0xF)
00095
00096
00104 #define __REV __rev
00105
00106
00114 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
00115 {
00116 rev16 r0, r0
00117 bx lr
00118 }
00119
00120
00128 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
00129 {
00130 revsh r0, r0
00131 bx lr
00132 }
00133
00134
00143 #define __ROR __ror
00144
00145
00146 #if (__CORTEX_M >= 0x03)
00147
00155 #define __RBIT __rbit
00156
00157
00165 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
00166
00167
00175 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
00176
00177
00185 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
00186
00187
00197 #define __STREXB(value, ptr) __strex(value, ptr)
00198
00199
00209 #define __STREXH(value, ptr) __strex(value, ptr)
00210
00211
00221 #define __STREXW(value, ptr) __strex(value, ptr)
00222
00223
00229 #define __CLREX __clrex
00230
00231
00240 #define __SSAT __ssat
00241
00242
00251 #define __USAT __usat
00252
00253
00261 #define __CLZ __clz
00262
00263 #endif
00264
00265
00266
00267 #elif defined ( __ICCARM__ )
00268
00269
00270 #include <cmsis_iar.h>
00271
00272
00273 #elif defined ( __TMS470__ )
00274
00275
00276 #include <cmsis_ccs.h>
00277
00278
00279 #elif defined ( __GNUC__ )
00280
00281
00286 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
00287 {
00288 __ASM volatile ("nop");
00289 }
00290
00291
00297 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
00298 {
00299 __ASM volatile ("wfi");
00300 }
00301
00302
00308 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
00309 {
00310 __ASM volatile ("wfe");
00311 }
00312
00313
00318 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
00319 {
00320 __ASM volatile ("sev");
00321 }
00322
00323
00330 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
00331 {
00332 __ASM volatile ("isb");
00333 }
00334
00335
00341 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
00342 {
00343 __ASM volatile ("dsb");
00344 }
00345
00346
00352 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
00353 {
00354 __ASM volatile ("dmb");
00355 }
00356
00357
00365 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
00366 {
00367 uint32_t result;
00368
00369 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
00370 return(result);
00371 }
00372
00373
00381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
00382 {
00383 uint32_t result;
00384
00385 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
00386 return(result);
00387 }
00388
00389
00397 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
00398 {
00399 uint32_t result;
00400
00401 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
00402 return(result);
00403 }
00404
00405
00414 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
00415 {
00416
00417 __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
00418 return(op1);
00419 }
00420
00421
00422 #if (__CORTEX_M >= 0x03)
00423
00431 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
00432 {
00433 uint32_t result;
00434
00435 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
00436 return(result);
00437 }
00438
00439
00447 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
00448 {
00449 uint8_t result;
00450
00451 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
00452 return(result);
00453 }
00454
00455
00463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
00464 {
00465 uint16_t result;
00466
00467 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
00468 return(result);
00469 }
00470
00471
00479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
00480 {
00481 uint32_t result;
00482
00483 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
00484 return(result);
00485 }
00486
00487
00497 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
00498 {
00499 uint32_t result;
00500
00501 __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
00502 return(result);
00503 }
00504
00505
00515 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
00516 {
00517 uint32_t result;
00518
00519 __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
00520 return(result);
00521 }
00522
00523
00533 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
00534 {
00535 uint32_t result;
00536
00537 __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
00538 return(result);
00539 }
00540
00541
00547 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
00548 {
00549 __ASM volatile ("clrex");
00550 }
00551
00552
00561 #define __SSAT(ARG1,ARG2) \
00562 ({ \
00563 uint32_t __RES, __ARG1 = (ARG1); \
00564 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
00565 __RES; \
00566 })
00567
00568
00577 #define __USAT(ARG1,ARG2) \
00578 ({ \
00579 uint32_t __RES, __ARG1 = (ARG1); \
00580 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
00581 __RES; \
00582 })
00583
00584
00592 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
00593 {
00594 uint8_t result;
00595
00596 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
00597 return(result);
00598 }
00599
00600 #endif
00601
00602
00603
00604
00605 #elif defined ( __TASKING__ )
00606
00607
00608
00609
00610
00611
00612
00613
00614 #endif
00615
00617
00618 #endif