Go to the source code of this file.
PS Control Register | |
#define | PS_CR (PS_BASE + 0x00) |
Register address. | |
Peripheral Clock Control Registers | |
#define | PS_PCER (PS_BASE + 0x04) |
Peripheral clock enable register address. | |
#define | PS_PCDR (PS_BASE + 0x08) |
Peripheral clock disable register address. | |
#define | PS_PCSR (PS_BASE + 0x0C) |
Peripheral clock status register address. |
* * $Log$ * Revision 1.1 2006/07/05 07:45:28 haraldkipp * Split on-chip interface definitions. * * *
Definition in file at91_ps.h.