00001 #ifndef _ARCH_ARM_AT91SAM9XE_H_
00002 #define _ARCH_ARM_AT91SAM9XE_H_
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00052 #define FLASH_BASE 0x100000UL
00053 #define RAM_BASE 0x200000UL
00054
00055 #define TC_BASE 0xFFFA0000
00056 #define UDP_BASE 0xFFFA4000
00057 #define MCI_BASE 0xFFFA8000
00058 #define TWI_BASE 0xFFFAC000
00059 #define USART0_BASE 0xFFFB0000
00060 #define USART1_BASE 0xFFFB4000
00061 #define USART2_BASE 0xFFFB8000
00062 #define SSC_BASE 0xFFFBC000
00063 #define ISI_BASE 0xFFFC0000
00064 #define EMAC_BASE 0xFFFC4000
00065 #define SPI0_BASE 0xFFFC8000
00066 #define SPI1_BASE 0xFFFCC000
00067 #define USART3_BASE 0xFFFD0000
00068 #define USART4_BASE 0xFFFD4000
00069 #define TWI1_BASE 0xFFFD8000
00070 #define TC345_BASE 0xFFFDC000
00071 #define ADC_BASE 0xFFFE0000
00072 #define ECC_BASE 0xFFFFE800
00073 #define SDRAMC_BASE 0xFFFFEA00
00074 #define SMC_BASE 0xFFFFEC00
00075 #define MATRIX_BASE 0xFFFFEE00
00076 #define CCFG_BASE 0xFFFFEF10
00077 #define AIC_BASE 0xFFFFF000
00078 #define DBGU_BASE 0xFFFFF200
00079 #define PIOA_BASE 0xFFFFF400
00080 #define PIOB_BASE 0xFFFFF600
00081 #define PIOC_BASE 0xFFFFF800
00082 #define EEFC_BASE 0xFFFFFA00
00083 #define PMC_BASE 0xFFFFFC00
00084 #define RSTC_BASE 0xFFFFFD00
00085 #define RTT_BASE 0xFFFFFD20
00086 #define PIT_BASE 0xFFFFFD30
00087 #define WDT_BASE 0xFFFFFD40
00088 #define GPBR_BASE 0xFFFFFD50
00090 #define PERIPH_RPR_OFF 0x00000100
00091 #define PERIPH_RCR_OFF 0x00000104
00092 #define PERIPH_TPR_OFF 0x00000108
00093 #define PERIPH_TCR_OFF 0x0000010C
00094 #define PERIPH_RNPR_OFF 0x00000110
00095 #define PERIPH_RNCR_OFF 0x00000114
00096 #define PERIPH_TNPR_OFF 0x00000118
00097 #define PERIPH_TNCR_OFF 0x0000011C
00098 #define PERIPH_PTCR_OFF 0x00000120
00099 #define PERIPH_PTSR_OFF 0x00000124
00101 #define PDC_RXTEN 0x00000001
00102 #define PDC_RXTDIS 0x00000002
00103 #define PDC_TXTEN 0x00000100
00104 #define PDC_TXTDIS 0x00000200
00106 #define DBGU_HAS_PDC
00107 #define SPI_HAS_PDC
00108 #define SSC_HAS_PDC
00109 #define USART_HAS_PDC
00110 #define USART_HAS_MODE
00111 #define MCI_HAS_PDC
00112
00113 #define PIO_HAS_MULTIDRIVER
00114 #define PIO_HAS_PULLUP
00115 #define PIO_HAS_PERIPHERALSELECT
00116 #define PIO_HAS_OUTPUTWRITEENABLE
00117
00118 #include <arch/arm/at91_tc.h>
00119 #include <arch/arm/at91_us.h>
00120 #include <arch/arm/at91_dbgu.h>
00121 #include <arch/arm/at91_emac.h>
00122 #include <arch/arm/at91_spi.h>
00123 #include <arch/arm/at91_aic.h>
00124 #include <arch/arm/at91_pio.h>
00125 #include <arch/arm/at91_pmc.h>
00126 #include <arch/arm/at91_rstc.h>
00127 #include <arch/arm/at91_wdt.h>
00128 #include <arch/arm/at91_ssc.h>
00129 #include <arch/arm/at91_twi.h>
00130 #include <arch/arm/at91_smc.h>
00131 #include <arch/arm/at91_mci.h>
00132 #include <arch/arm/at91_matrix.h>
00133 #include <arch/arm/at91_ccfg.h>
00134 #include <arch/arm/at91_sdramc.h>
00135 #include <arch/arm/at91_adc.h>
00136
00139
00142 #define FIQ_ID 0
00143 #define SYSC_ID 2
00144 #define PIOA_ID 2
00145 #define PIOB_ID 3
00146 #define PIOC_ID 4
00147 #define ADC_ID 5
00148 #define US0_ID 6
00149 #define US1_ID 7
00150 #define US2_ID 8
00151 #define MCI_ID 9
00152 #define UDP_ID 10
00153 #define TWI0_ID 11
00154 #define SPI0_ID 12
00155 #define SPI1_ID 13
00156 #define SSC_ID 14
00157 #define TC0_ID 17
00158 #define TC1_ID 18
00159 #define TC2_ID 19
00160 #define UHP_ID 20
00161 #define EMAC_ID 21
00162 #define ISI_ID 22
00163 #define US3_ID 23
00164 #define US4_ID 24
00165 #define TWI1_ID 25
00166 #define TC3_ID 26
00167 #define TC4_ID 27
00168 #define TC5_ID 28
00169 #define IRQ0_ID 29
00170 #define IRQ1_ID 30
00171 #define IRQ2_ID 31
00174
00175
00177 #define PA31_SCK0_A 31
00178 #define PB4_TXD0_A 4
00179 #define PB5_RXD0_A 5
00180 #define PB27_CTS0_A 27
00181 #define PB26_RTS0_A 26
00182 #define PB25_RI0_A 25
00183 #define PB22_DSR0_A 22
00184 #define PB23_DCD0_A 23
00185 #define PB24_DTR0_A 24
00187 #define PA29_SCK1_A 29
00188 #define PB6_TXD1_A 6
00189 #define PB7_RXD1_A 7
00190 #define PB29_CTS1_A 29
00191 #define PB28_RTS1_A 28
00193 #define PA30_SCK2_A 30
00194 #define PB8_TXD2_A 8
00195 #define PB9_RXD2_A 9
00196 #define PA5_CTS2_A 5
00197 #define PA4_RTS2_A 4
00199 #define PC0_SCK3_B 0
00200 #define PB10_TXD3_A 10
00201 #define PB11_RXD3_A 11
00202 #define PC10_CTS3_B 10
00203 #define PC8_RTS3_B 8
00205 #define PA31_TXD4_B 31
00206 #define PA30_RXD4_B 30
00208
00209
00211 #define PA0_SPI0_MISO_A 0
00212 #define PA1_SPI0_MOSI_A 1
00213 #define PA2_SPI0_SPCK_A 2
00214 #define PA3_SPI0_NPCS0_A 3
00215 #define PC11_SPI0_NPCS1_B 11
00216 #define PC16_SPI0_NPCS2_B 16
00217 #define PC17_SPI0_NPCS3_B 17
00219 #define SPI0_PINS _BV(PA0_SPI0_MISO_A) | _BV(PA1_SPI0_MOSI_A) | _BV(PA2_SPI0_SPCK_A)
00220 #define SPI0_PIO_BASE PIOA_BASE
00221 #define SPI0_PSR_OFF PIO_ASR_OFF
00222
00223 #define SPI0_CS0_PIN _BV(PA3_SPI0_NPCS0_A)
00224 #define SPI0_CS0_PIO_BASE PIOA_BASE
00225 #define SPI0_CS0_PSR_OFF PIO_ASR_OFF
00226
00227 #define SPI0_CS1_PIN _BV(PC11_SPI0_NPCS1_B)
00228 #define SPI0_CS1_PIO_BASE PIOC_BASE
00229 #define SPI0_CS1_PSR_OFF PIO_BSR_OFF
00230
00231 #define PB0_SPI1_MISO_A 0
00232 #define PB1_SPI1_MOSI_A 1
00233 #define PB2_SPI1_SPCK_A 2
00234 #define PB3_SPI1_NPCS0_A 3
00235 #define PC5_SPI1_NPCS1_B 5
00236 #define PC18_SPI1_NPCS1_B 18
00237 #define PC4_SPI1_NPCS2_B 4
00238 #define PC19_SPI1_NPCS2_B 19
00239 #define PC3_SPI1_NPCS3_B 3
00240 #define PC20_SPI1_NPCS3_B 20
00242 #define SPI1_PINS _BV(PB0_SPI1_MISO_A) | _BV(PB1_SPI1_MOSI_A) | _BV(PB2_SPI1_SPCK_A)
00243 #define SPI1_PIO_BASE PIOB_BASE
00244 #define SPI1_PSR_OFF PIO_ASR_OFF
00245
00246 #define SPI1_CS0_PIN _BV(PB3_SPI1_NPCS0_A)
00247 #define SPI1_CS0_PIO_BASE PIOB_BASE
00248 #define SPI1_CS0_PSR_OFF PIO_ASR_OFF
00249
00250 #ifndef SPI1_CS3_PIN
00251 #define SPI1_CS3_PIN _BV(PC3_SPI1_NPCS3_B)
00252 #define SPI1_CS3_PIO_BASE PIOC_BASE
00253 #define SPI1_CS3_PSR_OFF PIO_BSR_OFF
00254 #endif
00255
00260 #define PB20_ISI_D0_B 20
00261 #define PB21_ISI_D1_B 21
00262 #define PB22_ISI_D2_B 22
00263 #define PB23_ISI_D3_B 23
00264 #define PB24_ISI_D4_B 24
00265 #define PB25_ISI_D5_B 25
00266 #define PB26_ISI_D6_B 26
00267 #define PB27_ISI_D7_B 27
00268 #define PB10_ISI_D8_B 10
00269 #define PB11_ISI_D9_B 11
00270 #define PB12_ISI_D10_B 12
00271 #define PB13_ISI_D11_B 13
00272 #define PB28_ISI_PCK_B 28
00273 #define PB29_ISI_VSYNC_B 29
00274 #define PB30_ISI_HSYNC_B 30
00275 #define PB31_ISI_MCK_B 31
00277
00278
00280 #define PA8_MCCK_A 8
00281 #define PA7_MCCDA_A 7
00282 #define PA6_MCDA0_A 6
00283 #define PA9_MCDA1_A 9
00284 #define PA10_MCDA2_A 10
00285 #define PA11_MCDA3_A 11
00286 #define PA1_MCCDB_B 1
00287 #define PA0_MCDB0_B 0
00288 #define PA5_MCDB1_B 5
00289 #define PA4_MCDB2_B 4
00290 #define PA3_MCDB3_B 3
00292
00293
00295 #define PA10_ETX2_B 10
00296 #define PA11_ETX3_B 11
00297 #define PA12_ETX0_A 12
00298 #define PA13_ETX1_A 13
00299 #define PA14_ERX0_A 14
00300 #define PA15_ERX1_A 15
00301 #define PA16_ETXEN_A 16
00302 #define PA17_ERXDV_A 17
00303 #define PA18_ERXER_A 18
00304 #define PA19_ETXCK_A 19
00305 #define PA20_EMDC_A 20
00306 #define PA21_EMDIO_A 21
00307 #define PA22_ETXER_B 22
00308 #define PA23_ETX2_B 23
00309 #define PA24_ETX3_B 24
00310 #define PA25_ERX2_B 25
00311 #define PA26_ERX3_B 26
00312 #define PA27_ERXCK_B 27
00313 #define PA28_ECRS_B 28
00314 #define PA29_ECOL_B 29
00315 #define PC21_EF100_B 21
00317
00318
00320 #define PA22_ADTRG_A 22
00322
00323
00325 #define PB14_DRXD_A 14
00326 #define PB15_DTXD_A 15
00328
00329
00331 #define PB18_TD0_A 18
00332 #define PB19_RD0_A 19
00333 #define PB16_TK0_A 16
00334 #define PB20_RK0_A 20
00335 #define PB17_TF0_A 17
00336 #define PB21_RF0_A 21
00338
00339
00341 #define PA23_TWD0_A 23
00342 #define PA24_TWCK0_A 24
00344 #define PB12_TWD1_A 12
00345 #define PB13_RWCK1_A 13
00347
00348
00350 #define PA25_TCLK0_A 25
00351 #define PA26_TIOA0_A 26
00352 #define PC9_TIOB0_B 9
00354 #define PB6_TCLK1_B 6
00355 #define PA27_TIOA1_A 27
00356 #define PC7_TIOB1_A 7
00358 #define PB7_TCLK2_B 7
00359 #define PA28_TIOA2_A 28
00360 #define PC6_TIOB2_A 6
00362 #define PB16_TCLK3_B 16
00363 #define PB0_TIOA3_B 0
00364 #define PB1_TIOB3_B 1
00366 #define PB17_TCLK4_B 17
00367 #define PB2_TIOA4_B 2
00368 #define PB18_TIOB4_B 18
00370 #define PC22_TCLK5_B 22
00371 #define PB3_TIOA5_B 3
00372 #define PB19_TIOB5_B 19
00374
00375
00377 #define PB30_PCK0_A 30
00378 #define PC1_PCK0_B 1
00379 #define PB31_PCK1_A 31
00380 #define PC2_PCK1_B 2
00382
00383
00385 #define PC10_A25_CFRNW_A 10
00386 #define PC8_NCS4_CFCS0_A 8
00387 #define PC9_NCS5_CFCS1_A 9
00388 #define PC6_CFCE1_B 6
00389 #define PC7_CFCE2_B 7
00391
00392
00394 #define PC16_D16_A 16
00395 #define PC17_D17_A 17
00396 #define PC18_D18_A 18
00397 #define PC19_D19_A 19
00398 #define PC20_D20_A 20
00399 #define PC21_D21_A 21
00400 #define PC22_D22_A 22
00401 #define PC23_D23_A 23
00402 #define PC24_D24_A 24
00403 #define PC25_D25_A 25
00404 #define PC26_D26_A 26
00405 #define PC27_D27_A 27
00406 #define PC28_D28_A 28
00407 #define PC29_D29_A 29
00408 #define PC30_D30_A 30
00409 #define PC31_D31_A 31
00410 #define PC4_A23_A 4
00411 #define PC5_A24_A 5
00412 #define PC11_NCS2_A 11
00413 #define PC14_NCS3_NANDCS_A 14
00414 #define PC13_NCS6_B 13
00415 #define PC12_NCS7_B 12
00416 #define PC15_NWAIT_A 15
00418
00419
00421 #define PC13_FIQ_A 13
00422 #define PC12_IRQ0_A 12
00423 #define PC15_IRQ1_B 15
00424 #define PC14_IRQ2_B 14
00426
00427
00429 #endif