00001 #ifndef _ARCH_ARM_SAM9260_H_
00002 #define _ARCH_ARM_SAM9260_H_
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00070 #define FLASH_BASE 0x100000UL
00071 #define RAM_BASE 0x200000UL
00072
00073 #define TC_BASE 0xFFFA0000
00074 #define UDP_BASE 0xFFFA4000
00075 #define MCI_BASE 0xFFFA8000
00076 #define TWI_BASE 0xFFFAC000
00077 #define USART0_BASE 0xFFFB0000
00078 #define USART1_BASE 0xFFFB4000
00079 #define USART2_BASE 0xFFFB8000
00080 #define SSC_BASE 0xFFFBC000
00081 #define ISI_BASE 0xFFFC0000
00082 #define EMAC_BASE 0xFFFC4000
00083 #define SPI0_BASE 0xFFFC8000
00084 #define SPI1_BASE 0xFFFCC000
00085 #define USART3_BASE 0xFFFD0000
00086 #define USART4_BASE 0xFFFD4000
00087 #define USART5_BASE 0xFFFD8000
00088 #define TC345_BASE 0xFFFDC000
00089 #define ADC_BASE 0xFFFE0000
00090 #define ECC_BASE 0xFFFFE800
00091 #define SDRAMC_BASE 0xFFFFEA00
00092 #define SMC_BASE 0xFFFFEC00
00093 #define MATRIX_BASE 0xFFFFEE00
00094 #define CCFG_BASE 0xFFFFEF10
00095 #define AIC_BASE 0xFFFFF000
00096 #define DBGU_BASE 0xFFFFF200
00097 #define PIOA_BASE 0xFFFFF400
00098 #define PIOB_BASE 0xFFFFF600
00099 #define PIOC_BASE 0xFFFFF800
00100 #define PMC_BASE 0xFFFFFC00
00101 #define RSTC_BASE 0xFFFFFD00
00102 #define RTT_BASE 0xFFFFFD20
00103 #define PIT_BASE 0xFFFFFD30
00104 #define WDT_BASE 0xFFFFFD40
00106 #define PERIPH_RPR_OFF 0x00000100
00107 #define PERIPH_RCR_OFF 0x00000104
00108 #define PERIPH_TPR_OFF 0x00000108
00109 #define PERIPH_TCR_OFF 0x0000010C
00110 #define PERIPH_RNPR_OFF 0x00000110
00111 #define PERIPH_RNCR_OFF 0x00000114
00112 #define PERIPH_TNPR_OFF 0x00000118
00113 #define PERIPH_TNCR_OFF 0x0000011C
00114 #define PERIPH_PTCR_OFF 0x00000120
00115 #define PERIPH_PTSR_OFF 0x00000124
00117 #define PDC_RXTEN 0x00000001
00118 #define PDC_RXTDIS 0x00000002
00119 #define PDC_TXTEN 0x00000100
00120 #define PDC_TXTDIS 0x00000200
00122 #define DBGU_HAS_PDC
00123 #define SPI_HAS_PDC
00124 #define SSC_HAS_PDC
00125 #define USART_HAS_PDC
00126 #define USART_HAS_MODE
00127 #define MCI_HAS_PDC
00128
00129 #define PIO_HAS_MULTIDRIVER
00130 #define PIO_HAS_PULLUP
00131 #define PIO_HAS_PERIPHERALSELECT
00132 #define PIO_HAS_OUTPUTWRITEENABLE
00133
00134 #include <arch/arm/at91_tc.h>
00135 #include <arch/arm/at91_us.h>
00136 #include <arch/arm/at91_dbgu.h>
00137 #include <arch/arm/at91_emac.h>
00138 #include <arch/arm/at91_spi.h>
00139 #include <arch/arm/at91_aic.h>
00140 #include <arch/arm/at91_pio.h>
00141 #include <arch/arm/at91_pmc.h>
00142 #include <arch/arm/at91_rstc.h>
00143 #include <arch/arm/at91_wdt.h>
00144 #include <arch/arm/at91_ssc.h>
00145 #include <arch/arm/at91_twi.h>
00146 #include <arch/arm/at91_smc.h>
00147 #include <arch/arm/at91_mci.h>
00148 #include <arch/arm/at91_matrix.h>
00149 #include <arch/arm/at91_ccfg.h>
00150 #include <arch/arm/at91_sdramc.h>
00151 #include <arch/arm/at91_adc.h>
00152
00155
00158 #define FIQ_ID 0
00159 #define PIOA_ID 2
00160 #define PIOB_ID 3
00161 #define PIOC_ID 4
00162 #define ADC_ID 5
00163 #define US0_ID 6
00164 #define US1_ID 7
00165 #define US2_ID 8
00166 #define MCI_ID 9
00167 #define UDP_ID 10
00168 #define TWI_ID 11
00169 #define SPI0_ID 12
00170 #define SPI1_ID 13
00171 #define SSC_ID 14
00172 #define TC0_ID 17
00173 #define TC1_ID 18
00174 #define TC2_ID 19
00175 #define UHP_ID 20
00176 #define EMAC_ID 21
00177 #define ISI_ID 22
00178 #define US3_ID 23
00179 #define US4_ID 24
00180 #define US5_ID 25
00181 #define TC3_ID 26
00182 #define TC4_ID 27
00183 #define TC5_ID 28
00184 #define IRQ0_ID 29
00185 #define IRQ1_ID 30
00186 #define IRQ2_ID 31
00189
00190
00192 #define PA31_SCK0_A 31
00193 #define PB4_TXD0_A 4
00194 #define PB5_RXD0_A 5
00195 #define PB27_CTS0_A 27
00196 #define PB26_RTS0_A 26
00197 #define PB25_RI0_A 25
00198 #define PB22_DSR0_A 22
00199 #define PB23_DCD0_A 23
00200 #define PB24_DTR0_A 24
00202 #define PA29_SCK1_A 29
00203 #define PB6_TXD1_A 6
00204 #define PB7_RXD1_A 7
00205 #define PB29_CTS1_A 29
00206 #define PB28_RTS1_A 28
00208 #define PA30_SCK2_A 30
00209 #define PB8_TXD2_A 8
00210 #define PB9_RXD2_A 9
00211 #define PA5_CTS2_A 5
00212 #define PA4_RTS2_A 4
00214 #define PC0_SCK3_B 0
00215 #define PB10_TXD3_A 10
00216 #define PB11_RXD3_A 11
00217 #define PC10_CTS3_B 10
00218 #define PC8_RTS3_B 8
00220 #define PA31_TXD4_B 31
00221 #define PA30_RXD4_B 30
00223 #define PB12_TXD5_A 12
00224 #define PB13_RXD5_A 13
00226
00227
00229 #define PA0_SPI0_MISO_A 0
00230 #define PA1_SPI0_MOSI_A 1
00231 #define PA2_SPI0_SPCK_A 2
00232 #define PA3_SPI0_NPCS0_A 3
00233 #define PC11_SPI0_NPCS1_B 11
00234 #define PC16_SPI0_NPCS2_B 16
00235 #define PC17_SPI0_NPCS3_B 17
00237 #define SPI0_PINS _BV(PA0_SPI0_MISO_A) | _BV(PA1_SPI0_MOSI_A) | _BV(PA2_SPI0_SPCK_A)
00238 #define SPI0_PIO_BASE PIOA_BASE
00239 #define SPI0_PSR_OFF PIO_ASR_OFF
00240
00241 #define SPI0_CS0_PIN _BV(PA3_SPI0_NPCS0_A)
00242 #define SPI0_CS0_PIO_BASE PIOA_BASE
00243 #define SPI0_CS0_PSR_OFF PIO_ASR_OFF
00244
00245 #define SPI0_CS1_PIN _BV(PC11_SPI0_NPCS1_B)
00246 #define SPI0_CS1_PIO_BASE PIOC_BASE
00247 #define SPI0_CS1_PSR_OFF PIO_BSR_OFF
00248
00249 #define PB0_SPI1_MISO_A 0
00250 #define PB1_SPI1_MOSI_A 1
00251 #define PB2_SPI1_SPCK_A 2
00252 #define PB3_SPI1_NPCS0_A 3
00253 #define PC5_SPI1_NPCS1_B 5
00254 #define PC18_SPI1_NPCS1_B 18
00255 #define PC4_SPI1_NPCS2_B 4
00256 #define PC19_SPI1_NPCS2_B 19
00257 #define PC3_SPI1_NPCS3_B 3
00258 #define PC20_SPI1_NPCS3_B 20
00260 #define SPI1_PINS _BV(PB0_SPI1_MISO_A) | _BV(PB1_SPI1_MOSI_A) | _BV(PB2_SPI1_SPCK_A)
00261 #define SPI1_PIO_BASE PIOB_BASE
00262 #define SPI1_PSR_OFF PIO_ASR_OFF
00263
00264 #define SPI1_CS0_PIN _BV(PB3_SPI1_NPCS0_A)
00265 #define SPI1_CS0_PIO_BASE PIOB_BASE
00266 #define SPI1_CS0_PSR_OFF PIO_ASR_OFF
00267
00268 #ifndef SPI1_CS3_PIN
00269 #define SPI1_CS3_PIN _BV(PC3_SPI1_NPCS3_B)
00270 #define SPI1_CS3_PIO_BASE PIOC_BASE
00271 #define SPI1_CS3_PSR_OFF PIO_BSR_OFF
00272 #endif
00273
00278 #define PB20_ISI_D0_B 20
00279 #define PB21_ISI_D1_B 21
00280 #define PB22_ISI_D2_B 22
00281 #define PB23_ISI_D3_B 23
00282 #define PB24_ISI_D4_B 24
00283 #define PB25_ISI_D5_B 25
00284 #define PB26_ISI_D6_B 26
00285 #define PB27_ISI_D7_B 27
00286 #define PB10_ISI_D8_B 10
00287 #define PB11_ISI_D9_B 11
00288 #define PB12_ISI_D10_B 12
00289 #define PB13_ISI_D11_B 13
00290 #define PB28_ISI_PCK_B 28
00291 #define PB29_ISI_VSYNC_B 29
00292 #define PB30_ISI_HSYNC_B 30
00293 #define PB31_ISI_MCK_B 31
00295
00296
00298 #define PA8_MCCK_A 8
00299 #define PA7_MCCDA_A 7
00300 #define PA6_MCDA0_A 6
00301 #define PA9_MCDA1_A 9
00302 #define PA10_MCDA2_A 10
00303 #define PA11_MCDA3_A 11
00304 #define PA1_MCCDB_B 1
00305 #define PA0_MCDB0_B 0
00306 #define PA5_MCDB1_B 5
00307 #define PA4_MCDB2_B 4
00308 #define PA3_MCDB3_B 3
00310
00311
00313 #define PA10_ETX2_B 10
00314 #define PA11_ETX3_B 11
00315 #define PA12_ETX0_A 12
00316 #define PA13_ETX1_A 13
00317 #define PA14_ERX0_A 14
00318 #define PA15_ERX1_A 15
00319 #define PA16_ETXEN_A 16
00320 #define PA17_ERXDV_A 17
00321 #define PA18_ERXER_A 18
00322 #define PA19_ETXCK_A 19
00323 #define PA20_EMDC_A 20
00324 #define PA21_EMDIO_A 21
00325 #define PA22_ETXER_B 22
00326 #define PA23_ETX2_B 23
00327 #define PA24_ETX3_B 24
00328 #define PA25_ERX2_B 25
00329 #define PA26_ERX3_B 26
00330 #define PA27_ERXCK_B 27
00331 #define PA28_ECRS_B 28
00332 #define PA29_ECOL_B 29
00333 #define PC21_EF100_B 21
00335
00336
00338 #define PA22_ADTRG_A 22
00340
00341
00343 #define PB14_DRXD_A 14
00344 #define PB15_DTXD_A 15
00346
00347
00349 #define PB18_TD0_A 18
00350 #define PB19_RD0_A 19
00351 #define PB16_TK0_A 16
00352 #define PB20_RK0_A 20
00353 #define PB17_TF0_A 17
00354 #define PB21_RF0_A 21
00356
00357
00359 #define PA23_TWD_A 23
00360 #define PA24_TWCK_A 24
00362
00363
00365 #define PA25_TCLK0_A 25
00366 #define PA26_TIOA0_A 26
00367 #define PC9_TIOB0_B 9
00369 #define PB6_TCLK1_B 6
00370 #define PA27_TIOA1_A 27
00371 #define PC7_TIOB1_A 7
00373 #define PB7_TCLK2_B 7
00374 #define PA28_TIOA2_A 28
00375 #define PC6_TIOB2_A 6
00377 #define PB16_TCLK3_B 16
00378 #define PB0_TIOA3_B 0
00379 #define PB1_TIOB3_B 1
00381 #define PB17_TCLK4_B 17
00382 #define PB2_TIOA4_B 2
00383 #define PB18_TIOB4_B 18
00385 #define PC22_TCLK5_B 22
00386 #define PB3_TIOA5_B 3
00387 #define PB19_TIOB5_B 19
00389
00390
00392 #define PB30_PCK0_A 30
00393 #define PC1_PCK0_B 1
00394 #define PB31_PCK1_A 31
00395 #define PC2_PCK1_B 2
00397
00398
00400 #define PC10_A25_CFRNW_A 10
00401 #define PC8_NCS4_CFCS0_A 8
00402 #define PC9_NCS5_CFCS1_A 9
00403 #define PC6_CFCE1_B 6
00404 #define PC7_CFCE2_B 7
00406
00407
00409 #define PC16_D16_A 16
00410 #define PC17_D17_A 17
00411 #define PC18_D18_A 18
00412 #define PC19_D19_A 19
00413 #define PC20_D20_A 20
00414 #define PC21_D21_A 21
00415 #define PC22_D22_A 22
00416 #define PC23_D23_A 23
00417 #define PC24_D24_A 24
00418 #define PC25_D25_A 25
00419 #define PC26_D26_A 26
00420 #define PC27_D27_A 27
00421 #define PC28_D28_A 28
00422 #define PC29_D29_A 29
00423 #define PC30_D30_A 30
00424 #define PC31_D31_A 31
00425 #define PC4_A23_A 4
00426 #define PC5_A24_A 5
00427 #define PC11_NCS2_A 11
00428 #define PC14_NCS3_NANDCS_A 14
00429 #define PC13_NCS6_B 13
00430 #define PC12_NCS7_B 12
00431 #define PC15_NWAIT_A 15
00433
00434
00436 #define PC13_FIQ_A 13
00437 #define PC12_IRQ0_A 12
00438 #define PC15_IRQ1_B 15
00439 #define PC14_IRQ2_B 14
00441
00442
00444 #endif