00001 #ifndef _ARCH_ARM_SAM7X_H_
00002 #define _ARCH_ARM_SAM7X_H_
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00096 #define FLASH_BASE 0x100000UL
00097 #define RAM_BASE 0x200000UL
00098
00099 #define TC_BASE 0xFFFA0000
00100 #define UDP_BASE 0xFFFB0000
00101 #define TWI_BASE 0xFFFB8000
00102 #define USART0_BASE 0xFFFC0000
00103 #define USART1_BASE 0xFFFC4000
00104 #define PWMC_BASE 0xFFFCC000
00105 #define CAN_BASE 0xFFFD0000
00106 #define SSC_BASE 0xFFFD4000
00107 #define ADC_BASE 0xFFFD8000
00108 #define EMAC_BASE 0xFFFDC000
00109 #define SPI0_BASE 0xFFFE0000
00110 #define SPI1_BASE 0xFFFE4000
00112 #define AIC_BASE 0xFFFFF000
00113 #define DBGU_BASE 0xFFFFF200
00114 #define PIOA_BASE 0xFFFFF400
00115 #define PIOB_BASE 0xFFFFF600
00116 #define PMC_BASE 0xFFFFFC00
00117 #define RSTC_BASE 0xFFFFFD00
00118 #define RTT_BASE 0xFFFFFD20
00119 #define PIT_BASE 0xFFFFFD30
00120 #define WDT_BASE 0xFFFFFD40
00121 #define VREG_BASE 0xFFFFFD60
00122 #define MC_BASE 0xFFFFFF00
00124 #define PERIPH_RPR_OFF 0x00000100
00125 #define PERIPH_RCR_OFF 0x00000104
00126 #define PERIPH_TPR_OFF 0x00000108
00127 #define PERIPH_TCR_OFF 0x0000010C
00128 #define PERIPH_RNPR_OFF 0x00000110
00129 #define PERIPH_RNCR_OFF 0x00000114
00130 #define PERIPH_TNPR_OFF 0x00000118
00131 #define PERIPH_TNCR_OFF 0x0000011C
00132 #define PERIPH_PTCR_OFF 0x00000120
00133 #define PERIPH_PTSR_OFF 0x00000124
00135 #define PDC_RXTEN 0x00000001
00136 #define PDC_RXTDIS 0x00000002
00137 #define PDC_TXTEN 0x00000100
00138 #define PDC_TXTDIS 0x00000200
00140 #define DBGU_HAS_PDC
00141 #define SPI_HAS_PDC
00142 #define SSC_HAS_PDC
00143 #define USART_HAS_PDC
00144
00145 #define PIO_HAS_MULTIDRIVER
00146 #define PIO_HAS_PULLUP
00147 #define PIO_HAS_PERIPHERALSELECT
00148 #define PIO_HAS_OUTPUTWRITEENABLE
00149
00150 #include <arch/arm/at91_tc.h>
00151 #include <arch/arm/at91_us.h>
00152 #include <arch/arm/at91_dbgu.h>
00153 #include <arch/arm/at91_emac.h>
00154 #include <arch/arm/at91_spi.h>
00155 #include <arch/arm/at91_aic.h>
00156 #include <arch/arm/at91_pio.h>
00157 #include <arch/arm/at91_pmc.h>
00158 #include <arch/arm/at91_rstc.h>
00159 #include <arch/arm/at91_wdt.h>
00160 #include <arch/arm/at91_pit.h>
00161 #include <arch/arm/at91_mc.h>
00162 #include <arch/arm/at91_ssc.h>
00163 #include <arch/arm/at91_udp.h>
00164 #include <arch/arm/at91_twi.h>
00165 #include <arch/arm/at91_adc.h>
00166
00169
00172 #define FIQ_ID 0
00173 #define SYSC_ID 1
00174 #define PIOA_ID 2
00175 #define PIOB_ID 3
00176 #define SPI0_ID 4
00177 #define SPI1_ID 5
00178 #define US0_ID 6
00179 #define US1_ID 7
00180 #define SSC_ID 8
00181 #define TWI_ID 9
00182 #define PWMC_ID 10
00183 #define UDP_ID 11
00184 #define TC0_ID 12
00185 #define TC1_ID 13
00186 #define TC2_ID 14
00187 #define CAN_ID 15
00188 #define EMAC_ID 16
00189 #define ADC_ID 17
00190 #define IRQ0_ID 30
00191 #define IRQ1_ID 31
00193
00194
00196 #define SPI0_NPCS0_PA12A 12
00197 #define SPI0_NPCS1_PA13A 13
00198 #define SPI0_NPCS1_PA07B 7
00199 #define SPI0_NPCS1_PB13B 13
00200 #define SPI0_NPCS2_PA14A 14
00201 #define SPI0_NPCS2_PA08B 8
00202 #define SPI0_NPCS2_PB14B 14
00203 #define SPI0_NPCS3_PA15A 15
00204 #define SPI0_NPCS3_PA09B 9
00205 #define SPI0_NPCS3_PB17B 17
00206 #define SPI0_MISO_PA16A 16
00207 #define SPI0_MOSI_PA17A 17
00208 #define SPI0_SPCK_PA18A 18
00210
00211
00213 #define PA0_RXD0_A 0
00214 #define PA1_TXD0_A 1
00215 #define PA2_SCK0_A 2
00216 #define PA3_RTS0_A 3
00217 #define PA4_CTS0_A 4
00218
00219 #define PA5_RXD1_A 5
00220 #define PA6_TXD1_A 6
00221 #define PA7_SCK1_A 7
00222 #define PA8_RTS1_A 8
00223 #define PA9_CTS1_A 9
00224 #define PB23_DCD1_B 23
00225 #define PB24_DSR1_B 24
00226 #define PB25_DTR1_B 25
00227 #define PB26_RI1_B 26
00228
00232 #define PA16_SPI0_MISO_A 16
00233 #define PA17_SPI0_MOSI_A 17
00234 #define PA18_SPI0_SPCK_A 18
00235 #define PA12_SPI0_NPCS0_A 12
00236 #define PA13_SPI0_NPCS1_A 13
00237 #define PA7_SPI0_NPCS1_B 7
00238 #define PA14_SPI0_NPCS2_A 14
00239 #define PB14_SPI0_NPCS2_B 14
00240 #define PA8_SPI0_NPCS2_B 8
00241 #define PA15_SPI0_NPCS3_A 15
00242 #define PA9_SPI0_NPCS3_B 9
00243
00244 #define SPI0_PINS _BV(PA16_SPI0_MISO_A) | _BV(PA17_SPI0_MOSI_A) | _BV(PA18_SPI0_SPCK_A)
00245 #define SPI0_PIO_BASE PIOA_BASE
00246 #define SPI0_PSR_OFF PIO_ASR_OFF
00247
00248 #define SPI0_CS0_PIN _BV(PA12_SPI0_NPCS0_A)
00249 #define SPI0_CS0_PIO_BASE PIOA_BASE
00250 #define SPI0_CS0_PSR_OFF PIO_ASR_OFF
00251
00252 #ifndef SPI0_CS1_PIN
00253 #define SPI0_CS1_PIN _BV(PA13_SPI0_NPCS1_A)
00254 #define SPI0_CS1_PIO_BASE PIOA_BASE
00255 #define SPI0_CS1_PSR_OFF PIO_ASR_OFF
00256 #endif
00257
00258 #ifndef SPI0_CS2_PIN
00259 #define SPI0_CS2_PIN _BV(PA14_SPI0_NPCS2_A)
00260 #define SPI0_CS2_PIO_BASE PIOA_BASE
00261 #define SPI0_CS2_PSR_OFF PIO_ASR_OFF
00262 #endif
00263
00264 #ifndef SPI0_CS3_PIN
00265 #define SPI0_CS3_PIN _BV(PA15_SPI0_NPCS3_A)
00266 #define SPI0_CS3_PIO_BASE PIOA_BASE
00267 #define SPI0_CS3_PSR_OFF PIO_ASR_OFF
00268 #endif
00269
00270 #define PA24_SPI1_MISO_B 24
00271 #define PA23_SPI1_MOSI_B 23
00272 #define PA22_SPI1_SPCK_B 22
00273 #define PA21_SPI1_NPCS0_B 21
00274 #define PA25_SPI1_NPCS1_B 25
00275 #define PB13_SPI0_NPCS1_B 13
00276 #define PA2_SPI1_NPCS1_B 2
00277 #define PB10_SPI1_NPCS1_B 10
00278 #define PA26_SPI1_NPCS2_B 26
00279 #define PA3_SPI1_NPCS2_B 3
00280 #define PB11_SPI1_NPCS2_B 11
00281 #define PB17_SPI0_NPCS3_B 17
00282 #define PA4_SPI1_NPCS3_B 4
00283 #define PA29_SPI1_NPCS3_B 29
00284 #define PB16_SPI1_NPCS3_B 16
00285
00286 #define SPI1_PINS _BV(PA24_SPI1_MISO_B) | _BV(PA23_SPI1_MOSI_B) | _BV(PA22_SPI1_SPCK_B)
00287 #define SPI1_PIO_BASE PIOA_BASE
00288 #define SPI1_PSR_OFF PIO_BSR_OFF
00289
00290 #define SPI1_CS0_PIN _BV(PA21_SPI1_NPCS0_B)
00291 #define SPI1_CS0_PIO_BASE PIOA_BASE
00292 #define SPI1_CS0_PSR_OFF PIO_BSR_OFF
00293
00294 #ifndef SPI1_CS1_PIN
00295 #define SPI1_CS1_PIN _BV(PA25_SPI1_NPCS1_B)
00296 #define SPI1_CS1_PIO_BASE PIOA_BASE
00297 #define SPI1_CS1_PSR_OFF PIO_BSR_OFF
00298 #endif
00299
00300 #ifndef SPI1_CS2_PIN
00301 #define SPI1_CS2_PIN _BV(PA26_SPI1_NPCS2_B)
00302 #define SPI1_CS2_PIO_BASE PIOA_BASE
00303 #define SPI1_CS2_PSR_OFF PIO_BSR_OFF
00304 #endif
00305
00306 #ifndef SPI1_CS3_PIN
00307 #define SPI1_CS3_PIN _BV(PA29_SPI1_NPCS3_B)
00308 #define SPI1_CS3_PIO_BASE PIOA_BASE
00309 #define SPI1_CS3_PSR_OFF PIO_BSR_OFF
00310 #endif
00311
00316 #define PB0_ETXCK_EREFCK_A 0
00317 #define PB1_ETXEN_A 1
00318 #define PB2_ETX0_A 2
00319 #define PB3_ETX1_A 3
00320 #define PB4_ECRS_A 4
00321 #define PB5_ERX0_A 5
00322 #define PB6_ERX1_A 6
00323 #define PB7_ERXER_A 7
00324 #define PB8_EMDC_A 8
00325 #define PB9_EMDIO_A 9
00326 #define PB10_ETX2_A 10
00327 #define PB11_ETX3_A 11
00328 #define PB12_ETXER_A 12
00329 #define PB13_ERX2_A 13
00330 #define PB14_ERX3_A 14
00331 #define PB15_ERXDV_ECRSDV_A 15
00332 #define PB16_ECOL_A 16
00333 #define PB17_ERXCK_A 17
00334 #define PB18_EF100_A 18
00335
00339 #define PA27_DRXD_A 27
00340 #define PA28_DTXD_A 28
00341
00345 #define PA23_TD_A 23
00346 #define PA24_RD_A 24
00347 #define PA22_TK_A 22
00348 #define PA25_RK_A 25
00349 #define PA21_TF_A 21
00350 #define PA26_RF_A 26
00352
00353
00355 #define PA10_TWD_A 10
00356 #define PA11_TWCK_A 11
00358
00359
00361 #define PB23_TIOA0_A 23
00362 #define PB24_TIOB0_A 24
00363 #define PB12_TCLK0_B 12
00364
00365 #define PB25_TIOA1_A 25
00366 #define PB26_TIOB1_A 26
00367 #define PB19_TCLK1_B 19
00368
00369 #define PB27_TIOA2_A 27
00370 #define PB28_TIOB2_A 28
00371 #define PA15_TCLK2_B 15
00372
00376 #define PB0_PCK0_B 0
00377 #define PB20_PCK0_B 20
00378 #define PA13_PCK1_B 13
00379 #define PB29_PCK1_A 29
00380 #define PB21_PCK1_B 21
00381 #define PA30_PCK2_B 30
00382 #define PB30_PCK2_A 30
00383 #define PB22_PCK2_B 22
00384 #define PA27_PCK3_B 27
00385
00389 #define PA29_FIQ_A 29
00390 #define PA30_IRQ0_A 30
00391 #define PA14_IRQ1_B 14
00392
00396 #define PB18_ADTRG_B 18
00398
00399
00401 #define PA19_CANRX_A 19
00402 #define PA20_CANTX_A 20
00403
00407 #define PB19_PWM0_A 19
00408 #define PB27_PWM0_B 27
00409 #define PB20_PWM1_A 20
00410 #define PB28_PWM1_B 28
00411 #define PB21_PWM2_A 21
00412 #define PB29_PWM2_B 29
00413 #define PB22_PWM3_A 22
00414 #define PB30_PWM3_B 30
00415
00417
00419 #endif