usart0at91.c

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00001 /*
00002  * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  */
00032 
00033 /*
00034  * $Log: usart0at91.c,v $
00035  * Revision 1.6.2.3  2009/03/09 17:52:44  haraldkipp
00036  * UART driver was broken on SAM7S and SAM7SE.
00037  *
00038  * Revision 1.6.2.2  2008/10/04 17:39:27  haraldkipp
00039  * UART driver was broken on SAM7S and SAM7SE.
00040  *
00041  * Revision 1.6.2.1  2008/08/25 15:09:33  haraldkipp
00042  * Initializing peripheral control registers in a more general
00043  * way. Works now for AT91SAM9260 and fixes bug #2032960.
00044  *
00045  * Revision 1.6  2008/04/18 13:24:55  haraldkipp
00046  * Added Szemzo Andras' RS485 patch.
00047  *
00048  * Revision 1.5  2008/02/15 16:59:11  haraldkipp
00049  * Spport for AT91SAM7SE512 added.
00050  *
00051  * Revision 1.4  2007/10/04 20:04:11  olereinhardt
00052  * Support for SAM7S256 added
00053  *
00054  * Revision 1.3  2006/07/05 07:55:23  haraldkipp
00055  * Daidai's support for AT91SAM7X added.
00056  *
00057  * Revision 1.2  2006/01/05 16:46:52  haraldkipp
00058  * Baudrate calculation is now based on NutGetCpuClock().
00059  *
00060  * Revision 1.1  2005/11/20 14:40:28  haraldkipp
00061  * Added interrupt driven UART driver for AT91.
00062  *
00063  */
00064 
00065 #include <cfg/os.h>
00066 #include <cfg/clock.h>
00067 #include <cfg/arch.h>
00068 
00069 #include <string.h>
00070 
00071 #include <sys/atom.h>
00072 #include <sys/event.h>
00073 #include <sys/timer.h>
00074 
00075 #include <dev/irqreg.h>
00076 #include <dev/usartat91.h>
00077 
00078 #ifndef NUT_CPU_FREQ
00079 #ifdef NUT_PLL_CPUCLK
00080 #include <dev/cy2239x.h>
00081 #else /* !NUT_PLL_CPUCLK */
00082 #define NUT_CPU_FREQ    73728000UL
00083 #endif /* !NUT_PLL_CPUCLK */
00084 #endif /* !NUT_CPU_FREQ */
00085 
00086 /*
00087  * Local function prototypes.
00088  */
00089 static u_long At91UsartGetSpeed(void);
00090 static int At91UsartSetSpeed(u_long rate);
00091 static u_char At91UsartGetDataBits(void);
00092 static int At91UsartSetDataBits(u_char bits);
00093 static u_char At91UsartGetParity(void);
00094 static int At91UsartSetParity(u_char mode);
00095 static u_char At91UsartGetStopBits(void);
00096 static int At91UsartSetStopBits(u_char bits);
00097 static u_long At91UsartGetFlowControl(void);
00098 static int At91UsartSetFlowControl(u_long flags);
00099 static u_long At91UsartGetStatus(void);
00100 static int At91UsartSetStatus(u_long flags);
00101 static u_char At91UsartGetClockMode(void);
00102 static int At91UsartSetClockMode(u_char mode);
00103 static void At91UsartTxStart(void);
00104 static void At91UsartRxStart(void);
00105 static int At91UsartInit(void);
00106 static int At91UsartDeinit(void);
00107 
00112 
00116 static USARTDCB dcb_usart0 = {
00117     0,                          /* dcb_modeflags */
00118     0,                          /* dcb_statusflags */
00119     0,                          /* dcb_rtimeout */
00120     0,                          /* dcb_wtimeout */
00121     {0, 0, 0, 0, 0, 0, 0, 0},   /* dcb_tx_rbf */
00122     {0, 0, 0, 0, 0, 0, 0, 0},   /* dcb_rx_rbf */
00123     0,                          /* dbc_last_eol */
00124     At91UsartInit,              /* dcb_init */
00125     At91UsartDeinit,            /* dcb_deinit */
00126     At91UsartTxStart,           /* dcb_tx_start */
00127     At91UsartRxStart,           /* dcb_rx_start */
00128     At91UsartSetFlowControl,    /* dcb_set_flow_control */
00129     At91UsartGetFlowControl,    /* dcb_get_flow_control */
00130     At91UsartSetSpeed,          /* dcb_set_speed */
00131     At91UsartGetSpeed,          /* dcb_get_speed */
00132     At91UsartSetDataBits,       /* dcb_set_data_bits */
00133     At91UsartGetDataBits,       /* dcb_get_data_bits */
00134     At91UsartSetParity,         /* dcb_set_parity */
00135     At91UsartGetParity,         /* dcb_get_parity */
00136     At91UsartSetStopBits,       /* dcb_set_stop_bits */
00137     At91UsartGetStopBits,       /* dcb_get_stop_bits */
00138     At91UsartSetStatus,         /* dcb_set_status */
00139     At91UsartGetStatus,         /* dcb_get_status */
00140     At91UsartSetClockMode,      /* dcb_set_clock_mode */
00141     At91UsartGetClockMode,      /* dcb_get_clock_mode */
00142 };
00143 
00159 NUTDEVICE devUsartAt910 = {
00160     0,                          /* Pointer to next device, dev_next. */
00161     {'u', 'a', 'r', 't', '0', 0, 0, 0, 0},    /* Unique device name, dev_name. */
00162     IFTYP_CHAR,                 /* Type of device, dev_type. */
00163     0,                          /* Base address, dev_base (not used). */
00164     0,                          /* First interrupt number, dev_irq (not used). */
00165     0,                          /* Interface control block, dev_icb (not used). */
00166     &dcb_usart0,                /* Driver control block, dev_dcb. */
00167     UsartInit,                  /* Driver initialization routine, dev_init. */
00168     UsartIOCtl,                 /* Driver specific control function, dev_ioctl. */
00169     UsartRead,                  /* Read from device, dev_read. */
00170     UsartWrite,                 /* Write to device, dev_write. */
00171     UsartOpen,                  /* Open a device or file, dev_open. */
00172     UsartClose,                 /* Close a device or file, dev_close. */
00173     UsartSize                   /* Request file size, dev_size. */
00174 };
00175 
00179 
00180 /*
00181 ** SAM9260 and SAM9XE pins.
00182 */
00183 #if defined(MCU_AT91SAM9260) || defined(MCU_AT91SAM9XE)
00184 #if defined(UART0_MODEM_CONTROL)
00185 #define US_PIOB_PINS_A  ( \
00186     _BV(PB4_TXD0_A) | _BV(PB5_RXD0_A) | _BV(PB27_CTS0_A) | _BV(PB26_RTS0_A) \
00187     | _BV(PB25_RI0_A) | _BV(PB22_DSR0_A) | _BV(PB23_DCD0_A) | _BV(PB24_DTR0_A) \
00188 )
00189 #elif defined(UART0_HARDWARE_HANDSHAKE)
00190 #define US_PIOB_PINS_A  ( \
00191     _BV(PB4_TXD0_A) | _BV(PB5_RXD0_A) | _BV(PB27_CTS0_A) | _BV(PB26_RTS0_A) \
00192 )
00193 #else
00194 #define US_PIOB_PINS_A  (_BV(PB4_TXD0_A) | _BV(PB5_RXD0_A))
00195 #endif
00196 #define US_PIOB_PINS    US_PIOB_PINS_A
00197 #endif
00198 
00199 /*
00200 ** SAM7S and SAM7SE pins.
00201 */
00202 #if defined(MCU_AT91SAM7S) || defined(MCU_AT91SAM7SE)
00203 #if defined(UART0_HARDWARE_HANDSHAKE)
00204 #define US_PIOA_PINS_A  ( \
00205     _BV(PA6_TXD0_A) | _BV(PA5_RXD0_A) | _BV(PA8_CTS0_A) | _BV(PA7_RTS0_A) \
00206 )
00207 #else
00208 #define US_PIOA_PINS_A  (_BV(PA5_RXD0_A) | _BV(PA6_TXD0_A))
00209 #endif
00210 #define US_PIOA_PINS    US_PIOA_PINS_A
00211 #endif
00212 
00213 /*
00214 ** SAM7X pins.
00215 */
00216 #if defined(MCU_AT91SAM7X)
00217 #if defined(UART0_HARDWARE_HANDSHAKE)
00218 #define US_PIOA_PINS_A  ( \
00219     _BV(PA1_TXD0_A) | _BV(PA0_RXD0_A) | _BV(PA4_CTS0_A) | _BV(PA3_RTS0_A) \
00220 )
00221 #else
00222 #define US_PIOA_PINS_A  (_BV(PA1_TXD0_A) | _BV(PA0_RXD0_A))
00223 #endif
00224 #define US_PIOA_PINS    US_PIOA_PINS_A
00225 #endif
00226 
00227 /*
00228 ** X40 pins.
00229 */
00230 #if defined(MCU_AT91R40008)
00231 #define US_PIO_PINS     (_BV(P15_RXD0) | _BV(P14_TXD0))
00232 #endif
00233 
00234 /*
00235 ** Historical settings from Szemzo Andras for RS485.
00236 ** Not sure if we must keep this.
00237 */
00238 #ifdef AT91_UART0_RS485
00239 #if defined(MCU_AT91SAM7X256)
00240 #undef US_PIOA_PINS_A
00241 #define US_PIOA_PINS_A  (_BV(PA0_RXD0_A) | _BV(PA1_TXD0_A) | _BV(PA3_RTS0_A))
00242 #undef AT91_UART_RS485_MODE
00243 #define AT91_UART_RS485_MODE
00244 #undef US_PIOA_PINS
00245 #define US_PIOA_PINS    US_PIOA_PINS_A
00246 #endif
00247 #endif /* AT91_UART0_RS485 */
00248 
00249 #define USARTn_BASE     USART0_BASE
00250 #define US_ID           US0_ID
00251 #define SIG_UART        sig_UART0
00252 #define dcb_usart       dcb_usart0
00253 
00254 #include "usartat91.c"

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