usart1at91.c

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00001 /*
00002  * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  */
00032 
00033 /*
00034  * $Log: usart1at91.c,v $
00035  * Revision 1.6.2.1  2008/08/25 15:09:34  haraldkipp
00036  * Initializing peripheral control registers in a more general
00037  * way. Works now for AT91SAM9260 and fixes bug #2032960.
00038  *
00039  * Revision 1.6  2008/04/18 13:24:55  haraldkipp
00040  * Added Szemzo Andras' RS485 patch.
00041  *
00042  * Revision 1.5  2008/02/15 16:59:11  haraldkipp
00043  * Spport for AT91SAM7SE512 added.
00044  *
00045  * Revision 1.4  2007/10/04 20:04:33  olereinhardt
00046  * Support for SAM7S256 added
00047  *
00048  * Revision 1.3  2006/07/05 07:55:23  haraldkipp
00049  * Daidai's support for AT91SAM7X added.
00050  *
00051  * Revision 1.2  2006/01/05 16:47:08  haraldkipp
00052  * Baudrate calculation is now based on NutGetCpuClock().
00053  *
00054  * Revision 1.1  2005/11/20 14:40:28  haraldkipp
00055  * Added interrupt driven UART driver for AT91.
00056  *
00057  */
00058 
00059 #include <cfg/os.h>
00060 #include <cfg/clock.h>
00061 #include <arch/arm.h>
00062 
00063 #include <string.h>
00064 
00065 #include <sys/atom.h>
00066 #include <sys/event.h>
00067 #include <sys/timer.h>
00068 
00069 #include <dev/irqreg.h>
00070 #include <dev/usartat91.h>
00071 
00072 #ifndef NUT_CPU_FREQ
00073 #ifdef NUT_PLL_CPUCLK
00074 #include <dev/cy2239x.h>
00075 #else /* !NUT_PLL_CPUCLK */
00076 #define NUT_CPU_FREQ    73728000UL
00077 #endif /* !NUT_PLL_CPUCLK */
00078 #endif /* !NUT_CPU_FREQ */
00079 
00080 /*
00081  * Local function prototypes.
00082  */
00083 static u_long At91UsartGetSpeed(void);
00084 static int At91UsartSetSpeed(u_long rate);
00085 static u_char At91UsartGetDataBits(void);
00086 static int At91UsartSetDataBits(u_char bits);
00087 static u_char At91UsartGetParity(void);
00088 static int At91UsartSetParity(u_char mode);
00089 static u_char At91UsartGetStopBits(void);
00090 static int At91UsartSetStopBits(u_char bits);
00091 static u_long At91UsartGetFlowControl(void);
00092 static int At91UsartSetFlowControl(u_long flags);
00093 static u_long At91UsartGetStatus(void);
00094 static int At91UsartSetStatus(u_long flags);
00095 static u_char At91UsartGetClockMode(void);
00096 static int At91UsartSetClockMode(u_char mode);
00097 static void At91UsartTxStart(void);
00098 static void At91UsartRxStart(void);
00099 static int At91UsartInit(void);
00100 static int At91UsartDeinit(void);
00101 
00106 
00110 static USARTDCB dcb_usart1 = {
00111     0,                          /* dcb_modeflags */
00112     0,                          /* dcb_statusflags */
00113     0,                          /* dcb_rtimeout */
00114     0,                          /* dcb_wtimeout */
00115     {0, 0, 0, 0, 0, 0, 0, 0},   /* dcb_tx_rbf */
00116     {0, 0, 0, 0, 0, 0, 0, 0},   /* dcb_rx_rbf */
00117     0,                          /* dbc_last_eol */
00118     At91UsartInit,              /* dcb_init */
00119     At91UsartDeinit,            /* dcb_deinit */
00120     At91UsartTxStart,           /* dcb_tx_start */
00121     At91UsartRxStart,           /* dcb_rx_start */
00122     At91UsartSetFlowControl,    /* dcb_set_flow_control */
00123     At91UsartGetFlowControl,    /* dcb_get_flow_control */
00124     At91UsartSetSpeed,          /* dcb_set_speed */
00125     At91UsartGetSpeed,          /* dcb_get_speed */
00126     At91UsartSetDataBits,       /* dcb_set_data_bits */
00127     At91UsartGetDataBits,       /* dcb_get_data_bits */
00128     At91UsartSetParity,         /* dcb_set_parity */
00129     At91UsartGetParity,         /* dcb_get_parity */
00130     At91UsartSetStopBits,       /* dcb_set_stop_bits */
00131     At91UsartGetStopBits,       /* dcb_get_stop_bits */
00132     At91UsartSetStatus,         /* dcb_set_status */
00133     At91UsartGetStatus,         /* dcb_get_status */
00134     At91UsartSetClockMode,      /* dcb_set_clock_mode */
00135     At91UsartGetClockMode,      /* dcb_get_clock_mode */
00136 };
00137 
00153 NUTDEVICE devUsartAt911 = {
00154     0,                          /* Pointer to next device, dev_next. */
00155     {'u', 'a', 'r', 't', '1', 0, 0, 0, 0},    /* Unique device name, dev_name. */
00156     IFTYP_CHAR,                 /* Type of device, dev_type. */
00157     1,                          /* Base address, dev_base (not used). */
00158     0,                          /* First interrupt number, dev_irq (not used). */
00159     0,                          /* Interface control block, dev_icb (not used). */
00160     &dcb_usart1,                /* Driver control block, dev_dcb. */
00161     UsartInit,                  /* Driver initialization routine, dev_init. */
00162     UsartIOCtl,                 /* Driver specific control function, dev_ioctl. */
00163     UsartRead,                  /* Read from device, dev_read. */
00164     UsartWrite,                 /* Write to device, dev_write. */
00165     UsartOpen,                  /* Open a device or file, dev_open. */
00166     UsartClose,                 /* Close a device or file, dev_close. */
00167     UsartSize                   /* Request file size, dev_size. */
00168 };
00169 
00173 
00174 #if defined(MCU_AT91SAM9260) || defined(MCU_AT91SAM9XE512)
00175 #define US_PIOB_PINS_A  (_BV(PB6_TXD1_A) | _BV(PB7_RXD1_A))
00176 #define US_PIOB_PINS    US_PIOB_PINS_A
00177 #endif
00178 
00179 #if defined(MCU_AT91SAM7X256)
00180 #ifdef AT91_UART1_RS485
00181 #define US_PIOA_PINS_A  (_BV(PA5_RXD1_A) | _BV(PA6_TXD1_A) | _BV(PA8_RTS1_A))
00182 #define AT91_UART_RS485_MODE
00183 #else /* AT91_UART1_RS485 */
00184 #define US_PIOA_PINS_A  (_BV(PA5_RXD1_A) | _BV(PA6_TXD1_A))
00185 #undef AT91_UART_RS485_MODE
00186 #endif /* AT91_UART1_RS485 */
00187 #define US_PIOA_PINS    US_PIOA_PINS_A
00188 #endif
00189 
00190 #if defined(MCU_AT91SAM7S256) || defined(MCU_AT91SAM7SE512)
00191 #define US_PIOA_PINS_A  (_BV(PA21_RXD1_A) | _BV(PA22_TXD1_A))
00192 #define US_PIO_PINS     US_PIOA_PINS_A
00193 #endif
00194 
00195 #if defined(MCU_AT91R40008)
00196 #define US_PIO_PINS     (_BV(P22_RXD1) | _BV(P21_TXD1))
00197 #endif
00198 
00199 #define USARTn_BASE     USART1_BASE
00200 #define US_ID           US1_ID
00201 #define SIG_UART        sig_UART1
00202 #define dcb_usart       dcb_usart1
00203 
00204 #include "usartat91.c"

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