sbbif0.h

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00001 #ifndef _DEV_SBBIF0_H_
00002 #define _DEV_SBBIF0_H_
00003 /*
00004  * Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  *
00010  * 1. Redistributions of source code must retain the above copyright
00011  *    notice, this list of conditions and the following disclaimer.
00012  * 2. Redistributions in binary form must reproduce the above copyright
00013  *    notice, this list of conditions and the following disclaimer in the
00014  *    documentation and/or other materials provided with the distribution.
00015  * 3. Neither the name of the copyright holders nor the names of
00016  *    contributors may be used to endorse or promote products derived
00017  *    from this software without specific prior written permission.
00018  *
00019  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00020  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00022  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00023  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00024  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00025  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00026  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00027  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00028  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00029  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00030  * SUCH DAMAGE.
00031  *
00032  * For additional information see http://www.ethernut.de/
00033  */
00034 
00052 #include <cfg/arch/gpio.h>
00053 
00057 #ifndef SBBI0_MAX_DEVICES
00058 #define SBBI0_MAX_DEVICES   4
00059 #endif
00060 
00061 #if defined(__AVR__)            /* MCU */
00062 /*
00063  * AVR implementation.
00064  * ======================================
00065  */
00066 
00067 #ifdef SBBI0_SCK_AVRBIT
00068 #define SBBI0_SCK_BIT   SBBI0_SCK_AVRBIT
00069 #endif
00070 #ifdef SBBI0_MOSI_AVRBIT
00071 #define SBBI0_MOSI_BIT  SBBI0_MOSI_AVRBIT
00072 #endif
00073 #ifdef SBBI0_MISO_AVRBIT
00074 #define SBBI0_MISO_BIT  SBBI0_MISO_AVRBIT
00075 #endif
00076 #ifdef SBBI0_CS0_AVRBIT
00077 #define SBBI0_CS0_BIT   SBBI0_CS0_AVRBIT
00078 #endif
00079 #ifdef SBBI0_CS1_AVRBIT
00080 #define SBBI0_CS1_BIT   SBBI0_CS1_AVRBIT
00081 #endif
00082 #ifdef SBBI0_CS2_AVRBIT
00083 #define SBBI0_CS2_BIT   SBBI0_CS2_AVRBIT
00084 #endif
00085 #ifdef SBBI0_CS3_AVRBIT
00086 #define SBBI0_CS3_BIT   SBBI0_CS3_AVRBIT
00087 #endif
00088 #ifdef SBBI0_RST0_AVRBIT
00089 #define SBBI0_RST0_BIT  SBBI0_RST0_AVRBIT
00090 #endif
00091 #ifdef SBBI0_RST1_AVRBIT
00092 #define SBBI0_RST1_BIT  SBBI0_RST1_AVRBIT
00093 #endif
00094 #ifdef SBBI0_RST2_AVRBIT
00095 #define SBBI0_RST2_BIT  SBBI0_RST2_AVRBIT
00096 #endif
00097 #ifdef SBBI0_RST3_AVRBIT
00098 #define SBBI0_RST3_BIT  SBBI0_RST3_AVRBIT
00099 #endif
00100 
00101 #ifdef SBBI0_CS0_BIT
00102 
00103 #if (SBBI0_CS0_AVRPORT == AVRPORTB)
00104 #define SBBI0_CS0_SOD_REG PORTB
00105 #define SBBI0_CS0_OE_REG  DDRB
00106 #elif (SBBI0_CS0_AVRPORT == AVRPORTD)
00107 #define SBBI0_CS0_SOD_REG PORTD
00108 #define SBBI0_CS0_OE_REG  DDRD
00109 #elif (SBBI0_CS0_AVRPORT == AVRPORTE)
00110 #define SBBI0_CS0_SOD_REG PORTE
00111 #define SBBI0_CS0_OE_REG  DDRE
00112 #elif (SBBI0_CS0_AVRPORT == AVRPORTF)
00113 #define SBBI0_CS0_SOD_REG PORTF
00114 #define SBBI0_CS0_OE_REG  DDRF
00115 #elif (SBBI0_CS0_AVRPORT == AVRPORTG)
00116 #define SBBI0_CS0_SOD_REG PORTG
00117 #define SBBI0_CS0_OE_REG  DDRG
00118 #elif (SBBI0_CS0_AVRPORT == AVRPORTH)
00119 #define SBBI0_CS0_SOD_REG PORTH
00120 #define SBBI0_CS0_OE_REG  DDRH
00121 #endif
00122 
00124 #define SBBI0_CS0_ENA()      sbi(SBBI0_CS0_OE_REG, SBBI0_CS0_BIT)
00125 
00126 #define SBBI0_CS0_CLR()      cbi(SBBI0_CS0_SOD_REG, SBBI0_CS0_BIT)
00127 
00128 #define SBBI0_CS0_SET()      sbi(SBBI0_CS0_SOD_REG, SBBI0_CS0_BIT)
00129 
00130 #else /* SBBI0_CS0_BIT */
00131 
00132 #define SBBI0_CS0_ENA()
00133 #define SBBI0_CS0_CLR()
00134 #define SBBI0_CS0_SET()
00135 
00136 #endif /* SBBI0_CS0_BIT */
00137 
00138 #ifdef SBBI0_CS1_BIT
00139 
00140 #if (SBBI0_CS1_AVRPORT == AVRPORTB)
00141 #define SBBI0_CS1_SOD_REG PORTB
00142 #define SBBI0_CS1_OE_REG  DDRB
00143 #elif (SBBI0_CS1_AVRPORT == AVRPORTD)
00144 #define SBBI0_CS1_SOD_REG PORTD
00145 #define SBBI0_CS1_OE_REG  DDRD
00146 #elif (SBBI0_CS1_AVRPORT == AVRPORTE)
00147 #define SBBI0_CS1_SOD_REG PORTE
00148 #define SBBI0_CS1_OE_REG  DDRE
00149 #elif (SBBI0_CS1_AVRPORT == AVRPORTF)
00150 #define SBBI0_CS1_SOD_REG PORTF
00151 #define SBBI0_CS1_OE_REG  DDRF
00152 #elif (SBBI0_CS1_AVRPORT == AVRPORTG)
00153 #define SBBI0_CS1_SOD_REG PORTG
00154 #define SBBI0_CS1_OE_REG  DDRG
00155 #elif (SBBI0_CS1_AVRPORT == AVRPORTH)
00156 #define SBBI0_CS1_SOD_REG PORTH
00157 #define SBBI0_CS1_OE_REG  DDRH
00158 #endif
00159 
00161 #define SBBI0_CS1_ENA()      sbi(SBBI0_CS1_OE_REG, SBBI0_CS1_BIT)
00162 
00163 #define SBBI0_CS1_CLR()      cbi(SBBI0_CS1_SOD_REG, SBBI0_CS1_BIT)
00164 
00165 #define SBBI0_CS1_SET()      sbi(SBBI0_CS1_SOD_REG, SBBI0_CS1_BIT)
00166 
00167 #else /* SBBI0_CS1_BIT */
00168 
00169 #define SBBI0_CS1_ENA()
00170 #define SBBI0_CS1_CLR()
00171 #define SBBI0_CS1_SET()
00172 
00173 #endif /* SBBI0_CS1_BIT */
00174 
00175 #ifdef SBBI0_CS2_BIT
00176 
00177 #if (SBBI0_CS2_AVRPORT == AVRPORTB)
00178 #define SBBI0_CS2_SOD_REG PORTB
00179 #define SBBI0_CS2_OE_REG  DDRB
00180 #elif (SBBI0_CS2_AVRPORT == AVRPORTD)
00181 #define SBBI0_CS2_SOD_REG PORTD
00182 #define SBBI0_CS2_OE_REG  DDRD
00183 #elif (SBBI0_CS2_AVRPORT == AVRPORTE)
00184 #define SBBI0_CS2_SOD_REG PORTE
00185 #define SBBI0_CS2_OE_REG  DDRE
00186 #elif (SBBI0_CS2_AVRPORT == AVRPORTF)
00187 #define SBBI0_CS2_SOD_REG PORTF
00188 #define SBBI0_CS2_OE_REG  DDRF
00189 #elif (SBBI0_CS2_AVRPORT == AVRPORTG)
00190 #define SBBI0_CS2_SOD_REG PORTG
00191 #define SBBI0_CS2_OE_REG  DDRG
00192 #elif (SBBI0_CS2_AVRPORT == AVRPORTH)
00193 #define SBBI0_CS2_SOD_REG PORTH
00194 #define SBBI0_CS2_OE_REG  DDRH
00195 #endif
00196 
00198 #define SBBI0_CS2_ENA()      sbi(SBBI0_CS2_OE_REG, SBBI0_CS2_BIT)
00199 
00200 #define SBBI0_CS2_CLR()      cbi(SBBI0_CS2_SOD_REG, SBBI0_CS2_BIT)
00201 
00202 #define SBBI0_CS2_SET()      sbi(SBBI0_CS2_SOD_REG, SBBI0_CS2_BIT)
00203 
00204 #else /* SBBI0_CS2_BIT */
00205 
00206 #define SBBI0_CS2_ENA()
00207 #define SBBI0_CS2_CLR()
00208 #define SBBI0_CS2_SET()
00209 
00210 #endif /* SBBI0_CS2_BIT */
00211 
00212 #ifdef SBBI0_CS3_BIT
00213 
00214 #if (SBBI0_CS3_AVRPORT == AVRPORTB)
00215 #define SBBI0_CS3_SOD_REG PORTB
00216 #define SBBI0_CS3_OE_REG  DDRB
00217 #elif (SBBI0_CS3_AVRPORT == AVRPORTD)
00218 #define SBBI0_CS3_SOD_REG PORTD
00219 #define SBBI0_CS3_OE_REG  DDRD
00220 #elif (SBBI0_CS3_AVRPORT == AVRPORTE)
00221 #define SBBI0_CS3_SOD_REG PORTE
00222 #define SBBI0_CS3_OE_REG  DDRE
00223 #elif (SBBI0_CS3_AVRPORT == AVRPORTF)
00224 #define SBBI0_CS3_SOD_REG PORTF
00225 #define SBBI0_CS3_OE_REG  DDRF
00226 #elif (SBBI0_CS3_AVRPORT == AVRPORTG)
00227 #define SBBI0_CS3_SOD_REG PORTG
00228 #define SBBI0_CS3_OE_REG  DDRG
00229 #elif (SBBI0_CS3_AVRPORT == AVRPORTH)
00230 #define SBBI0_CS3_SOD_REG PORTH
00231 #define SBBI0_CS3_OE_REG  DDRH
00232 #endif
00233 
00235 #define SBBI0_CS3_ENA()      sbi(SBBI0_CS3_OE_REG, SBBI0_CS3_BIT)
00236 
00237 #define SBBI0_CS3_CLR()      cbi(SBBI0_CS3_SOD_REG, SBBI0_CS3_BIT)
00238 
00239 #define SBBI0_CS3_SET()      sbi(SBBI0_CS3_SOD_REG, SBBI0_CS3_BIT)
00240 
00241 #else /* SBBI0_CS3_BIT */
00242 
00243 #define SBBI0_CS3_ENA()
00244 #define SBBI0_CS3_CLR()
00245 #define SBBI0_CS3_SET()
00246 
00247 #endif /* SBBI0_CS3_BIT */
00248 
00249 #ifdef SBBI0_RST0_BIT
00250 
00251 #if (SBBI0_RST0_AVRPORT == AVRPORTB)
00252 #define SBBI0_RST0_SOD_REG PORTB
00253 #define SBBI0_RST0_OE_REG  DDRB
00254 #elif (SBBI0_RST0_AVRPORT == AVRPORTD)
00255 #define SBBI0_RST0_SOD_REG PORTD
00256 #define SBBI0_RST0_OE_REG  DDRD
00257 #elif (SBBI0_RST0_AVRPORT == AVRPORTE)
00258 #define SBBI0_RST0_SOD_REG PORTE
00259 #define SBBI0_RST0_OE_REG  DDRE
00260 #elif (SBBI0_RST0_AVRPORT == AVRPORTF)
00261 #define SBBI0_RST0_SOD_REG PORTF
00262 #define SBBI0_RST0_OE_REG  DDRF
00263 #elif (SBBI0_RST0_AVRPORT == AVRPORTG)
00264 #define SBBI0_RST0_SOD_REG PORTG
00265 #define SBBI0_RST0_OE_REG  DDRG
00266 #elif (SBBI0_RST0_AVRPORT == AVRPORTH)
00267 #define SBBI0_RST0_SOD_REG PORTH
00268 #define SBBI0_RST0_OE_REG  DDRH
00269 #endif
00270 
00272 #define SBBI0_RST0_ENA()      sbi(SBBI0_RST0_OE_REG, SBBI0_RST0_BIT)
00273 
00274 #define SBBI0_RST0_CLR()      cbi(SBBI0_RST0_SOD_REG, SBBI0_RST0_BIT)
00275 
00276 #define SBBI0_RST0_SET()      sbi(SBBI0_RST0_SOD_REG, SBBI0_RST0_BIT)
00277 
00278 #else /* SBBI0_RST0_BIT */
00279 
00280 #define SBBI0_RST0_ENA()
00281 #define SBBI0_RST0_CLR()
00282 #define SBBI0_RST0_SET()
00283 
00284 #endif /* SBBI0_RST0_BIT */
00285 
00286 #ifdef SBBI0_RST1_BIT
00287 
00288 #if (SBBI0_RST1_AVRPORT == AVRPORTB)
00289 #define SBBI0_RST1_SOD_REG PORTB
00290 #define SBBI0_RST1_OE_REG  DDRB
00291 #elif (SBBI0_RST1_AVRPORT == AVRPORTD)
00292 #define SBBI0_RST1_SOD_REG PORTD
00293 #define SBBI0_RST1_OE_REG  DDRD
00294 #elif (SBBI0_RST1_AVRPORT == AVRPORTE)
00295 #define SBBI0_RST1_SOD_REG PORTE
00296 #define SBBI0_RST1_OE_REG  DDRE
00297 #elif (SBBI0_RST1_AVRPORT == AVRPORTF)
00298 #define SBBI0_RST1_SOD_REG PORTF
00299 #define SBBI0_RST1_OE_REG  DDRF
00300 #elif (SBBI0_RST1_AVRPORT == AVRPORTG)
00301 #define SBBI0_RST1_SOD_REG PORTG
00302 #define SBBI0_RST1_OE_REG  DDRG
00303 #elif (SBBI0_RST1_AVRPORT == AVRPORTH)
00304 #define SBBI0_RST1_SOD_REG PORTH
00305 #define SBBI0_RST1_OE_REG  DDRH
00306 #endif
00307 
00309 #define SBBI0_RST1_ENA()      sbi(SBBI0_RST1_OE_REG, SBBI0_RST1_BIT)
00310 
00311 #define SBBI0_RST1_CLR()      cbi(SBBI0_RST1_SOD_REG, SBBI0_RST1_BIT)
00312 
00313 #define SBBI0_RST1_SET()      sbi(SBBI0_RST1_SOD_REG, SBBI0_RST1_BIT)
00314 
00315 #else /* SBBI0_RST1_BIT */
00316 
00317 #define SBBI0_RST1_ENA()
00318 #define SBBI0_RST1_CLR()
00319 #define SBBI0_RST1_SET()
00320 
00321 #endif /* SBBI0_RST1_BIT */
00322 
00323 #ifdef SBBI0_RST2_BIT
00324 
00325 #if (SBBI0_RST2_AVRPORT == AVRPORTB)
00326 #define SBBI0_RST2_SOD_REG PORTB
00327 #define SBBI0_RST2_OE_REG  DDRB
00328 #elif (SBBI0_RST2_AVRPORT == AVRPORTD)
00329 #define SBBI0_RST2_SOD_REG PORTD
00330 #define SBBI0_RST2_OE_REG  DDRD
00331 #elif (SBBI0_RST2_AVRPORT == AVRPORTE)
00332 #define SBBI0_RST2_SOD_REG PORTE
00333 #define SBBI0_RST2_OE_REG  DDRE
00334 #elif (SBBI0_RST2_AVRPORT == AVRPORTF)
00335 #define SBBI0_RST2_SOD_REG PORTF
00336 #define SBBI0_RST2_OE_REG  DDRF
00337 #elif (SBBI0_RST2_AVRPORT == AVRPORTG)
00338 #define SBBI0_RST2_SOD_REG PORTG
00339 #define SBBI0_RST2_OE_REG  DDRG
00340 #elif (SBBI0_RST2_AVRPORT == AVRPORTH)
00341 #define SBBI0_RST2_SOD_REG PORTH
00342 #define SBBI0_RST2_OE_REG  DDRH
00343 #endif
00344 
00346 #define SBBI0_RST2_ENA()      sbi(SBBI0_RST2_OE_REG, SBBI0_RST2_BIT)
00347 
00348 #define SBBI0_RST2_CLR()      cbi(SBBI0_RST2_SOD_REG, SBBI0_RST2_BIT)
00349 
00350 #define SBBI0_RST2_SET()      sbi(SBBI0_RST2_SOD_REG, SBBI0_RST2_BIT)
00351 
00352 #else /* SBBI0_RST2_BIT */
00353 
00354 #define SBBI0_RST2_ENA()
00355 #define SBBI0_RST2_CLR()
00356 #define SBBI0_RST2_SET()
00357 
00358 #endif /* SBBI0_RST2_BIT */
00359 
00360 #ifdef SBBI0_RST3_BIT
00361 
00362 #if (SBBI0_RST3_AVRPORT == AVRPORTB)
00363 #define SBBI0_RST3_SOD_REG PORTB
00364 #define SBBI0_RST3_OE_REG  DDRB
00365 #elif (SBBI0_RST3_AVRPORT == AVRPORTD)
00366 #define SBBI0_RST3_SOD_REG PORTD
00367 #define SBBI0_RST3_OE_REG  DDRD
00368 #elif (SBBI0_RST3_AVRPORT == AVRPORTE)
00369 #define SBBI0_RST3_SOD_REG PORTE
00370 #define SBBI0_RST3_OE_REG  DDRE
00371 #elif (SBBI0_RST3_AVRPORT == AVRPORTF)
00372 #define SBBI0_RST3_SOD_REG PORTF
00373 #define SBBI0_RST3_OE_REG  DDRF
00374 #elif (SBBI0_RST3_AVRPORT == AVRPORTG)
00375 #define SBBI0_RST3_SOD_REG PORTG
00376 #define SBBI0_RST3_OE_REG  DDRG
00377 #elif (SBBI0_RST3_AVRPORT == AVRPORTH)
00378 #define SBBI0_RST3_SOD_REG PORTH
00379 #define SBBI0_RST3_OE_REG  DDRH
00380 #endif
00381 
00383 #define SBBI0_RST3_ENA()      sbi(SBBI0_RST3_OE_REG, SBBI0_RST3_BIT)
00384 
00385 #define SBBI0_RST3_CLR()      cbi(SBBI0_RST3_SOD_REG, SBBI0_RST3_BIT)
00386 
00387 #define SBBI0_RST3_SET()      sbi(SBBI0_RST3_SOD_REG, SBBI0_RST3_BIT)
00388 
00389 #else /* SBBI0_RST3_BIT */
00390 
00391 #define SBBI0_RST3_ENA()
00392 #define SBBI0_RST3_CLR()
00393 #define SBBI0_RST3_SET()
00394 
00395 #endif /* SBBI0_RST3_BIT */
00396 
00397 #ifdef SBBI0_SCK_BIT
00398 
00399 #if (SBBI0_SCK_AVRPORT == AVRPORTB)
00400 #define SBBI0_SCK_SOD_REG PORTB
00401 #define SBBI0_SCK_OE_REG  DDRB
00402 #elif (SBBI0_SCK_AVRPORT == AVRPORTD)
00403 #define SBBI0_SCK_SOD_REG PORTD
00404 #define SBBI0_SCK_OE_REG  DDRD
00405 #elif (SBBI0_SCK_AVRPORT == AVRPORTE)
00406 #define SBBI0_SCK_SOD_REG PORTE
00407 #define SBBI0_SCK_OE_REG  DDRE
00408 #elif (SBBI0_SCK_AVRPORT == AVRPORTF)
00409 #define SBBI0_SCK_SOD_REG PORTF
00410 #define SBBI0_SCK_OE_REG  DDRF
00411 #elif (SBBI0_SCK_AVRPORT == AVRPORTG)
00412 #define SBBI0_SCK_SOD_REG PORTG
00413 #define SBBI0_SCK_OE_REG  DDRG
00414 #elif (SBBI0_SCK_AVRPORT == AVRPORTH)
00415 #define SBBI0_SCK_SOD_REG PORTH
00416 #define SBBI0_SCK_OE_REG  DDRH
00417 #endif
00418 
00420 #define SBBI0_SCK_ENA()      sbi(SBBI0_SCK_OE_REG, SBBI0_SCK_BIT)
00421 
00422 #define SBBI0_SCK_CLR()      cbi(SBBI0_SCK_SOD_REG, SBBI0_SCK_BIT)
00423 
00424 #define SBBI0_SCK_SET()      sbi(SBBI0_SCK_SOD_REG, SBBI0_SCK_BIT)
00425 
00426 #if defined(SBBI0_MOSI_BIT)
00427 
00428 #if (SBBI0_MOSI_AVRPORT == AVRPORTB)
00429 #define SBBI0_MOSI_SOD_REG PORTB
00430 #define SBBI0_MOSI_OE_REG  DDRB
00431 #elif (SBBI0_MOSI_AVRPORT == AVRPORTD)
00432 #define SBBI0_MOSI_SOD_REG PORTD
00433 #define SBBI0_MOSI_OE_REG  DDRD
00434 #elif (SBBI0_MOSI_AVRPORT == AVRPORTE)
00435 #define SBBI0_MOSI_SOD_REG PORTE
00436 #define SBBI0_MOSI_OE_REG  DDRE
00437 #elif (SBBI0_MOSI_AVRPORT == AVRPORTF)
00438 #define SBBI0_MOSI_SOD_REG PORTF
00439 #define SBBI0_MOSI_OE_REG  DDRF
00440 #elif (SBBI0_MOSI_AVRPORT == AVRPORTG)
00441 #define SBBI0_MOSI_SOD_REG PORTG
00442 #define SBBI0_MOSI_OE_REG  DDRG
00443 #elif (SBBI0_MOSI_AVRPORT == AVRPORTH)
00444 #define SBBI0_MOSI_SOD_REG PORTH
00445 #define SBBI0_MOSI_OE_REG  DDRH
00446 #endif
00447 
00449 #define SBBI0_MOSI_ENA()      sbi(SBBI0_MOSI_OE_REG, SBBI0_MOSI_BIT)
00450 
00451 #define SBBI0_MOSI_CLR()      cbi(SBBI0_MOSI_SOD_REG, SBBI0_MOSI_BIT)
00452 
00453 #define SBBI0_MOSI_SET()      sbi(SBBI0_MOSI_SOD_REG, SBBI0_MOSI_BIT)
00454 
00455 #else                           /* SBBI0_MOSI_BIT */
00456 
00457 #define SBBI0_MOSI_ENA()
00458 #define SBBI0_MOSI_CLR()
00459 #define SBBI0_MOSI_SET()
00460 
00461 #endif                          /* SBBI0_MOSI_BIT */
00462 
00463 #if defined(SBBI0_MISO_BIT)
00464 
00465 #if (SBBI0_MISO_AVRPORT == AVRPORTB)
00466 #define SBBI0_MISO_PDS_REG PINB
00467 #define SBBI0_MISO_PUE_REG PORTB
00468 #define SBBI0_MISO_OE_REG  DDRB
00469 #elif (SBBI0_MISO_AVRPORT == AVRPORTD)
00470 #define SBBI0_MISO_PDS_REG PIND
00471 #define SBBI0_MISO_PUE_REG PORTD
00472 #define SBBI0_MISO_OE_REG  DDRD
00473 #elif (SBBI0_MISO_AVRPORT == AVRPORTE)
00474 #define SBBI0_MISO_PDS_REG PINE
00475 #define SBBI0_MISO_PUE_REG PORTE
00476 #define SBBI0_MISO_OE_REG  DDRE
00477 #elif (SBBI0_MISO_AVRPORT == AVRPORTF)
00478 #define SBBI0_MISO_PDS_REG PINF
00479 #define SBBI0_MISO_PUE_REG PORTF
00480 #define SBBI0_MISO_OE_REG  DDRF
00481 #elif (SBBI0_MISO_AVRPORT == AVRPORTG)
00482 #define SBBI0_MISO_PDS_REG PING
00483 #define SBBI0_MISO_PUE_REG PORTG
00484 #define SBBI0_MISO_OE_REG  DDRG
00485 #elif (SBBI0_MISO_AVRPORT == AVRPORTH)
00486 #define SBBI0_MISO_PDS_REG PINH
00487 #define SBBI0_MISO_PUE_REG PORTH
00488 #define SBBI0_MISO_OE_REG  DDRH
00489 #endif
00490 
00492 #define SBBI0_MISO_ENA() \
00493     cbi(SBBI0_MISO_OE_REG, SBBI0_MISO_BIT); \
00494     sbi(SBBI0_MISO_PUE_REG, SBBI0_MISO_BIT)
00495 
00496 #define SBBI0_MISO_TST()    ((inb(SBBI0_MISO_PDS_REG) & _BV(SBBI0_MISO_BIT)) == _BV(SBBI0_MISO_BIT))
00497 
00498 #else                           /* SBBI0_MISO_BIT */
00499 
00500 #define SBBI0_MISO_ENA()
00501 #define SBBI0_MISO_TST()   0
00502 
00503 #endif                          /* SBBI0_MISO_BIT */
00504 
00505 #else                           /* SBBI0_SCK_BIT */
00506 
00507 #define SBBI0_SCK_ENA()
00508 #define SBBI0_SCK_CLR()
00509 #define SBBI0_SCK_SET()
00510 
00511 #define SBBI0_MOSI_ENA()
00512 #define SBBI0_MOSI_CLR()
00513 #define SBBI0_MOSI_SET()
00514 
00515 #define SBBI0_MISO_ENA()
00516 #define SBBI0_MISO_TST()   0
00517 
00518 #endif                          /* SBBI0_SCK_BIT */
00519 
00520 #else                           /* MCU */
00521 /*
00522  * AT91 implementation.
00523  * ======================================
00524  */
00525 
00526 #ifdef SBBI0_CS0_BIT
00527 
00528 #if !defined(SBBI0_CS0_PIO_ID)
00529 #define SBBI0_CS0_PE_REG        PIO_PER
00530 #define SBBI0_CS0_OE_REG        PIO_OER
00531 #define SBBI0_CS0_COD_REG       PIO_CODR
00532 #define SBBI0_CS0_SOD_REG       PIO_SODR
00533 #elif SBBI0_CS0_PIO_ID == PIO_ID
00534 #define SBBI0_CS0_PE_REG        PIO_PER
00535 #define SBBI0_CS0_OE_REG        PIO_OER
00536 #define SBBI0_CS0_COD_REG       PIO_CODR
00537 #define SBBI0_CS0_SOD_REG       PIO_SODR
00538 #elif SBBI0_CS0_PIO_ID == PIOA_ID
00539 #define SBBI0_CS0_PE_REG        PIOA_PER
00540 #define SBBI0_CS0_OE_REG        PIOA_OER
00541 #define SBBI0_CS0_COD_REG       PIOA_CODR
00542 #define SBBI0_CS0_SOD_REG       PIOA_SODR
00543 #elif SBBI0_CS0_PIO_ID == PIOB_ID
00544 #define SBBI0_CS0_PE_REG        PIOB_PER
00545 #define SBBI0_CS0_OE_REG        PIOB_OER
00546 #define SBBI0_CS0_COD_REG       PIOB_CODR
00547 #define SBBI0_CS0_SOD_REG       PIOB_SODR
00548 #elif SBBI0_CS0_PIO_ID == PIOC_ID
00549 #define SBBI0_CS0_PE_REG        PIOC_PER
00550 #define SBBI0_CS0_OE_REG        PIOC_OER
00551 #define SBBI0_CS0_COD_REG       PIOC_CODR
00552 #define SBBI0_CS0_SOD_REG       PIOC_SODR
00553 #endif
00554 
00556 #define SBBI0_CS0_ENA() \
00557     outr(SBBI0_CS0_PE_REG, _BV(SBBI0_CS0_BIT)); \
00558     outr(SBBI0_CS0_OE_REG, _BV(SBBI0_CS0_BIT))
00559 
00560 #define SBBI0_CS0_CLR()   outr(SBBI0_CS0_COD_REG, _BV(SBBI0_CS0_BIT))
00561 
00562 #define SBBI0_CS0_SET()   outr(SBBI0_CS0_SOD_REG, _BV(SBBI0_CS0_BIT))
00563 
00564 #else /* SBBI0_CS0_BIT */
00565 
00566 #define SBBI0_CS0_ENA()
00567 #define SBBI0_CS0_CLR()
00568 #define SBBI0_CS0_SET()
00569 
00570 #endif /* SBBI0_CS0_BIT */
00571 
00572 #ifdef SBBI0_CS1_BIT
00573 
00574 #if !defined(SBBI0_CS1_PIO_ID)
00575 #define SBBI0_CS1_PE_REG        PIO_PER
00576 #define SBBI0_CS1_OE_REG        PIO_OER
00577 #define SBBI0_CS1_COD_REG       PIO_CODR
00578 #define SBBI0_CS1_SOD_REG       PIO_SODR
00579 #elif SBBI0_CS1_PIO_ID == PIO_ID
00580 #define SBBI0_CS1_PE_REG        PIO_PER
00581 #define SBBI0_CS1_OE_REG        PIO_OER
00582 #define SBBI0_CS1_COD_REG       PIO_CODR
00583 #define SBBI0_CS1_SOD_REG       PIO_SODR
00584 #elif SBBI0_CS1_PIO_ID == PIOA_ID
00585 #define SBBI0_CS1_PE_REG        PIOA_PER
00586 #define SBBI0_CS1_OE_REG        PIOA_OER
00587 #define SBBI0_CS1_COD_REG       PIOA_CODR
00588 #define SBBI0_CS1_SOD_REG       PIOA_SODR
00589 #elif SBBI0_CS1_PIO_ID == PIOB_ID
00590 #define SBBI0_CS1_PE_REG        PIOB_PER
00591 #define SBBI0_CS1_OE_REG        PIOB_OER
00592 #define SBBI0_CS1_COD_REG       PIOB_CODR
00593 #define SBBI0_CS1_SOD_REG       PIOB_SODR
00594 #elif SBBI0_CS1_PIO_ID == PIOC_ID
00595 #define SBBI0_CS1_PE_REG        PIOC_PER
00596 #define SBBI0_CS1_OE_REG        PIOC_OER
00597 #define SBBI0_CS1_COD_REG       PIOC_CODR
00598 #define SBBI0_CS1_SOD_REG       PIOC_SODR
00599 #endif
00600 
00602 #define SBBI0_CS1_ENA() \
00603     outr(SBBI0_CS1_PE_REG, _BV(SBBI0_CS1_BIT)); \
00604     outr(SBBI0_CS1_OE_REG, _BV(SBBI0_CS1_BIT))
00605 
00606 #define SBBI0_CS1_CLR()   outr(SBBI0_CS1_COD_REG, _BV(SBBI0_CS1_BIT))
00607 
00608 #define SBBI0_CS1_SET()   outr(SBBI0_CS1_SOD_REG, _BV(SBBI0_CS1_BIT))
00609 
00610 #else /* SBBI0_CS1_BIT */
00611 
00612 #define SBBI0_CS1_ENA()
00613 #define SBBI0_CS1_CLR()
00614 #define SBBI0_CS1_SET()
00615 
00616 #endif /* SBBI0_CS1_BIT */
00617 
00618 #ifdef SBBI0_CS2_BIT
00619 
00620 #if !defined(SBBI0_CS2_PIO_ID)
00621 #define SBBI0_CS2_PE_REG        PIO_PER
00622 #define SBBI0_CS2_OE_REG        PIO_OER
00623 #define SBBI0_CS2_COD_REG       PIO_CODR
00624 #define SBBI0_CS2_SOD_REG       PIO_SODR
00625 #elif SBBI0_CS2_PIO_ID == PIO_ID
00626 #define SBBI0_CS2_PE_REG        PIO_PER
00627 #define SBBI0_CS2_OE_REG        PIO_OER
00628 #define SBBI0_CS2_COD_REG       PIO_CODR
00629 #define SBBI0_CS2_SOD_REG       PIO_SODR
00630 #elif SBBI0_CS2_PIO_ID == PIOA_ID
00631 #define SBBI0_CS2_PE_REG        PIOA_PER
00632 #define SBBI0_CS2_OE_REG        PIOA_OER
00633 #define SBBI0_CS2_COD_REG       PIOA_CODR
00634 #define SBBI0_CS2_SOD_REG       PIOA_SODR
00635 #elif SBBI0_CS2_PIO_ID == PIOB_ID
00636 #define SBBI0_CS2_PE_REG        PIOB_PER
00637 #define SBBI0_CS2_OE_REG        PIOB_OER
00638 #define SBBI0_CS2_COD_REG       PIOB_CODR
00639 #define SBBI0_CS2_SOD_REG       PIOB_SODR
00640 #elif SBBI0_CS2_PIO_ID == PIOC_ID
00641 #define SBBI0_CS2_PE_REG        PIOC_PER
00642 #define SBBI0_CS2_OE_REG        PIOC_OER
00643 #define SBBI0_CS2_COD_REG       PIOC_CODR
00644 #define SBBI0_CS2_SOD_REG       PIOC_SODR
00645 #endif
00646 
00648 #define SBBI0_CS2_ENA() \
00649     outr(SBBI0_CS2_PE_REG, _BV(SBBI0_CS2_BIT)); \
00650     outr(SBBI0_CS2_OE_REG, _BV(SBBI0_CS2_BIT))
00651 
00652 #define SBBI0_CS2_CLR()   outr(SBBI0_CS2_COD_REG, _BV(SBBI0_CS2_BIT))
00653 
00654 #define SBBI0_CS2_SET()   outr(SBBI0_CS2_SOD_REG, _BV(SBBI0_CS2_BIT))
00655 
00656 #else /* SBBI0_CS2_BIT */
00657 
00658 #define SBBI0_CS2_ENA()
00659 #define SBBI0_CS2_CLR()
00660 #define SBBI0_CS2_SET()
00661 
00662 #endif /* SBBI0_CS2_BIT */
00663 
00664 #ifdef SBBI0_CS3_BIT
00665 
00666 #if !defined(SBBI0_CS3_PIO_ID)
00667 #define SBBI0_CS3_PE_REG        PIO_PER
00668 #define SBBI0_CS3_OE_REG        PIO_OER
00669 #define SBBI0_CS3_COD_REG       PIO_CODR
00670 #define SBBI0_CS3_SOD_REG       PIO_SODR
00671 #elif SBBI0_CS3_PIO_ID == PIO_ID
00672 #define SBBI0_CS3_PE_REG        PIO_PER
00673 #define SBBI0_CS3_OE_REG        PIO_OER
00674 #define SBBI0_CS3_COD_REG       PIO_CODR
00675 #define SBBI0_CS3_SOD_REG       PIO_SODR
00676 #elif SBBI0_CS3_PIO_ID == PIOA_ID
00677 #define SBBI0_CS3_PE_REG        PIOA_PER
00678 #define SBBI0_CS3_OE_REG        PIOA_OER
00679 #define SBBI0_CS3_COD_REG       PIOA_CODR
00680 #define SBBI0_CS3_SOD_REG       PIOA_SODR
00681 #elif SBBI0_CS3_PIO_ID == PIOB_ID
00682 #define SBBI0_CS3_PE_REG        PIOB_PER
00683 #define SBBI0_CS3_OE_REG        PIOB_OER
00684 #define SBBI0_CS3_COD_REG       PIOB_CODR
00685 #define SBBI0_CS3_SOD_REG       PIOB_SODR
00686 #elif SBBI0_CS3_PIO_ID == PIOC_ID
00687 #define SBBI0_CS3_PE_REG        PIOC_PER
00688 #define SBBI0_CS3_OE_REG        PIOC_OER
00689 #define SBBI0_CS3_COD_REG       PIOC_CODR
00690 #define SBBI0_CS3_SOD_REG       PIOC_SODR
00691 #endif
00692 
00694 #define SBBI0_CS3_ENA() \
00695     outr(SBBI0_CS3_PE_REG, _BV(SBBI0_CS3_BIT)); \
00696     outr(SBBI0_CS3_OE_REG, _BV(SBBI0_CS3_BIT))
00697 
00698 #define SBBI0_CS3_CLR()   outr(SBBI0_CS3_COD_REG, _BV(SBBI0_CS3_BIT))
00699 
00700 #define SBBI0_CS3_SET()   outr(SBBI0_CS3_SOD_REG, _BV(SBBI0_CS3_BIT))
00701 
00702 #else /* SBBI0_CS3_BIT */
00703 
00704 #define SBBI0_CS3_ENA()
00705 #define SBBI0_CS3_CLR()
00706 #define SBBI0_CS3_SET()
00707 
00708 #endif /* SBBI0_CS3_BIT */
00709 
00710 #ifdef SBBI0_RST0_BIT
00711 
00712 #if !defined(SBBI0_RST0_PIO_ID)
00713 #define SBBI0_RST0_PE_REG      PIO_PER
00714 #define SBBI0_RST0_OE_REG      PIO_OER
00715 #define SBBI0_RST0_COD_REG     PIO_CODR
00716 #define SBBI0_RST0_SOD_REG     PIO_SODR
00717 #elif SBBI0_RST0_PIO_ID == PIO_ID
00718 #define SBBI0_RST0_PE_REG      PIO_PER
00719 #define SBBI0_RST0_OE_REG      PIO_OER
00720 #define SBBI0_RST0_COD_REG     PIO_CODR
00721 #define SBBI0_RST0_SOD_REG     PIO_SODR
00722 #elif SBBI0_RST0_PIO_ID == PIOA_ID
00723 #define SBBI0_RST0_PE_REG      PIOA_PER
00724 #define SBBI0_RST0_OE_REG      PIOA_OER
00725 #define SBBI0_RST0_COD_REG     PIOA_CODR
00726 #define SBBI0_RST0_SOD_REG     PIOA_SODR
00727 #elif SBBI0_RST0_PIO_ID == PIOB_ID
00728 #define SBBI0_RST0_PE_REG      PIOB_PER
00729 #define SBBI0_RST0_OE_REG      PIOB_OER
00730 #define SBBI0_RST0_COD_REG     PIOB_CODR
00731 #define SBBI0_RST0_SOD_REG     PIOB_SODR
00732 #elif SBBI0_RST0_PIO_ID == PIOC_ID
00733 #define SBBI0_RST0_PE_REG      PIOC_PER
00734 #define SBBI0_RST0_OE_REG      PIOC_OER
00735 #define SBBI0_RST0_COD_REG     PIOC_CODR
00736 #define SBBI0_RST0_SOD_REG     PIOC_SODR
00737 #endif
00738 
00740 #define SBBI0_RST0_ENA() \
00741     outr(SBBI0_RST0_PE_REG, _BV(SBBI0_RST0_BIT)); \
00742     outr(SBBI0_RST0_OE_REG, _BV(SBBI0_RST0_BIT))
00743 
00744 #define SBBI0_RST0_CLR()   outr(SBBI0_RST0_COD_REG, _BV(SBBI0_RST0_BIT))
00745 
00746 #define SBBI0_RST0_SET()   outr(SBBI0_RST0_SOD_REG, _BV(SBBI0_RST0_BIT))
00747 
00748 #else /* SBBI0_RST0_BIT */
00749 
00750 #define SBBI0_RST0_ENA()
00751 #define SBBI0_RST0_CLR()
00752 #define SBBI0_RST0_SET()
00753 
00754 #endif /* SBBI0_RST0_BIT */
00755 
00756 #ifdef SBBI0_RST1_BIT
00757 
00758 #if !defined(SBBI0_RST1_PIO_ID)
00759 #define SBBI0_RST1_PE_REG      PIO_PER
00760 #define SBBI0_RST1_OE_REG      PIO_OER
00761 #define SBBI0_RST1_COD_REG     PIO_CODR
00762 #define SBBI0_RST1_SOD_REG     PIO_SODR
00763 #elif SBBI0_RST1_PIO_ID == PIO_ID
00764 #define SBBI0_RST1_PE_REG      PIO_PER
00765 #define SBBI0_RST1_OE_REG      PIO_OER
00766 #define SBBI0_RST1_COD_REG     PIO_CODR
00767 #define SBBI0_RST1_SOD_REG     PIO_SODR
00768 #elif SBBI0_RST1_PIO_ID == PIOA_ID
00769 #define SBBI0_RST1_PE_REG      PIOA_PER
00770 #define SBBI0_RST1_OE_REG      PIOA_OER
00771 #define SBBI0_RST1_COD_REG     PIOA_CODR
00772 #define SBBI0_RST1_SOD_REG     PIOA_SODR
00773 #elif SBBI0_RST1_PIO_ID == PIOB_ID
00774 #define SBBI0_RST1_PE_REG      PIOB_PER
00775 #define SBBI0_RST1_OE_REG      PIOB_OER
00776 #define SBBI0_RST1_COD_REG     PIOB_CODR
00777 #define SBBI0_RST1_SOD_REG     PIOB_SODR
00778 #elif SBBI0_RST1_PIO_ID == PIOC_ID
00779 #define SBBI0_RST1_PE_REG      PIOC_PER
00780 #define SBBI0_RST1_OE_REG      PIOC_OER
00781 #define SBBI0_RST1_COD_REG     PIOC_CODR
00782 #define SBBI0_RST1_SOD_REG     PIOC_SODR
00783 #endif
00784 
00786 #define SBBI0_RST1_ENA() \
00787     outr(SBBI0_RST1_PE_REG, _BV(SBBI0_RST1_BIT)); \
00788     outr(SBBI0_RST1_OE_REG, _BV(SBBI0_RST1_BIT))
00789 
00790 #define SBBI0_RST1_CLR()   outr(SBBI0_RST1_COD_REG, _BV(SBBI0_RST1_BIT))
00791 
00792 #define SBBI0_RST1_SET()   outr(SBBI0_RST1_SOD_REG, _BV(SBBI0_RST1_BIT))
00793 
00794 #else /* SBBI0_RST1_BIT */
00795 
00796 #define SBBI0_RST1_ENA()
00797 #define SBBI0_RST1_CLR()
00798 #define SBBI0_RST1_SET()
00799 
00800 #endif /* SBBI0_RST1_BIT */
00801 
00802 #ifdef SBBI0_RST2_BIT
00803 
00804 #if !defined(SBBI0_RST2_PIO_ID)
00805 #define SBBI0_RST2_PE_REG      PIO_PER
00806 #define SBBI0_RST2_OE_REG      PIO_OER
00807 #define SBBI0_RST2_COD_REG     PIO_CODR
00808 #define SBBI0_RST2_SOD_REG     PIO_SODR
00809 #elif SBBI0_RST2_PIO_ID == PIO_ID
00810 #define SBBI0_RST2_PE_REG      PIO_PER
00811 #define SBBI0_RST2_OE_REG      PIO_OER
00812 #define SBBI0_RST2_COD_REG     PIO_CODR
00813 #define SBBI0_RST2_SOD_REG     PIO_SODR
00814 #elif SBBI0_RST2_PIO_ID == PIOA_ID
00815 #define SBBI0_RST2_PE_REG      PIOA_PER
00816 #define SBBI0_RST2_OE_REG      PIOA_OER
00817 #define SBBI0_RST2_COD_REG     PIOA_CODR
00818 #define SBBI0_RST2_SOD_REG     PIOA_SODR
00819 #elif SBBI0_RST2_PIO_ID == PIOB_ID
00820 #define SBBI0_RST2_PE_REG      PIOB_PER
00821 #define SBBI0_RST2_OE_REG      PIOB_OER
00822 #define SBBI0_RST2_COD_REG     PIOB_CODR
00823 #define SBBI0_RST2_SOD_REG     PIOB_SODR
00824 #elif SBBI0_RST2_PIO_ID == PIOC_ID
00825 #define SBBI0_RST2_PE_REG      PIOC_PER
00826 #define SBBI0_RST2_OE_REG      PIOC_OER
00827 #define SBBI0_RST2_COD_REG     PIOC_CODR
00828 #define SBBI0_RST2_SOD_REG     PIOC_SODR
00829 #endif
00830 
00832 #define SBBI0_RST2_ENA() \
00833     outr(SBBI0_RST2_PE_REG, _BV(SBBI0_RST2_BIT)); \
00834     outr(SBBI0_RST2_OE_REG, _BV(SBBI0_RST2_BIT))
00835 
00836 #define SBBI0_RST2_CLR()   outr(SBBI0_RST2_COD_REG, _BV(SBBI0_RST2_BIT))
00837 
00838 #define SBBI0_RST2_SET()   outr(SBBI0_RST2_SOD_REG, _BV(SBBI0_RST2_BIT))
00839 
00840 #else /* SBBI0_RST2_BIT */
00841 
00842 #define SBBI0_RST2_ENA()
00843 #define SBBI0_RST2_CLR()
00844 #define SBBI0_RST2_SET()
00845 
00846 #endif /* SBBI0_RST2_BIT */
00847 
00848 #ifdef SBBI0_RST3_BIT
00849 
00850 #if !defined(SBBI0_RST3_PIO_ID)
00851 #define SBBI0_RST3_PE_REG      PIO_PER
00852 #define SBBI0_RST3_OE_REG      PIO_OER
00853 #define SBBI0_RST3_COD_REG     PIO_CODR
00854 #define SBBI0_RST3_SOD_REG     PIO_SODR
00855 #elif SBBI0_RST3_PIO_ID == PIO_ID
00856 #define SBBI0_RST3_PE_REG      PIO_PER
00857 #define SBBI0_RST3_OE_REG      PIO_OER
00858 #define SBBI0_RST3_COD_REG     PIO_CODR
00859 #define SBBI0_RST3_SOD_REG     PIO_SODR
00860 #elif SBBI0_RST3_PIO_ID == PIOA_ID
00861 #define SBBI0_RST3_PE_REG      PIOA_PER
00862 #define SBBI0_RST3_OE_REG      PIOA_OER
00863 #define SBBI0_RST3_COD_REG     PIOA_CODR
00864 #define SBBI0_RST3_SOD_REG     PIOA_SODR
00865 #elif SBBI0_RST3_PIO_ID == PIOB_ID
00866 #define SBBI0_RST3_PE_REG      PIOB_PER
00867 #define SBBI0_RST3_OE_REG      PIOB_OER
00868 #define SBBI0_RST3_COD_REG     PIOB_CODR
00869 #define SBBI0_RST3_SOD_REG     PIOB_SODR
00870 #elif SBBI0_RST3_PIO_ID == PIOC_ID
00871 #define SBBI0_RST3_PE_REG      PIOC_PER
00872 #define SBBI0_RST3_OE_REG      PIOC_OER
00873 #define SBBI0_RST3_COD_REG     PIOC_CODR
00874 #define SBBI0_RST3_SOD_REG     PIOC_SODR
00875 #endif
00876 
00878 #define SBBI0_RST3_ENA() \
00879     outr(SBBI0_RST3_PE_REG, _BV(SBBI0_RST3_BIT)); \
00880     outr(SBBI0_RST3_OE_REG, _BV(SBBI0_RST3_BIT))
00881 
00882 #define SBBI0_RST3_CLR()   outr(SBBI0_RST3_COD_REG, _BV(SBBI0_RST3_BIT))
00883 
00884 #define SBBI0_RST3_SET()   outr(SBBI0_RST3_SOD_REG, _BV(SBBI0_RST3_BIT))
00885 
00886 #else /* SBBI0_RST3_BIT */
00887 
00888 #define SBBI0_RST3_ENA()
00889 #define SBBI0_RST3_CLR()
00890 #define SBBI0_RST3_SET()
00891 
00892 #endif /* SBBI0_RST3_BIT */
00893 
00894 #ifdef SBBI0_SCK_BIT
00895 
00896 #if !defined(SBBI0_SCK_PIO_ID)
00897 #define SBBI0_SCK_PE_REG        PIO_PER
00898 #define SBBI0_SCK_OE_REG        PIO_OER
00899 #define SBBI0_SCK_COD_REG       PIO_CODR
00900 #define SBBI0_SCK_SOD_REG       PIO_SODR
00901 #elif SBBI0_SCK_PIO_ID == PIO_ID
00902 #define SBBI0_SCK_PE_REG        PIO_PER
00903 #define SBBI0_SCK_OE_REG        PIO_OER
00904 #define SBBI0_SCK_COD_REG       PIO_CODR
00905 #define SBBI0_SCK_SOD_REG       PIO_SODR
00906 #elif SBBI0_SCK_PIO_ID == PIOA_ID
00907 #define SBBI0_SCK_PE_REG        PIOA_PER
00908 #define SBBI0_SCK_OE_REG        PIOA_OER
00909 #define SBBI0_SCK_COD_REG       PIOA_CODR
00910 #define SBBI0_SCK_SOD_REG       PIOA_SODR
00911 #elif SBBI0_SCK_PIO_ID == PIOB_ID
00912 #define SBBI0_SCK_PE_REG        PIOB_PER
00913 #define SBBI0_SCK_OE_REG        PIOB_OER
00914 #define SBBI0_SCK_COD_REG       PIOB_CODR
00915 #define SBBI0_SCK_SOD_REG       PIOB_SODR
00916 #elif SBBI0_SCK_PIO_ID == PIOC_ID
00917 #define SBBI0_SCK_PE_REG        PIOC_PER
00918 #define SBBI0_SCK_OE_REG        PIOC_OER
00919 #define SBBI0_SCK_COD_REG       PIOC_CODR
00920 #define SBBI0_SCK_SOD_REG       PIOC_SODR
00921 #endif
00922 
00924 #define SBBI0_SCK_ENA() \
00925     outr(SBBI0_SCK_PE_REG, _BV(SBBI0_SCK_BIT)); \
00926     outr(SBBI0_SCK_OE_REG, _BV(SBBI0_SCK_BIT))
00927 
00928 #define SBBI0_SCK_CLR()     outr(SBBI0_SCK_COD_REG, _BV(SBBI0_SCK_BIT))
00929 
00930 #define SBBI0_SCK_SET()     outr(SBBI0_SCK_SOD_REG, _BV(SBBI0_SCK_BIT))
00931 
00932 #ifdef SBBI0_MOSI_BIT
00933 
00934 #if !defined(SBBI0_MOSI_PIO_ID)
00935 #define SBBI0_MOSI_PE_REG       PIO_PER
00936 #define SBBI0_MOSI_OE_REG       PIO_OER
00937 #define SBBI0_MOSI_COD_REG      PIO_CODR
00938 #define SBBI0_MOSI_SOD_REG      PIO_SODR
00939 #elif SBBI0_MOSI_PIO_ID == PIO_ID
00940 #define SBBI0_MOSI_PE_REG       PIO_PER
00941 #define SBBI0_MOSI_OE_REG       PIO_OER
00942 #define SBBI0_MOSI_COD_REG      PIO_CODR
00943 #define SBBI0_MOSI_SOD_REG      PIO_SODR
00944 #elif SBBI0_MOSI_PIO_ID == PIOA_ID
00945 #define SBBI0_MOSI_PE_REG       PIOA_PER
00946 #define SBBI0_MOSI_OE_REG       PIOA_OER
00947 #define SBBI0_MOSI_COD_REG      PIOA_CODR
00948 #define SBBI0_MOSI_SOD_REG      PIOA_SODR
00949 #elif SBBI0_MOSI_PIO_ID == PIOB_ID
00950 #define SBBI0_MOSI_PE_REG       PIOB_PER
00951 #define SBBI0_MOSI_OE_REG       PIOB_OER
00952 #define SBBI0_MOSI_COD_REG      PIOB_CODR
00953 #define SBBI0_MOSI_SOD_REG      PIOB_SODR
00954 #elif SBBI0_MOSI_PIO_ID == PIOC_ID
00955 #define SBBI0_MOSI_PE_REG       PIOC_PER
00956 #define SBBI0_MOSI_OE_REG       PIOC_OER
00957 #define SBBI0_MOSI_COD_REG      PIOC_CODR
00958 #define SBBI0_MOSI_SOD_REG      PIOC_SODR
00959 #endif
00960 
00962 #define SBBI0_MOSI_ENA() \
00963     outr(SBBI0_MOSI_PE_REG, _BV(SBBI0_MOSI_BIT)); \
00964     outr(SBBI0_MOSI_OE_REG, _BV(SBBI0_MOSI_BIT))
00965 
00966 #define SBBI0_MOSI_CLR()    outr(SBBI0_MOSI_COD_REG, _BV(SBBI0_MOSI_BIT))
00967 
00968 #define SBBI0_MOSI_SET()    outr(SBBI0_MOSI_SOD_REG, _BV(SBBI0_MOSI_BIT))
00969 
00970 #else                           /* SBBI0_MOSI_BIT */
00971 
00972 #define SBBI0_MOSI_ENA()
00973 #define SBBI0_MOSI_CLR()
00974 #define SBBI0_MOSI_SET()
00975 
00976 #endif                          /* SBBI0_MOSI_BIT */
00977 
00978 #ifdef SBBI0_MISO_BIT
00979 
00980 #if !defined(SBBI0_MISO_PIO_ID)
00981 #define SBBI0_MISO_PE_REG       PIO_PER
00982 #define SBBI0_MISO_OD_REG       PIO_ODR
00983 #define SBBI0_MISO_PDS_REG      PIO_PDSR
00984 #elif SBBI0_MISO_PIO_ID == PIO_ID
00985 #define SBBI0_MISO_PE_REG       PIO_PER
00986 #define SBBI0_MISO_OD_REG       PIO_ODR
00987 #define SBBI0_MISO_PDS_REG      PIO_PDSR
00988 #elif SBBI0_MISO_PIO_ID == PIOA_ID
00989 #define SBBI0_MISO_PE_REG       PIOA_PER
00990 #define SBBI0_MISO_OD_REG       PIOA_ODR
00991 #define SBBI0_MISO_PDS_REG      PIOA_PDSR
00992 #elif SBBI0_MISO_PIO_ID == PIOB_ID
00993 #define SBBI0_MISO_PE_REG       PIOB_PER
00994 #define SBBI0_MISO_OD_REG       PIOB_ODR
00995 #define SBBI0_MISO_PDS_REG      PIOB_PDSR
00996 #elif SBBI0_MISO_PIO_ID == PIOC_ID
00997 #define SBBI0_MISO_PE_REG       PIOC_PER
00998 #define SBBI0_MISO_OD_REG       PIOC_ODR
00999 #define SBBI0_MISO_PDS_REG      PIOC_PDSR
01000 #endif
01001 
01003 #define SBBI0_MISO_ENA() \
01004     outr(SBBI0_MISO_PE_REG, _BV(SBBI0_MISO_BIT)); \
01005     outr(SBBI0_MISO_OD_REG, _BV(SBBI0_MISO_BIT))
01006 
01007 #define SBBI0_MISO_TST()    ((inr(SBBI0_MISO_PDS_REG) & _BV(SBBI0_MISO_BIT)) == _BV(SBBI0_MISO_BIT))
01008 
01009 #else                           /* SBBI0_MISO_BIT */
01010 
01011 #define SBBI0_MISO_ENA()
01012 #define SBBI0_MISO_TST()   0
01013 
01014 #endif                          /* SBBI0_MISO_BIT */
01015 
01016 #else                           /* SBBI0_SCK_BIT */
01017 
01018 #define SBBI0_SCK_ENA()
01019 #define SBBI0_SCK_CLR()
01020 #define SBBI0_SCK_SET()
01021 
01022 #define SBBI0_MOSI_ENA()
01023 #define SBBI0_MOSI_CLR()
01024 #define SBBI0_MOSI_SET()
01025 
01026 #define SBBI0_MISO_ENA()
01027 #define SBBI0_MISO_TST()   0
01028 
01029 #endif                          /* SBBI0_SCK_BIT */
01030 
01031 #endif                          /* MCU */
01032 
01033 #define SBBI0_INIT() \
01034 { \
01035     SBBI0_SCK_CLR(); \
01036     SBBI0_SCK_ENA(); \
01037     SBBI0_MOSI_CLR(); \
01038     SBBI0_MOSI_ENA(); \
01039     SBBI0_MISO_ENA(); \
01040 }
01041 
01042 __BEGIN_DECLS
01043 /* Function prototypes */
01044 
01045 extern int Sbbi0SetMode(ureg_t ix, ureg_t mode);
01046 extern void Sbbi0SetSpeed(ureg_t ix, u_long rate);
01047 extern void Sbbi0Enable(ureg_t ix);
01048 extern void Sbbi0ChipReset(ureg_t ix, ureg_t hi);
01049 extern void Sbbi0ChipSelect(ureg_t ix, ureg_t hi);
01050 extern void Sbbi0SelectDevice(ureg_t ix);
01051 extern void Sbbi0DeselectDevice(ureg_t ix);
01052 extern void Sbbi0NegSelectDevice(ureg_t ix);
01053 extern void Sbbi0NegDeselectDevice(ureg_t ix);
01054 extern u_char Sbbi0Byte(u_char data);
01055 extern void Sbbi0Transact(CONST void *wdata, void *rdata, size_t len);
01056 
01057 __END_DECLS
01058 /* End of prototypes */
01059 
01060 #endif

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