sbbif1.h

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00001 #ifndef _DEV_SBBIF1_H_
00002 #define _DEV_SBBIF1_H_
00003 /*
00004  * Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  *
00010  * 1. Redistributions of source code must retain the above copyright
00011  *    notice, this list of conditions and the following disclaimer.
00012  * 2. Redistributions in binary form must reproduce the above copyright
00013  *    notice, this list of conditions and the following disclaimer in the
00014  *    documentation and/or other materials provided with the distribution.
00015  * 3. Neither the name of the copyright holders nor the names of
00016  *    contributors may be used to endorse or promote products derived
00017  *    from this software without specific prior written permission.
00018  *
00019  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00020  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00022  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00023  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00024  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00025  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00026  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00027  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00028  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00029  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00030  * SUCH DAMAGE.
00031  *
00032  * For additional information see http://www.ethernut.de/
00033  */
00034 
00052 #include <cfg/arch/gpio.h>
00053 
00057 #ifndef SBBI1_MAX_DEVICES
00058 #define SBBI1_MAX_DEVICES   4
00059 #endif
00060 
00061 #if defined(__AVR__)            /* MCU */
00062 /*
00063  * AVR implementation.
00064  * ======================================
00065  */
00066 
00067 #ifdef SBBI1_SCK_AVRBIT
00068 #define SBBI1_SCK_BIT   SBBI1_SCK_AVRBIT
00069 #endif
00070 #ifdef SBBI1_MOSI_AVRBIT
00071 #define SBBI1_MOSI_BIT  SBBI1_MOSI_AVRBIT
00072 #endif
00073 #ifdef SBBI1_MISO_AVRBIT
00074 #define SBBI1_MISO_BIT  SBBI1_MISO_AVRBIT
00075 #endif
00076 #ifdef SBBI1_CS0_AVRBIT
00077 #define SBBI1_CS0_BIT   SBBI1_CS0_AVRBIT
00078 #endif
00079 #ifdef SBBI1_CS1_AVRBIT
00080 #define SBBI1_CS1_BIT   SBBI1_CS1_AVRBIT
00081 #endif
00082 #ifdef SBBI1_CS2_AVRBIT
00083 #define SBBI1_CS2_BIT   SBBI1_CS2_AVRBIT
00084 #endif
00085 #ifdef SBBI1_CS3_AVRBIT
00086 #define SBBI1_CS3_BIT   SBBI1_CS3_AVRBIT
00087 #endif
00088 #ifdef SBBI1_RST0_AVRBIT
00089 #define SBBI1_RST0_BIT  SBBI1_RST0_AVRBIT
00090 #endif
00091 #ifdef SBBI1_RST1_AVRBIT
00092 #define SBBI1_RST1_BIT  SBBI1_RST1_AVRBIT
00093 #endif
00094 #ifdef SBBI1_RST2_AVRBIT
00095 #define SBBI1_RST2_BIT  SBBI1_RST2_AVRBIT
00096 #endif
00097 #ifdef SBBI1_RST3_AVRBIT
00098 #define SBBI1_RST3_BIT  SBBI1_RST3_AVRBIT
00099 #endif
00100 
00101 #ifdef SBBI1_CS0_BIT
00102 
00103 #if (SBBI1_CS0_AVRPORT == AVRPORTB)
00104 #define SBBI1_CS0_SOD_REG PORTB
00105 #define SBBI1_CS0_OE_REG  DDRB
00106 #elif (SBBI1_CS0_AVRPORT == AVRPORTD)
00107 #define SBBI1_CS0_SOD_REG PORTD
00108 #define SBBI1_CS0_OE_REG  DDRD
00109 #elif (SBBI1_CS0_AVRPORT == AVRPORTE)
00110 #define SBBI1_CS0_SOD_REG PORTE
00111 #define SBBI1_CS0_OE_REG  DDRE
00112 #elif (SBBI1_CS0_AVRPORT == AVRPORTF)
00113 #define SBBI1_CS0_SOD_REG PORTF
00114 #define SBBI1_CS0_OE_REG  DDRF
00115 #elif (SBBI1_CS0_AVRPORT == AVRPORTG)
00116 #define SBBI1_CS0_SOD_REG PORTG
00117 #define SBBI1_CS0_OE_REG  DDRG
00118 #elif (SBBI1_CS0_AVRPORT == AVRPORTH)
00119 #define SBBI1_CS0_SOD_REG PORTH
00120 #define SBBI1_CS0_OE_REG  DDRH
00121 #endif
00122 
00124 #define SBBI1_CS0_ENA()      sbi(SBBI1_CS0_OE_REG, SBBI1_CS0_BIT)
00125 
00126 #define SBBI1_CS0_CLR()      cbi(SBBI1_CS0_SOD_REG, SBBI1_CS0_BIT)
00127 
00128 #define SBBI1_CS0_SET()      sbi(SBBI1_CS0_SOD_REG, SBBI1_CS0_BIT)
00129 
00130 #endif                          /* SBBI1_CS0_BIT */
00131 
00132 #ifdef SBBI1_CS1_BIT
00133 
00134 #if (SBBI1_CS1_AVRPORT == AVRPORTB)
00135 #define SBBI1_CS1_SOD_REG PORTB
00136 #define SBBI1_CS1_OE_REG  DDRB
00137 #elif (SBBI1_CS1_AVRPORT == AVRPORTD)
00138 #define SBBI1_CS1_SOD_REG PORTD
00139 #define SBBI1_CS1_OE_REG  DDRD
00140 #elif (SBBI1_CS1_AVRPORT == AVRPORTE)
00141 #define SBBI1_CS1_SOD_REG PORTE
00142 #define SBBI1_CS1_OE_REG  DDRE
00143 #elif (SBBI1_CS1_AVRPORT == AVRPORTF)
00144 #define SBBI1_CS1_SOD_REG PORTF
00145 #define SBBI1_CS1_OE_REG  DDRF
00146 #elif (SBBI1_CS1_AVRPORT == AVRPORTG)
00147 #define SBBI1_CS1_SOD_REG PORTG
00148 #define SBBI1_CS1_OE_REG  DDRG
00149 #elif (SBBI1_CS1_AVRPORT == AVRPORTH)
00150 #define SBBI1_CS1_SOD_REG PORTH
00151 #define SBBI1_CS1_OE_REG  DDRH
00152 #endif
00153 
00155 #define SBBI1_CS1_ENA()      sbi(SBBI1_CS1_OE_REG, SBBI1_CS1_BIT)
00156 
00157 #define SBBI1_CS1_CLR()      cbi(SBBI1_CS1_SOD_REG, SBBI1_CS1_BIT)
00158 
00159 #define SBBI1_CS1_SET()      sbi(SBBI1_CS1_SOD_REG, SBBI1_CS1_BIT)
00160 
00161 #endif                          /* SBBI1_CS1_BIT */
00162 
00163 #ifdef SBBI1_CS2_BIT
00164 
00165 #if (SBBI1_CS2_AVRPORT == AVRPORTB)
00166 #define SBBI1_CS2_SOD_REG PORTB
00167 #define SBBI1_CS2_OE_REG  DDRB
00168 #elif (SBBI1_CS2_AVRPORT == AVRPORTD)
00169 #define SBBI1_CS2_SOD_REG PORTD
00170 #define SBBI1_CS2_OE_REG  DDRD
00171 #elif (SBBI1_CS2_AVRPORT == AVRPORTE)
00172 #define SBBI1_CS2_SOD_REG PORTE
00173 #define SBBI1_CS2_OE_REG  DDRE
00174 #elif (SBBI1_CS2_AVRPORT == AVRPORTF)
00175 #define SBBI1_CS2_SOD_REG PORTF
00176 #define SBBI1_CS2_OE_REG  DDRF
00177 #elif (SBBI1_CS2_AVRPORT == AVRPORTG)
00178 #define SBBI1_CS2_SOD_REG PORTG
00179 #define SBBI1_CS2_OE_REG  DDRG
00180 #elif (SBBI1_CS2_AVRPORT == AVRPORTH)
00181 #define SBBI1_CS2_SOD_REG PORTH
00182 #define SBBI1_CS2_OE_REG  DDRH
00183 #endif
00184 
00186 #define SBBI1_CS2_ENA()      sbi(SBBI1_CS2_OE_REG, SBBI1_CS2_BIT)
00187 
00188 #define SBBI1_CS2_CLR()      cbi(SBBI1_CS2_SOD_REG, SBBI1_CS2_BIT)
00189 
00190 #define SBBI1_CS2_SET()      sbi(SBBI1_CS2_SOD_REG, SBBI1_CS2_BIT)
00191 
00192 #endif                          /* SBBI1_CS2_BIT */
00193 
00194 #ifdef SBBI1_CS3_BIT
00195 
00196 #if (SBBI1_CS3_AVRPORT == AVRPORTB)
00197 #define SBBI1_CS3_SOD_REG PORTB
00198 #define SBBI1_CS3_OE_REG  DDRB
00199 #elif (SBBI1_CS3_AVRPORT == AVRPORTD)
00200 #define SBBI1_CS3_SOD_REG PORTD
00201 #define SBBI1_CS3_OE_REG  DDRD
00202 #elif (SBBI1_CS3_AVRPORT == AVRPORTE)
00203 #define SBBI1_CS3_SOD_REG PORTE
00204 #define SBBI1_CS3_OE_REG  DDRE
00205 #elif (SBBI1_CS3_AVRPORT == AVRPORTF)
00206 #define SBBI1_CS3_SOD_REG PORTF
00207 #define SBBI1_CS3_OE_REG  DDRF
00208 #elif (SBBI1_CS3_AVRPORT == AVRPORTG)
00209 #define SBBI1_CS3_SOD_REG PORTG
00210 #define SBBI1_CS3_OE_REG  DDRG
00211 #elif (SBBI1_CS3_AVRPORT == AVRPORTH)
00212 #define SBBI1_CS3_SOD_REG PORTH
00213 #define SBBI1_CS3_OE_REG  DDRH
00214 #endif
00215 
00217 #define SBBI1_CS3_ENA()      sbi(SBBI1_CS3_OE_REG, SBBI1_CS3_BIT)
00218 
00219 #define SBBI1_CS3_CLR()      cbi(SBBI1_CS3_SOD_REG, SBBI1_CS3_BIT)
00220 
00221 #define SBBI1_CS3_SET()      sbi(SBBI1_CS3_SOD_REG, SBBI1_CS3_BIT)
00222 
00223 #endif                          /* SBBI1_CS3_BIT */
00224 
00225 #ifdef SBBI1_RST0_BIT
00226 
00227 #if (SBBI1_RST0_AVRPORT == AVRPORTB)
00228 #define SBBI1_RST0_SOD_REG PORTB
00229 #define SBBI1_RST0_OE_REG  DDRB
00230 #elif (SBBI1_RST0_AVRPORT == AVRPORTD)
00231 #define SBBI1_RST0_SOD_REG PORTD
00232 #define SBBI1_RST0_OE_REG  DDRD
00233 #elif (SBBI1_RST0_AVRPORT == AVRPORTE)
00234 #define SBBI1_RST0_SOD_REG PORTE
00235 #define SBBI1_RST0_OE_REG  DDRE
00236 #elif (SBBI1_RST0_AVRPORT == AVRPORTF)
00237 #define SBBI1_RST0_SOD_REG PORTF
00238 #define SBBI1_RST0_OE_REG  DDRF
00239 #elif (SBBI1_RST0_AVRPORT == AVRPORTG)
00240 #define SBBI1_RST0_SOD_REG PORTG
00241 #define SBBI1_RST0_OE_REG  DDRG
00242 #elif (SBBI1_RST0_AVRPORT == AVRPORTH)
00243 #define SBBI1_RST0_SOD_REG PORTH
00244 #define SBBI1_RST0_OE_REG  DDRH
00245 #endif
00246 
00248 #define SBBI1_RST0_ENA()      sbi(SBBI1_RST0_OE_REG, SBBI1_RST0_BIT)
00249 
00250 #define SBBI1_RST0_CLR()      cbi(SBBI1_RST0_SOD_REG, SBBI1_RST0_BIT)
00251 
00252 #define SBBI1_RST0_SET()      sbi(SBBI1_RST0_SOD_REG, SBBI1_RST0_BIT)
00253 
00254 #endif                          /* SBBI1_RST0_BIT */
00255 
00256 #ifdef SBBI1_RST1_BIT
00257 
00258 #if (SBBI1_RST1_AVRPORT == AVRPORTB)
00259 #define SBBI1_RST1_SOD_REG PORTB
00260 #define SBBI1_RST1_OE_REG  DDRB
00261 #elif (SBBI1_RST1_AVRPORT == AVRPORTD)
00262 #define SBBI1_RST1_SOD_REG PORTD
00263 #define SBBI1_RST1_OE_REG  DDRD
00264 #elif (SBBI1_RST1_AVRPORT == AVRPORTE)
00265 #define SBBI1_RST1_SOD_REG PORTE
00266 #define SBBI1_RST1_OE_REG  DDRE
00267 #elif (SBBI1_RST1_AVRPORT == AVRPORTF)
00268 #define SBBI1_RST1_SOD_REG PORTF
00269 #define SBBI1_RST1_OE_REG  DDRF
00270 #elif (SBBI1_RST1_AVRPORT == AVRPORTG)
00271 #define SBBI1_RST1_SOD_REG PORTG
00272 #define SBBI1_RST1_OE_REG  DDRG
00273 #elif (SBBI1_RST1_AVRPORT == AVRPORTH)
00274 #define SBBI1_RST1_SOD_REG PORTH
00275 #define SBBI1_RST1_OE_REG  DDRH
00276 #endif
00277 
00279 #define SBBI1_RST1_ENA()      sbi(SBBI1_RST1_OE_REG, SBBI1_RST1_BIT)
00280 
00281 #define SBBI1_RST1_CLR()      cbi(SBBI1_RST1_SOD_REG, SBBI1_RST1_BIT)
00282 
00283 #define SBBI1_RST1_SET()      sbi(SBBI1_RST1_SOD_REG, SBBI1_RST1_BIT)
00284 
00285 #endif                          /* SBBI1_RST1_BIT */
00286 
00287 #ifdef SBBI1_RST2_BIT
00288 
00289 #if (SBBI1_RST2_AVRPORT == AVRPORTB)
00290 #define SBBI1_RST2_SOD_REG PORTB
00291 #define SBBI1_RST2_OE_REG  DDRB
00292 #elif (SBBI1_RST2_AVRPORT == AVRPORTD)
00293 #define SBBI1_RST2_SOD_REG PORTD
00294 #define SBBI1_RST2_OE_REG  DDRD
00295 #elif (SBBI1_RST2_AVRPORT == AVRPORTE)
00296 #define SBBI1_RST2_SOD_REG PORTE
00297 #define SBBI1_RST2_OE_REG  DDRE
00298 #elif (SBBI1_RST2_AVRPORT == AVRPORTF)
00299 #define SBBI1_RST2_SOD_REG PORTF
00300 #define SBBI1_RST2_OE_REG  DDRF
00301 #elif (SBBI1_RST2_AVRPORT == AVRPORTG)
00302 #define SBBI1_RST2_SOD_REG PORTG
00303 #define SBBI1_RST2_OE_REG  DDRG
00304 #elif (SBBI1_RST2_AVRPORT == AVRPORTH)
00305 #define SBBI1_RST2_SOD_REG PORTH
00306 #define SBBI1_RST2_OE_REG  DDRH
00307 #endif
00308 
00310 #define SBBI1_RST2_ENA()      sbi(SBBI1_RST2_OE_REG, SBBI1_RST2_BIT)
00311 
00312 #define SBBI1_RST2_CLR()      cbi(SBBI1_RST2_SOD_REG, SBBI1_RST2_BIT)
00313 
00314 #define SBBI1_RST2_SET()      sbi(SBBI1_RST2_SOD_REG, SBBI1_RST2_BIT)
00315 
00316 #endif                          /* SBBI1_RST2_BIT */
00317 
00318 #ifdef SBBI1_RST3_BIT
00319 
00320 #if (SBBI1_RST3_AVRPORT == AVRPORTB)
00321 #define SBBI1_RST3_SOD_REG PORTB
00322 #define SBBI1_RST3_OE_REG  DDRB
00323 #elif (SBBI1_RST3_AVRPORT == AVRPORTD)
00324 #define SBBI1_RST3_SOD_REG PORTD
00325 #define SBBI1_RST3_OE_REG  DDRD
00326 #elif (SBBI1_RST3_AVRPORT == AVRPORTE)
00327 #define SBBI1_RST3_SOD_REG PORTE
00328 #define SBBI1_RST3_OE_REG  DDRE
00329 #elif (SBBI1_RST3_AVRPORT == AVRPORTF)
00330 #define SBBI1_RST3_SOD_REG PORTF
00331 #define SBBI1_RST3_OE_REG  DDRF
00332 #elif (SBBI1_RST3_AVRPORT == AVRPORTG)
00333 #define SBBI1_RST3_SOD_REG PORTG
00334 #define SBBI1_RST3_OE_REG  DDRG
00335 #elif (SBBI1_RST3_AVRPORT == AVRPORTH)
00336 #define SBBI1_RST3_SOD_REG PORTH
00337 #define SBBI1_RST3_OE_REG  DDRH
00338 #endif
00339 
00341 #define SBBI1_RST3_ENA()      sbi(SBBI1_RST3_OE_REG, SBBI1_RST3_BIT)
00342 
00343 #define SBBI1_RST3_CLR()      cbi(SBBI1_RST3_SOD_REG, SBBI1_RST3_BIT)
00344 
00345 #define SBBI1_RST3_SET()      sbi(SBBI1_RST3_SOD_REG, SBBI1_RST3_BIT)
00346 
00347 #endif                          /* SBBI1_RST3_BIT */
00348 
00349 #ifdef SBBI1_SCK_BIT
00350 
00351 #if (SBBI1_SCK_AVRPORT == AVRPORTB)
00352 #define SBBI1_SCK_SOD_REG PORTB
00353 #define SBBI1_SCK_OE_REG  DDRB
00354 #elif (SBBI1_SCK_AVRPORT == AVRPORTD)
00355 #define SBBI1_SCK_SOD_REG PORTD
00356 #define SBBI1_SCK_OE_REG  DDRD
00357 #elif (SBBI1_SCK_AVRPORT == AVRPORTE)
00358 #define SBBI1_SCK_SOD_REG PORTE
00359 #define SBBI1_SCK_OE_REG  DDRE
00360 #elif (SBBI1_SCK_AVRPORT == AVRPORTF)
00361 #define SBBI1_SCK_SOD_REG PORTF
00362 #define SBBI1_SCK_OE_REG  DDRF
00363 #elif (SBBI1_SCK_AVRPORT == AVRPORTG)
00364 #define SBBI1_SCK_SOD_REG PORTG
00365 #define SBBI1_SCK_OE_REG  DDRG
00366 #elif (SBBI1_SCK_AVRPORT == AVRPORTH)
00367 #define SBBI1_SCK_SOD_REG PORTH
00368 #define SBBI1_SCK_OE_REG  DDRH
00369 #endif
00370 
00372 #define SBBI1_SCK_ENA()      sbi(SBBI1_SCK_OE_REG, SBBI1_SCK_BIT)
00373 
00374 #define SBBI1_SCK_CLR()      cbi(SBBI1_SCK_SOD_REG, SBBI1_SCK_BIT)
00375 
00376 #define SBBI1_SCK_SET()      sbi(SBBI1_SCK_SOD_REG, SBBI1_SCK_BIT)
00377 
00378 #if defined(SBBI1_MOSI_BIT)
00379 
00380 #if (SBBI1_MOSI_AVRPORT == AVRPORTB)
00381 #define SBBI1_MOSI_SOD_REG PORTB
00382 #define SBBI1_MOSI_OE_REG  DDRB
00383 #elif (SBBI1_MOSI_AVRPORT == AVRPORTD)
00384 #define SBBI1_MOSI_SOD_REG PORTD
00385 #define SBBI1_MOSI_OE_REG  DDRD
00386 #elif (SBBI1_MOSI_AVRPORT == AVRPORTE)
00387 #define SBBI1_MOSI_SOD_REG PORTE
00388 #define SBBI1_MOSI_OE_REG  DDRE
00389 #elif (SBBI1_MOSI_AVRPORT == AVRPORTF)
00390 #define SBBI1_MOSI_SOD_REG PORTF
00391 #define SBBI1_MOSI_OE_REG  DDRF
00392 #elif (SBBI1_MOSI_AVRPORT == AVRPORTG)
00393 #define SBBI1_MOSI_SOD_REG PORTG
00394 #define SBBI1_MOSI_OE_REG  DDRG
00395 #elif (SBBI1_MOSI_AVRPORT == AVRPORTH)
00396 #define SBBI1_MOSI_SOD_REG PORTH
00397 #define SBBI1_MOSI_OE_REG  DDRH
00398 #endif
00399 
00401 #define SBBI1_MOSI_ENA()      sbi(SBBI1_MOSI_OE_REG, SBBI1_MOSI_BIT)
00402 
00403 #define SBBI1_MOSI_CLR()      cbi(SBBI1_MOSI_SOD_REG, SBBI1_MOSI_BIT)
00404 
00405 #define SBBI1_MOSI_SET()      sbi(SBBI1_MOSI_SOD_REG, SBBI1_MOSI_BIT)
00406 
00407 #else                           /* SBBI1_MOSI_BIT */
00408 
00409 #define SBBI1_MOSI_ENA()
00410 #define SBBI1_MOSI_CLR()
00411 #define SBBI1_MOSI_SET()
00412 
00413 #endif                          /* SBBI1_MOSI_BIT */
00414 
00415 #if defined(SBBI1_MISO_BIT)
00416 
00417 #if (SBBI1_MISO_AVRPORT == AVRPORTB)
00418 #define SBBI1_MISO_PDS_REG PINB
00419 #define SBBI1_MISO_PUE_REG PORTB
00420 #define SBBI1_MISO_OE_REG  DDRB
00421 #elif (SBBI1_MISO_AVRPORT == AVRPORTD)
00422 #define SBBI1_MISO_PDS_REG PIND
00423 #define SBBI1_MISO_PUE_REG PORTD
00424 #define SBBI1_MISO_OE_REG  DDRD
00425 #elif (SBBI1_MISO_AVRPORT == AVRPORTE)
00426 #define SBBI1_MISO_PDS_REG PINE
00427 #define SBBI1_MISO_PUE_REG PORTE
00428 #define SBBI1_MISO_OE_REG  DDRE
00429 #elif (SBBI1_MISO_AVRPORT == AVRPORTF)
00430 #define SBBI1_MISO_PDS_REG PINF
00431 #define SBBI1_MISO_PUE_REG PORTF
00432 #define SBBI1_MISO_OE_REG  DDRF
00433 #elif (SBBI1_MISO_AVRPORT == AVRPORTG)
00434 #define SBBI1_MISO_PDS_REG PING
00435 #define SBBI1_MISO_PUE_REG PORTG
00436 #define SBBI1_MISO_OE_REG  DDRG
00437 #elif (SBBI1_MISO_AVRPORT == AVRPORTH)
00438 #define SBBI1_MISO_PDS_REG PINH
00439 #define SBBI1_MISO_PUE_REG PORTH
00440 #define SBBI1_MISO_OE_REG  DDRH
00441 #endif
00442 
00444 #define SBBI1_MISO_ENA() \
00445     cbi(SBBI1_MISO_OE_REG, SBBI1_MISO_BIT); \
00446     sbi(SBBI1_MISO_PUE_REG, SBBI1_MISO_BIT)
00447 
00448 #define SBBI1_MISO_TST()    ((inb(SBBI1_MISO_PDS_REG) & _BV(SBBI1_MISO_BIT)) == _BV(SBBI1_MISO_BIT))
00449 
00450 #else                           /* SBBI1_MISO_BIT */
00451 
00452 #define SBBI1_MISO_ENA()
00453 #define SBBI1_MISO_TST()   0
00454 
00455 #endif                          /* SBBI1_MISO_BIT */
00456 
00457 #endif                          /* SBBI1_SCK_BIT */
00458 
00459 #else                           /* MCU */
00460 /*
00461  * AT91 implementation.
00462  * ======================================
00463  */
00464 
00465 #ifdef SBBI1_CS0_BIT
00466 
00467 #if !defined(SBBI1_CS0_PIO_ID)
00468 #define SBBI1_CS0_PE_REG        PIO_PER
00469 #define SBBI1_CS0_OE_REG        PIO_OER
00470 #define SBBI1_CS0_COD_REG       PIO_CODR
00471 #define SBBI1_CS0_SOD_REG       PIO_SODR
00472 #elif SBBI1_CS0_PIO_ID == PIOA_ID
00473 #define SBBI1_CS0_PE_REG        PIOA_PER
00474 #define SBBI1_CS0_OE_REG        PIOA_OER
00475 #define SBBI1_CS0_COD_REG       PIOA_CODR
00476 #define SBBI1_CS0_SOD_REG       PIOA_SODR
00477 #elif SBBI1_CS0_PIO_ID == PIOB_ID
00478 #define SBBI1_CS0_PE_REG        PIOB_PER
00479 #define SBBI1_CS0_OE_REG        PIOB_OER
00480 #define SBBI1_CS0_COD_REG       PIOB_CODR
00481 #define SBBI1_CS0_SOD_REG       PIOB_SODR
00482 #elif SBBI1_CS0_PIO_ID == PIOC_ID
00483 #define SBBI1_CS0_PE_REG        PIOC_PER
00484 #define SBBI1_CS0_OE_REG        PIOC_OER
00485 #define SBBI1_CS0_COD_REG       PIOC_CODR
00486 #define SBBI1_CS0_SOD_REG       PIOC_SODR
00487 #endif
00488 
00490 #define SBBI1_CS0_ENA() \
00491     outr(SBBI1_CS0_PE_REG, _BV(SBBI1_CS0_BIT)); \
00492     outr(SBBI1_CS0_OE_REG, _BV(SBBI1_CS0_BIT))
00493 
00494 #define SBBI1_CS0_CLR()   outr(SBBI1_CS0_COD_REG, _BV(SBBI1_CS0_BIT))
00495 
00496 #define SBBI1_CS0_SET()   outr(SBBI1_CS0_SOD_REG, _BV(SBBI1_CS0_BIT))
00497 
00498 #endif                          /* SBBI1_CS0_BIT */
00499 
00500 #ifdef SBBI1_CS1_BIT
00501 
00502 #if !defined(SBBI1_CS1_PIO_ID)
00503 #define SBBI1_CS1_PE_REG        PIO_PER
00504 #define SBBI1_CS1_OE_REG        PIO_OER
00505 #define SBBI1_CS1_COD_REG       PIO_CODR
00506 #define SBBI1_CS1_SOD_REG       PIO_SODR
00507 #elif SBBI1_CS1_PIO_ID == PIOA_ID
00508 #define SBBI1_CS1_PE_REG        PIOA_PER
00509 #define SBBI1_CS1_OE_REG        PIOA_OER
00510 #define SBBI1_CS1_COD_REG       PIOA_CODR
00511 #define SBBI1_CS1_SOD_REG       PIOA_SODR
00512 #elif SBBI1_CS1_PIO_ID == PIOB_ID
00513 #define SBBI1_CS1_PE_REG        PIOB_PER
00514 #define SBBI1_CS1_OE_REG        PIOB_OER
00515 #define SBBI1_CS1_COD_REG       PIOB_CODR
00516 #define SBBI1_CS1_SOD_REG       PIOB_SODR
00517 #elif SBBI1_CS1_PIO_ID == PIOC_ID
00518 #define SBBI1_CS1_PE_REG        PIOC_PER
00519 #define SBBI1_CS1_OE_REG        PIOC_OER
00520 #define SBBI1_CS1_COD_REG       PIOC_CODR
00521 #define SBBI1_CS1_SOD_REG       PIOC_SODR
00522 #endif
00523 
00525 #define SBBI1_CS1_ENA() \
00526     outr(SBBI1_CS1_PE_REG, _BV(SBBI1_CS1_BIT)); \
00527     outr(SBBI1_CS1_OE_REG, _BV(SBBI1_CS1_BIT))
00528 
00529 #define SBBI1_CS1_CLR()   outr(SBBI1_CS1_COD_REG, _BV(SBBI1_CS1_BIT))
00530 
00531 #define SBBI1_CS1_SET()   outr(SBBI1_CS1_SOD_REG, _BV(SBBI1_CS1_BIT))
00532 
00533 #endif                          /* SBBI1_CS1_BIT */
00534 
00535 #ifdef SBBI1_CS2_BIT
00536 
00537 #if !defined(SBBI1_CS2_PIO_ID)
00538 #define SBBI1_CS2_PE_REG        PIO_PER
00539 #define SBBI1_CS2_OE_REG        PIO_OER
00540 #define SBBI1_CS2_COD_REG       PIO_CODR
00541 #define SBBI1_CS2_SOD_REG       PIO_SODR
00542 #elif SBBI1_CS2_PIO_ID == PIOA_ID
00543 #define SBBI1_CS2_PE_REG        PIOA_PER
00544 #define SBBI1_CS2_OE_REG        PIOA_OER
00545 #define SBBI1_CS2_COD_REG       PIOA_CODR
00546 #define SBBI1_CS2_SOD_REG       PIOA_SODR
00547 #elif SBBI1_CS2_PIO_ID == PIOB_ID
00548 #define SBBI1_CS2_PE_REG        PIOB_PER
00549 #define SBBI1_CS2_OE_REG        PIOB_OER
00550 #define SBBI1_CS2_COD_REG       PIOB_CODR
00551 #define SBBI1_CS2_SOD_REG       PIOB_SODR
00552 #elif SBBI1_CS2_PIO_ID == PIOC_ID
00553 #define SBBI1_CS2_PE_REG        PIOC_PER
00554 #define SBBI1_CS2_OE_REG        PIOC_OER
00555 #define SBBI1_CS2_COD_REG       PIOC_CODR
00556 #define SBBI1_CS2_SOD_REG       PIOC_SODR
00557 #endif
00558 
00560 #define SBBI1_CS2_ENA() \
00561     outr(SBBI1_CS2_PE_REG, _BV(SBBI1_CS2_BIT)); \
00562     outr(SBBI1_CS2_OE_REG, _BV(SBBI1_CS2_BIT))
00563 
00564 #define SBBI1_CS2_CLR()   outr(SBBI1_CS2_COD_REG, _BV(SBBI1_CS2_BIT))
00565 
00566 #define SBBI1_CS2_SET()   outr(SBBI1_CS2_SOD_REG, _BV(SBBI1_CS2_BIT))
00567 
00568 #endif                          /* SBBI1_CS2_BIT */
00569 
00570 #ifdef SBBI1_CS3_BIT
00571 
00572 #if !defined(SBBI1_CS3_PIO_ID)
00573 #define SBBI1_CS3_PE_REG        PIO_PER
00574 #define SBBI1_CS3_OE_REG        PIO_OER
00575 #define SBBI1_CS3_COD_REG       PIO_CODR
00576 #define SBBI1_CS3_SOD_REG       PIO_SODR
00577 #elif SBBI1_CS3_PIO_ID == PIOA_ID
00578 #define SBBI1_CS3_PE_REG        PIOA_PER
00579 #define SBBI1_CS3_OE_REG        PIOA_OER
00580 #define SBBI1_CS3_COD_REG       PIOA_CODR
00581 #define SBBI1_CS3_SOD_REG       PIOA_SODR
00582 #elif SBBI1_CS3_PIO_ID == PIOB_ID
00583 #define SBBI1_CS3_PE_REG        PIOB_PER
00584 #define SBBI1_CS3_OE_REG        PIOB_OER
00585 #define SBBI1_CS3_COD_REG       PIOB_CODR
00586 #define SBBI1_CS3_SOD_REG       PIOB_SODR
00587 #elif SBBI1_CS3_PIO_ID == PIOC_ID
00588 #define SBBI1_CS3_PE_REG        PIOC_PER
00589 #define SBBI1_CS3_OE_REG        PIOC_OER
00590 #define SBBI1_CS3_COD_REG       PIOC_CODR
00591 #define SBBI1_CS3_SOD_REG       PIOC_SODR
00592 #endif
00593 
00595 #define SBBI1_CS3_ENA() \
00596     outr(SBBI1_CS3_PE_REG, _BV(SBBI1_CS3_BIT)); \
00597     outr(SBBI1_CS3_OE_REG, _BV(SBBI1_CS3_BIT))
00598 
00599 #define SBBI1_CS3_CLR()   outr(SBBI1_CS3_COD_REG, _BV(SBBI1_CS3_BIT))
00600 
00601 #define SBBI1_CS3_SET()   outr(SBBI1_CS3_SOD_REG, _BV(SBBI1_CS3_BIT))
00602 
00603 #endif                          /* SBBI1_CS3_BIT */
00604 
00605 #ifdef SBBI1_RST0_BIT
00606 
00607 #if !defined(SBBI1_RST0_PIO_ID)
00608 #define SBBI1_RST0_PE_REG      PIO_PER
00609 #define SBBI1_RST0_OE_REG      PIO_OER
00610 #define SBBI1_RST0_COD_REG     PIO_CODR
00611 #define SBBI1_RST0_SOD_REG     PIO_SODR
00612 #elif SBBI1_RST0_PIO_ID == PIOA_ID
00613 #define SBBI1_RST0_PE_REG      PIOA_PER
00614 #define SBBI1_RST0_OE_REG      PIOA_OER
00615 #define SBBI1_RST0_COD_REG     PIOA_CODR
00616 #define SBBI1_RST0_SOD_REG     PIOA_SODR
00617 #elif SBBI1_RST0_PIO_ID == PIOB_ID
00618 #define SBBI1_RST0_PE_REG      PIOB_PER
00619 #define SBBI1_RST0_OE_REG      PIOB_OER
00620 #define SBBI1_RST0_COD_REG     PIOB_CODR
00621 #define SBBI1_RST0_SOD_REG     PIOB_SODR
00622 #elif SBBI1_RST0_PIO_ID == PIOC_ID
00623 #define SBBI1_RST0_PE_REG      PIOC_PER
00624 #define SBBI1_RST0_OE_REG      PIOC_OER
00625 #define SBBI1_RST0_COD_REG     PIOC_CODR
00626 #define SBBI1_RST0_SOD_REG     PIOC_SODR
00627 #endif
00628 
00630 #define SBBI1_RST0_ENA() \
00631     outr(SBBI1_RST0_PE_REG, _BV(SBBI1_RST0_BIT)); \
00632     outr(SBBI1_RST0_OE_REG, _BV(SBBI1_RST0_BIT))
00633 
00634 #define SBBI1_RST0_CLR()   outr(SBBI1_RST0_COD_REG, _BV(SBBI1_RST0_BIT))
00635 
00636 #define SBBI1_RST0_SET()   outr(SBBI1_RST0_SOD_REG, _BV(SBBI1_RST0_BIT))
00637 
00638 #endif                          /* SBBI1_RST0_BIT */
00639 
00640 #ifdef SBBI1_RST1_BIT
00641 
00642 #if !defined(SBBI1_RST1_PIO_ID)
00643 #define SBBI1_RST1_PE_REG      PIO_PER
00644 #define SBBI1_RST1_OE_REG      PIO_OER
00645 #define SBBI1_RST1_COD_REG     PIO_CODR
00646 #define SBBI1_RST1_SOD_REG     PIO_SODR
00647 #elif SBBI1_RST1_PIO_ID == PIOA_ID
00648 #define SBBI1_RST1_PE_REG      PIOA_PER
00649 #define SBBI1_RST1_OE_REG      PIOA_OER
00650 #define SBBI1_RST1_COD_REG     PIOA_CODR
00651 #define SBBI1_RST1_SOD_REG     PIOA_SODR
00652 #elif SBBI1_RST1_PIO_ID == PIOB_ID
00653 #define SBBI1_RST1_PE_REG      PIOB_PER
00654 #define SBBI1_RST1_OE_REG      PIOB_OER
00655 #define SBBI1_RST1_COD_REG     PIOB_CODR
00656 #define SBBI1_RST1_SOD_REG     PIOB_SODR
00657 #elif SBBI1_RST1_PIO_ID == PIOC_ID
00658 #define SBBI1_RST1_PE_REG      PIOC_PER
00659 #define SBBI1_RST1_OE_REG      PIOC_OER
00660 #define SBBI1_RST1_COD_REG     PIOC_CODR
00661 #define SBBI1_RST1_SOD_REG     PIOC_SODR
00662 #endif
00663 
00665 #define SBBI1_RST1_ENA() \
00666     outr(SBBI1_RST1_PE_REG, _BV(SBBI1_RST1_BIT)); \
00667     outr(SBBI1_RST1_OE_REG, _BV(SBBI1_RST1_BIT))
00668 
00669 #define SBBI1_RST1_CLR()   outr(SBBI1_RST1_COD_REG, _BV(SBBI1_RST1_BIT))
00670 
00671 #define SBBI1_RST1_SET()   outr(SBBI1_RST1_SOD_REG, _BV(SBBI1_RST1_BIT))
00672 
00673 #endif                          /* SBBI1_RST1_BIT */
00674 
00675 #ifdef SBBI1_RST2_BIT
00676 
00677 #if !defined(SBBI1_RST2_PIO_ID)
00678 #define SBBI1_RST2_PE_REG      PIO_PER
00679 #define SBBI1_RST2_OE_REG      PIO_OER
00680 #define SBBI1_RST2_COD_REG     PIO_CODR
00681 #define SBBI1_RST2_SOD_REG     PIO_SODR
00682 #elif SBBI1_RST2_PIO_ID == PIOA_ID
00683 #define SBBI1_RST2_PE_REG      PIOA_PER
00684 #define SBBI1_RST2_OE_REG      PIOA_OER
00685 #define SBBI1_RST2_COD_REG     PIOA_CODR
00686 #define SBBI1_RST2_SOD_REG     PIOA_SODR
00687 #elif SBBI1_RST2_PIO_ID == PIOB_ID
00688 #define SBBI1_RST2_PE_REG      PIOB_PER
00689 #define SBBI1_RST2_OE_REG      PIOB_OER
00690 #define SBBI1_RST2_COD_REG     PIOB_CODR
00691 #define SBBI1_RST2_SOD_REG     PIOB_SODR
00692 #elif SBBI1_RST2_PIO_ID == PIOC_ID
00693 #define SBBI1_RST2_PE_REG      PIOC_PER
00694 #define SBBI1_RST2_OE_REG      PIOC_OER
00695 #define SBBI1_RST2_COD_REG     PIOC_CODR
00696 #define SBBI1_RST2_SOD_REG     PIOC_SODR
00697 #endif
00698 
00700 #define SBBI1_RST2_ENA() \
00701     outr(SBBI1_RST2_PE_REG, _BV(SBBI1_RST2_BIT)); \
00702     outr(SBBI1_RST2_OE_REG, _BV(SBBI1_RST2_BIT))
00703 
00704 #define SBBI1_RST2_CLR()   outr(SBBI1_RST2_COD_REG, _BV(SBBI1_RST2_BIT))
00705 
00706 #define SBBI1_RST2_SET()   outr(SBBI1_RST2_SOD_REG, _BV(SBBI1_RST2_BIT))
00707 
00708 #endif                          /* SBBI1_RST2_BIT */
00709 
00710 #ifdef SBBI1_RST3_BIT
00711 
00712 #if !defined(SBBI1_RST3_PIO_ID)
00713 #define SBBI1_RST3_PE_REG      PIO_PER
00714 #define SBBI1_RST3_OE_REG      PIO_OER
00715 #define SBBI1_RST3_COD_REG     PIO_CODR
00716 #define SBBI1_RST3_SOD_REG     PIO_SODR
00717 #elif SBBI1_RST3_PIO_ID == PIOA_ID
00718 #define SBBI1_RST3_PE_REG      PIOA_PER
00719 #define SBBI1_RST3_OE_REG      PIOA_OER
00720 #define SBBI1_RST3_COD_REG     PIOA_CODR
00721 #define SBBI1_RST3_SOD_REG     PIOA_SODR
00722 #elif SBBI1_RST3_PIO_ID == PIOB_ID
00723 #define SBBI1_RST3_PE_REG      PIOB_PER
00724 #define SBBI1_RST3_OE_REG      PIOB_OER
00725 #define SBBI1_RST3_COD_REG     PIOB_CODR
00726 #define SBBI1_RST3_SOD_REG     PIOB_SODR
00727 #elif SBBI1_RST3_PIO_ID == PIOC_ID
00728 #define SBBI1_RST3_PE_REG      PIOC_PER
00729 #define SBBI1_RST3_OE_REG      PIOC_OER
00730 #define SBBI1_RST3_COD_REG     PIOC_CODR
00731 #define SBBI1_RST3_SOD_REG     PIOC_SODR
00732 #endif
00733 
00735 #define SBBI1_RST3_ENA() \
00736     outr(SBBI1_RST3_PE_REG, _BV(SBBI1_RST3_BIT)); \
00737     outr(SBBI1_RST3_OE_REG, _BV(SBBI1_RST3_BIT))
00738 
00739 #define SBBI1_RST3_CLR()   outr(SBBI1_RST3_COD_REG, _BV(SBBI1_RST3_BIT))
00740 
00741 #define SBBI1_RST3_SET()   outr(SBBI1_RST3_SOD_REG, _BV(SBBI1_RST3_BIT))
00742 
00743 #endif                          /* SBBI1_RST3_BIT */
00744 
00745 #ifdef SBBI1_SCK_BIT
00746 
00747 #if !defined(SBBI1_SCK_PIO_ID)
00748 #define SBBI1_SCK_PE_REG        PIO_PER
00749 #define SBBI1_SCK_OE_REG        PIO_OER
00750 #define SBBI1_SCK_COD_REG       PIO_CODR
00751 #define SBBI1_SCK_SOD_REG       PIO_SODR
00752 #elif SBBI1_SCK_PIO_ID == PIOA_ID
00753 #define SBBI1_SCK_PE_REG        PIOA_PER
00754 #define SBBI1_SCK_OE_REG        PIOA_OER
00755 #define SBBI1_SCK_COD_REG       PIOA_CODR
00756 #define SBBI1_SCK_SOD_REG       PIOA_SODR
00757 #elif SBBI1_SCK_PIO_ID == PIOB_ID
00758 #define SBBI1_SCK_PE_REG        PIOB_PER
00759 #define SBBI1_SCK_OE_REG        PIOB_OER
00760 #define SBBI1_SCK_COD_REG       PIOB_CODR
00761 #define SBBI1_SCK_SOD_REG       PIOB_SODR
00762 #elif SBBI1_SCK_PIO_ID == PIOC_ID
00763 #define SBBI1_SCK_PE_REG        PIOC_PER
00764 #define SBBI1_SCK_OE_REG        PIOC_OER
00765 #define SBBI1_SCK_COD_REG       PIOC_CODR
00766 #define SBBI1_SCK_SOD_REG       PIOC_SODR
00767 #endif
00768 
00770 #define SBBI1_SCK_ENA() \
00771     outr(SBBI1_SCK_PE_REG, _BV(SBBI1_SCK_BIT)); \
00772     outr(SBBI1_SCK_OE_REG, _BV(SBBI1_SCK_BIT))
00773 
00774 #define SBBI1_SCK_CLR()     outr(SBBI1_SCK_COD_REG, _BV(SBBI1_SCK_BIT))
00775 
00776 #define SBBI1_SCK_SET()     outr(SBBI1_SCK_SOD_REG, _BV(SBBI1_SCK_BIT))
00777 
00778 #ifdef SBBI1_MOSI_BIT
00779 
00780 #if !defined(SBBI1_MOSI_PIO_ID)
00781 #define SBBI1_MOSI_PE_REG       PIO_PER
00782 #define SBBI1_MOSI_OE_REG       PIO_OER
00783 #define SBBI1_MOSI_COD_REG      PIO_CODR
00784 #define SBBI1_MOSI_SOD_REG      PIO_SODR
00785 #elif SBBI1_MOSI_PIO_ID == PIOA_ID
00786 #define SBBI1_MOSI_PE_REG       PIOA_PER
00787 #define SBBI1_MOSI_OE_REG       PIOA_OER
00788 #define SBBI1_MOSI_COD_REG      PIOA_CODR
00789 #define SBBI1_MOSI_SOD_REG      PIOA_SODR
00790 #elif SBBI1_MOSI_PIO_ID == PIOB_ID
00791 #define SBBI1_MOSI_PE_REG       PIOB_PER
00792 #define SBBI1_MOSI_OE_REG       PIOB_OER
00793 #define SBBI1_MOSI_COD_REG      PIOB_CODR
00794 #define SBBI1_MOSI_SOD_REG      PIOB_SODR
00795 #elif SBBI1_MOSI_PIO_ID == PIOC_ID
00796 #define SBBI1_MOSI_PE_REG       PIOC_PER
00797 #define SBBI1_MOSI_OE_REG       PIOC_OER
00798 #define SBBI1_MOSI_COD_REG      PIOC_CODR
00799 #define SBBI1_MOSI_SOD_REG      PIOC_SODR
00800 #endif
00801 
00803 #define SBBI1_MOSI_ENA() \
00804     outr(SBBI1_MOSI_PE_REG, _BV(SBBI1_MOSI_BIT)); \
00805     outr(SBBI1_MOSI_OE_REG, _BV(SBBI1_MOSI_BIT))
00806 
00807 #define SBBI1_MOSI_CLR()    outr(SBBI1_MOSI_COD_REG, _BV(SBBI1_MOSI_BIT))
00808 
00809 #define SBBI1_MOSI_SET()    outr(SBBI1_MOSI_SOD_REG, _BV(SBBI1_MOSI_BIT))
00810 
00811 #else                           /* SBBI1_MOSI_BIT */
00812 
00813 #define SBBI1_MOSI_ENA()
00814 #define SBBI1_MOSI_CLR()
00815 #define SBBI1_MOSI_SET()
00816 
00817 #endif                          /* SBBI1_MOSI_BIT */
00818 
00819 #ifdef SBBI1_MISO_BIT
00820 
00821 #if !defined(SBBI1_MISO_PIO_ID)
00822 #define SBBI1_MISO_PE_REG       PIO_PER
00823 #define SBBI1_MISO_OD_REG       PIO_ODR
00824 #define SBBI1_MISO_PDS_REG      PIO_PDSR
00825 #elif SBBI1_MISO_PIO_ID == PIOA_ID
00826 #define SBBI1_MISO_PE_REG       PIOA_PER
00827 #define SBBI1_MISO_OD_REG       PIOA_ODR
00828 #define SBBI1_MISO_PDS_REG      PIOA_PDSR
00829 #elif SBBI1_MISO_PIO_ID == PIOB_ID
00830 #define SBBI1_MISO_PE_REG       PIOB_PER
00831 #define SBBI1_MISO_OD_REG       PIOB_ODR
00832 #define SBBI1_MISO_PDS_REG      PIOB_PDSR
00833 #elif SBBI1_MISO_PIO_ID == PIOC_ID
00834 #define SBBI1_MISO_PE_REG       PIOC_PER
00835 #define SBBI1_MISO_OD_REG       PIOC_ODR
00836 #define SBBI1_MISO_PDS_REG      PIOC_PDSR
00837 #endif
00838 
00840 #define SBBI1_MISO_ENA() \
00841     outr(SBBI1_MISO_PE_REG, _BV(SBBI1_MISO_BIT)); \
00842     outr(SBBI1_MISO_OD_REG, _BV(SBBI1_MISO_BIT))
00843 
00844 #define SBBI1_MISO_TST()    ((inr(SBBI1_MISO_PDS_REG) & _BV(SBBI1_MISO_BIT)) == _BV(SBBI1_MISO_BIT))
00845 
00846 #else                           /* SBBI1_MISO_BIT */
00847 
00848 #define SBBI1_MISO_ENA()
00849 #define SBBI1_MISO_TST()   0
00850 
00851 #endif                          /* SBBI1_MISO_BIT */
00852 
00853 #endif                          /* SBBI1_SCK_BIT */
00854 
00855 #endif                          /* MCU */
00856 
00857 #define SBBI1_INIT() \
00858 { \
00859     SBBI1_SCK_CLR(); \
00860     SBBI1_SCK_ENA(); \
00861     SBBI1_MOSI_CLR(); \
00862     SBBI1_MOSI_ENA(); \
00863     SBBI1_MISO_ENA(); \
00864 }
00865 
00866 #endif

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