00001 #ifndef _ARCH_ARM_SAM9260_H_
00002 #define _ARCH_ARM_SAM9260_H_
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00067 #define FLASH_BASE 0x100000UL
00068 #define RAM_BASE 0x200000UL
00069
00070 #define TC_BASE 0xFFFA0000
00071 #define UDP_BASE 0xFFFA4000
00072 #define MCI_BASE 0xFFFA8000
00073 #define TWI_BASE 0xFFFAC000
00074 #define USART0_BASE 0xFFFB0000
00075 #define USART1_BASE 0xFFFB4000
00076 #define USART2_BASE 0xFFFB8000
00077 #define SSC_BASE 0xFFFBC000
00078 #define ISI_BASE 0xFFFC0000
00079 #define EMAC_BASE 0xFFFC4000
00080 #define SPI0_BASE 0xFFFC8000
00081 #define SPI1_BASE 0xFFFCC000
00082 #define USART3_BASE 0xFFFD0000
00083 #define USART4_BASE 0xFFFD4000
00084 #define USART5_BASE 0xFFFD8000
00085 #define TC345_BASE 0xFFFDC000
00086 #define ADC_BASE 0xFFFE0000
00087 #define ECC_BASE 0xFFFFE800
00088 #define SDRAMC_BASE 0xFFFFEA00
00089 #define SMC_BASE 0xFFFFEC00
00090 #define MATRIX_BASE 0xFFFFEE00
00091 #define CCFG_BASE 0xFFFFEF10
00092 #define AIC_BASE 0xFFFFF000
00093 #define DBGU_BASE 0xFFFFF200
00094 #define PIOA_BASE 0xFFFFF400
00095 #define PIOB_BASE 0xFFFFF600
00096 #define PIOC_BASE 0xFFFFF800
00097 #define PMC_BASE 0xFFFFFC00
00098 #define RSTC_BASE 0xFFFFFD00
00099 #define RTT_BASE 0xFFFFFD20
00100 #define PIT_BASE 0xFFFFFD30
00101 #define WDT_BASE 0xFFFFFD40
00103 #define PERIPH_RPR_OFF 0x00000100
00104 #define PERIPH_RCR_OFF 0x00000104
00105 #define PERIPH_TPR_OFF 0x00000108
00106 #define PERIPH_TCR_OFF 0x0000010C
00107 #define PERIPH_RNPR_OFF 0x00000110
00108 #define PERIPH_RNCR_OFF 0x00000114
00109 #define PERIPH_TNPR_OFF 0x00000118
00110 #define PERIPH_TNCR_OFF 0x0000011C
00111 #define PERIPH_PTCR_OFF 0x00000120
00112 #define PERIPH_PTSR_OFF 0x00000124
00114 #define PDC_RXTEN 0x00000001
00115 #define PDC_RXTDIS 0x00000002
00116 #define PDC_TXTEN 0x00000100
00117 #define PDC_TXTDIS 0x00000200
00119 #define DBGU_HAS_PDC
00120 #define SPI_HAS_PDC
00121 #define SSC_HAS_PDC
00122 #define USART_HAS_PDC
00123 #define MCI_HAS_PDC
00124
00125 #define PIO_HAS_MULTIDRIVER
00126 #define PIO_HAS_PULLUP
00127 #define PIO_HAS_PERIPHERALSELECT
00128 #define PIO_HAS_OUTPUTWRITEENABLE
00129
00130 #include <arch/arm/at91_tc.h>
00131 #include <arch/arm/at91_us.h>
00132 #include <arch/arm/at91_dbgu.h>
00133 #include <arch/arm/at91_emac.h>
00134 #include <arch/arm/at91_spi.h>
00135 #include <arch/arm/at91_aic.h>
00136 #include <arch/arm/at91_pio.h>
00137 #include <arch/arm/at91_pmc.h>
00138 #include <arch/arm/at91_rstc.h>
00139 #include <arch/arm/at91_wdt.h>
00140 #include <arch/arm/at91_ssc.h>
00141 #include <arch/arm/at91_twi.h>
00142 #include <arch/arm/at91_smc.h>
00143 #include <arch/arm/at91_mci.h>
00144 #include <arch/arm/at91_matrix.h>
00145 #include <arch/arm/at91_ccfg.h>
00146 #include <arch/arm/at91_sdramc.h>
00147 #include <arch/arm/at91_adc.h>
00148
00151
00154 #define FIQ_ID 0
00155 #define PIOA_ID 2
00156 #define PIOB_ID 3
00157 #define PIOC_ID 4
00158 #define ADC_ID 5
00159 #define US0_ID 6
00160 #define US1_ID 7
00161 #define US2_ID 8
00162 #define MCI_ID 9
00163 #define UDP_ID 10
00164 #define TWI_ID 11
00165 #define SPI0_ID 12
00166 #define SPI1_ID 13
00167 #define SSC_ID 14
00168 #define TC0_ID 17
00169 #define TC1_ID 18
00170 #define TC2_ID 19
00171 #define UHP_ID 20
00172 #define EMAC_ID 21
00173 #define ISI_ID 22
00174 #define US3_ID 23
00175 #define US4_ID 24
00176 #define US5_ID 25
00177 #define TC3_ID 26
00178 #define TC4_ID 27
00179 #define TC5_ID 28
00180 #define IRQ0_ID 29
00181 #define IRQ1_ID 30
00182 #define IRQ2_ID 31
00185
00186
00188 #define PA31_SCK0_A 31
00189 #define PB4_TXD0_A 4
00190 #define PB5_RXD0_A 5
00191 #define PB27_CTS0_A 27
00192 #define PB26_RTS0_A 26
00193 #define PB25_RI0_A 25
00194 #define PB22_DSR0_A 22
00195 #define PB23_DCD0_A 23
00196 #define PB24_DTR0_A 24
00198 #define PA29_SCK1_A 29
00199 #define PB6_TXD1_A 6
00200 #define PB7_RXD1_A 7
00201 #define PB29_CTS1_A 29
00202 #define PB28_RTS1_A 28
00204 #define PA30_SCK2_A 30
00205 #define PB8_TXD2_A 8
00206 #define PB9_RXD2_A 9
00207 #define PA5_CTS2_A 5
00208 #define PA4_RTS2_A 4
00210 #define PC0_SCK3_B 0
00211 #define PB10_TXD3_A 10
00212 #define PB11_RXD3_A 11
00213 #define PC10_CTS3_B 10
00214 #define PC8_RTS3_B 8
00216 #define PA31_TXD4_B 31
00217 #define PA30_RXD4_B 30
00219 #define PB12_TXD5_A 12
00220 #define PB13_RXD5_A 13
00222
00223
00225 #define PA0_SPI0_MISO_A 0
00226 #define PA1_SPI0_MOSI_A 1
00227 #define PA2_SPI0_SPCK_A 2
00228 #define PA3_SPI0_NPCS0_A 3
00229 #define PC11_SPI0_NPCS1_B 11
00230 #define PC16_SPI0_NPCS2_B 16
00231 #define PC17_SPI0_NPCS3_B 17
00233 #define SPI0_PINS _BV(PA0_SPI0_MISO_A) | _BV(PA1_SPI0_MOSI_A) | _BV(PA2_SPI0_SPCK_A)
00234 #define SPI0_PIO_BASE PIOA_BASE
00235 #define SPI0_PSR_OFF PIO_ASR_OFF
00236
00237 #define SPI0_CS0_PIN _BV(PA3_SPI0_NPCS0_A)
00238 #define SPI0_CS0_PIO_BASE PIOA_BASE
00239 #define SPI0_CS0_PSR_OFF PIO_ASR_OFF
00240
00241 #define SPI0_CS1_PIN _BV(PC11_SPI0_NPCS1_B)
00242 #define SPI0_CS1_PIO_BASE PIOC_BASE
00243 #define SPI0_CS1_PSR_OFF PIO_BSR_OFF
00244
00245 #define PB0_SPI1_MISO_A 0
00246 #define PB1_SPI1_MOSI_A 1
00247 #define PB2_SPI1_SPCK_A 2
00248 #define PB3_SPI1_NPCS0_A 3
00249 #define PC5_SPI1_NPCS1_B 5
00250 #define PC18_SPI1_NPCS1_B 18
00251 #define PC4_SPI1_NPCS2_B 4
00252 #define PC19_SPI1_NPCS2_B 19
00253 #define PC3_SPI1_NPCS3_B 3
00254 #define PC20_SPI1_NPCS3_B 20
00256 #define SPI1_PINS _BV(PB0_SPI1_MISO_A) | _BV(PB1_SPI1_MOSI_A) | _BV(PB2_SPI1_SPCK_A)
00257 #define SPI1_PIO_BASE PIOB_BASE
00258 #define SPI1_PSR_OFF PIO_ASR_OFF
00259
00260 #define SPI1_CS0_PIN _BV(PB3_SPI1_NPCS0_A)
00261 #define SPI1_CS0_PIO_BASE PIOB_BASE
00262 #define SPI1_CS0_PSR_OFF PIO_ASR_OFF
00263
00264 #ifndef SPI1_CS3_PIN
00265 #define SPI1_CS3_PIN _BV(PC3_SPI1_NPCS3_B)
00266 #define SPI1_CS3_PIO_BASE PIOC_BASE
00267 #define SPI1_CS3_PSR_OFF PIO_BSR_OFF
00268 #endif
00269
00274 #define PB20_ISI_D0_B 20
00275 #define PB21_ISI_D1_B 21
00276 #define PB22_ISI_D2_B 22
00277 #define PB23_ISI_D3_B 23
00278 #define PB24_ISI_D4_B 24
00279 #define PB25_ISI_D5_B 25
00280 #define PB26_ISI_D6_B 26
00281 #define PB27_ISI_D7_B 27
00282 #define PB10_ISI_D8_B 10
00283 #define PB11_ISI_D9_B 11
00284 #define PB12_ISI_D10_B 12
00285 #define PB13_ISI_D11_B 13
00286 #define PB28_ISI_PCK_B 28
00287 #define PB29_ISI_VSYNC_B 29
00288 #define PB30_ISI_HSYNC_B 30
00289 #define PB31_ISI_MCK_B 31
00291
00292
00294 #define PA8_MCCK_A 8
00295 #define PA7_MCCDA_A 7
00296 #define PA6_MCDA0_A 6
00297 #define PA9_MCDA1_A 9
00298 #define PA10_MCDA2_A 10
00299 #define PA11_MCDA3_A 11
00300 #define PA1_MCCDB_B 1
00301 #define PA0_MCDB0_B 0
00302 #define PA5_MCDB1_B 5
00303 #define PA4_MCDB2_B 4
00304 #define PA3_MCDB3_B 3
00306
00307
00309 #define PA10_ETX2_B 10
00310 #define PA11_ETX3_B 11
00311 #define PA12_ETX0_A 12
00312 #define PA13_ETX1_A 13
00313 #define PA14_ERX0_A 14
00314 #define PA15_ERX1_A 15
00315 #define PA16_ETXEN_A 16
00316 #define PA17_ERXDV_A 17
00317 #define PA18_ERXER_A 18
00318 #define PA19_ETXCK_A 19
00319 #define PA20_EMDC_A 20
00320 #define PA21_EMDIO_A 21
00321 #define PA22_ETXER_B 22
00322 #define PA23_ETX2_B 23
00323 #define PA24_ETX3_B 24
00324 #define PA25_ERX2_B 25
00325 #define PA26_ERX3_B 26
00326 #define PA27_ERXCK_B 27
00327 #define PA28_ECRS_B 28
00328 #define PA29_ECOL_B 29
00329 #define PC21_EF100_B 21
00331
00332
00334 #define PA22_ADTRG_A 22
00336
00337
00339 #define PB14_DRXD_A 14
00340 #define PB15_DTXD_A 15
00342
00343
00345 #define PB18_TD0_A 18
00346 #define PB19_RD0_A 19
00347 #define PB16_TK0_A 16
00348 #define PB20_RK0_A 20
00349 #define PB17_TF0_A 17
00350 #define PB21_RF0_A 21
00352
00353
00355 #define PA23_TWD_A 23
00356 #define PA24_TWCK_A 24
00358
00359
00361 #define PA25_TCLK0_A 25
00362 #define PA26_TIOA0_A 26
00363 #define PC9_TIOB0_B 9
00365 #define PB6_TCLK1_B 6
00366 #define PA27_TIOA1_A 27
00367 #define PC7_TIOB1_A 7
00369 #define PB7_TCLK2_B 7
00370 #define PA28_TIOA2_A 28
00371 #define PC6_TIOB2_A 6
00373 #define PB16_TCLK3_B 16
00374 #define PB0_TIOA3_B 0
00375 #define PB1_TIOB3_B 1
00377 #define PB17_TCLK4_B 17
00378 #define PB2_TIOA4_B 2
00379 #define PB18_TIOB4_B 18
00381 #define PC22_TCLK5_B 22
00382 #define PB3_TIOA5_B 3
00383 #define PB19_TIOB5_B 19
00385
00386
00388 #define PB30_PCK0_A 30
00389 #define PC1_PCK0_B 1
00390 #define PB31_PCK1_A 31
00391 #define PC2_PCK1_B 2
00393
00394
00396 #define PC10_A25_CFRNW_A 10
00397 #define PC8_NCS4_CFCS0_A 8
00398 #define PC9_NCS5_CFCS1_A 9
00399 #define PC6_CFCE1_B 6
00400 #define PC7_CFCE2_B 7
00402
00403
00405 #define PC16_D16_A 16
00406 #define PC17_D17_A 17
00407 #define PC18_D18_A 18
00408 #define PC19_D19_A 19
00409 #define PC20_D20_A 20
00410 #define PC21_D21_A 21
00411 #define PC22_D22_A 22
00412 #define PC23_D23_A 23
00413 #define PC24_D24_A 24
00414 #define PC25_D25_A 25
00415 #define PC26_D26_A 26
00416 #define PC27_D27_A 27
00417 #define PC28_D28_A 28
00418 #define PC29_D29_A 29
00419 #define PC30_D30_A 30
00420 #define PC31_D31_A 31
00421 #define PC4_A23_A 4
00422 #define PC5_A24_A 5
00423 #define PC11_NCS2_A 11
00424 #define PC14_NCS3_NANDCS_A 14
00425 #define PC13_NCS6_B 13
00426 #define PC12_NCS7_B 12
00427 #define PC15_NWAIT_A 15
00429
00430
00432 #define PC13_FIQ_A 13
00433 #define PC12_IRQ0_A 12
00434 #define PC15_IRQ1_B 15
00435 #define PC14_IRQ2_B 14
00437
00438
00440 #endif