The start of this structure is equal to the UARTDCB structure.
Definition at line 79 of file ahdlc.h.
Data Fields | |
u_long | dcb_modeflags |
Mode flags. | |
u_long | dcb_statusflags |
Status flags. | |
u_long | dcb_rtimeout |
Read timeout. | |
u_long | dcb_wtimeout |
Write timeout. | |
HANDLE | dcb_tx_rdy |
Queue of threads waiting for output buffer empty. | |
HANDLE | dcb_rx_rdy |
Queue of threads waiting for a character in the input buffer. | |
u_char | dcb_base |
Hardware base address. | |
volatile u_char * | dcb_rx_buf |
Input buffer. | |
volatile u_char | dcb_rx_idx |
Input buffer index for next incoming byte. | |
u_char | dcb_rd_idx |
Input buffer index for next byte to read. | |
u_char * | dcb_tx_buf |
Output buffer. | |
volatile u_char | dcb_tx_idx |
Output buffer index for next outgoing byte. | |
u_char | dcb_wr_idx |
Output buffer index for next byte to write. | |
HANDLE | dcb_mf_evt |
HDLC mode change event queue. | |
u_long | dcb_rx_accm |
32-bit receive ACCM. | |
u_long | dcb_tx_accm |
256-bit transmit ACCM. | |
u_short | dcb_rx_mru |
Maximum receive MRU. | |
u_short | dcb_tx_mru |
Maximum transmit MRU. |
Mode flags.
Definition at line 83 of file ahdlc.h.
Referenced by AhdlcAt91IOCtl(), AhdlcAvrIOCtl(), AhdlcOutput(), and AhdlcRx().
Read timeout.
Definition at line 91 of file ahdlc.h.
Referenced by AhdlcAt91IOCtl(), AhdlcAt91Read(), AhdlcAvrIOCtl(), AhdlcAvrRead(), and AhdlcRx().
Write timeout.
Definition at line 95 of file ahdlc.h.
Referenced by AhdlcAt91IOCtl(), and AhdlcAvrIOCtl().
Queue of threads waiting for a character in the input buffer.
Threads are added to this queue when the output buffer is empty.
Definition at line 109 of file ahdlc.h.
Referenced by AhdlcAt91IOCtl(), AhdlcAt91Read(), AhdlcAvrIOCtl(), AhdlcAvrRead(), and AhdlcRx().
Hardware base address.
This is a copy of the base address in the NUTDEVICE structure and required by the interrupt routine.
Definition at line 116 of file ahdlc.h.
Referenced by AhdlcAt91Init(), AhdlcAt91IOCtl(), and AhdlcAvrInit().
volatile u_char* _AHDLCDCB::dcb_rx_buf |
Input buffer.
This buffer is filled by the the receiver interrupt, so the contents of the buffer is volatile.
Definition at line 123 of file ahdlc.h.
Referenced by AhdlcAt91Init(), AhdlcAt91Read(), AhdlcAvrInit(), AhdlcAvrRead(), and AhdlcRx().
volatile u_char _AHDLCDCB::dcb_rx_idx |
Input buffer index for next incoming byte.
This volatile index is incremented by the receiver interrupt.
Definition at line 129 of file ahdlc.h.
Referenced by AhdlcAt91Read(), AhdlcAvrRead(), and AhdlcRx().
Input buffer index for next byte to read.
Definition at line 133 of file ahdlc.h.
Referenced by AhdlcAt91Read(), AhdlcAvrRead(), and AhdlcRx().
Output buffer.
Definition at line 137 of file ahdlc.h.
Referenced by AhdlcAt91Init(), and AhdlcAvrInit().
volatile u_char _AHDLCDCB::dcb_tx_idx |
HDLC mode change event queue.
The frame receiver thread is waiting on this queue until the device is switched to HDLC mode.
Definition at line 154 of file ahdlc.h.
Referenced by AhdlcAt91IOCtl(), AhdlcAvrIOCtl(), and AhdlcRx().
256-bit transmit ACCM.
Definition at line 162 of file ahdlc.h.
Referenced by AhdlcAt91Init(), and AhdlcAvrInit().
Maximum receive MRU.
Definition at line 166 of file ahdlc.h.
Referenced by AhdlcAt91Init(), AhdlcAvrInit(), and AhdlcRx().
Maximum transmit MRU.
Definition at line 170 of file ahdlc.h.
Referenced by AhdlcAt91Init(), AhdlcAvrInit(), and AhdlcOutput().