00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00090 #include <cfg/os.h>
00091 #include <cfg/clock.h>
00092
00093 #include <dev/debug.h>
00094 #include <sys/device.h>
00095 #include <sys/file.h>
00096 #include <sys/timer.h>
00097
00098 #define static
00099
00104
00105 #if defined(DBGU_BASE)
00106 static NUTFILE dbgfile;
00107 #else
00108 static NUTFILE dbgfile0;
00109 static NUTFILE dbgfile1;
00110 #endif
00111
00112 #if defined(DBGU_BASE)
00113
00120 static int DebugIOCtl(NUTDEVICE * dev, int req, void *conf)
00121 {
00122 if(req == UART_SETSPEED) {
00123 #if defined(AT91_PLL_MAINCK)
00124 outr(DBGU_BRGR, (At91GetMasterClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00125 #else
00126 outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00127 #endif
00128 return 0;
00129 }
00130 return -1;
00131 }
00132
00138 static int DebugInit(NUTDEVICE * dev)
00139 {
00140 #if defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00141
00142 #if defined (MCU_AT91SAM7X256)
00143 outr(PIOA_PDR, _BV(27) | _BV(28));
00144 #elif defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00145 outr(PIOA_PDR, _BV(PA9_DRXD_A) | _BV(PA10_DTXD_A));
00146 #endif
00147
00148 outr(DBGU_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00149
00150 outr(DBGU_IDR, 0xFFFFFFFF);
00151
00152 outr(DBGU_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00153
00154 outr(DBGU_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00155
00156 outr(DBGU_CR, US_RXEN | US_TXEN);
00157 #endif
00158
00159 return 0;
00160 }
00161
00162 #else
00163
00171 static int Debug0IOCtl(NUTDEVICE * dev, int req, void *conf)
00172 {
00173 if(req == UART_SETSPEED) {
00174 outr(US0_BRGR, (NutGetCpuClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00175 return 0;
00176 }
00177 return -1;
00178 }
00179
00187 static int Debug1IOCtl(NUTDEVICE * dev, int req, void *conf)
00188 {
00189 if(req == UART_SETSPEED) {
00190 outr(US1_BRGR, (NutGetCpuClock() / (8 * (*((u_long *)conf))) + 1) / 2);
00191 return 0;
00192 }
00193 return -1;
00194 }
00195
00201 static int Debug0Init(NUTDEVICE * dev)
00202 {
00203 #if defined (MCU_AT91R40008)
00204
00205 outr(PS_PCER, _BV(US0_ID));
00206
00207 outr(PIO_PDR, _BV(14) | _BV(15));
00208 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00209
00210 outr(PMC_PCER, _BV(US0_ID));
00211
00212 #if defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00213 outr(PIOA_PDR, _BV(PA5_RXD0_A) | _BV(PA6_TXD0_A));
00214 #else
00215 outr(PIOA_PDR, _BV(0) | _BV(1));
00216 #endif
00217 #endif
00218
00219 outr(US0_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00220
00221 outr(US0_IDR, 0xFFFFFFFF);
00222 #if defined (US0_RCR) && defined(US0_TCR)
00223
00224 outr(US0_RCR, 0);
00225 outr(US0_TCR, 0);
00226 #endif
00227
00228 outr(US0_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00229
00230 outr(US0_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00231
00232 outr(US0_CR, US_RXEN | US_TXEN);
00233
00234 return 0;
00235 }
00236
00242 static int Debug1Init(NUTDEVICE * dev)
00243 {
00244 #if defined (MCU_AT91R40008)
00245
00246 outr(PS_PCER, _BV(US1_ID));
00247
00248 outr(PIO_PDR, _BV(21) | _BV(22));
00249 #elif defined (MCU_AT91SAM7X256) || defined (MCU_AT91SAM9260) || defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00250
00251 outr(PMC_PCER, _BV(US1_ID));
00252
00253 #if defined (MCU_AT91SAM7S256) || defined (MCU_AT91SAM7SE512)
00254 outr(PIOA_PDR, _BV(PA21_RXD1_A) | _BV(PA22_TXD1_A));
00255 #else
00256 outr(PIOA_PDR, _BV(5) | _BV(6));
00257 #endif
00258 #endif
00259
00260 outr(US1_CR, US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS);
00261
00262 outr(US1_IDR, 0xFFFFFFFF);
00263 #if defined (US1_RCR) && defined(US1_TCR)
00264
00265 outr(US1_RCR, 0);
00266 outr(US1_TCR, 0);
00267 #endif
00268
00269 outr(US1_BRGR, (NutGetCpuClock() / (8 * (115200)) + 1) / 2);
00270
00271 outr(US1_MR, US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1);
00272
00273 outr(US1_CR, US_RXEN | US_TXEN);
00274
00275 return 0;
00276 }
00277
00278 #endif
00279
00280
00287 static void DebugPut(CONST NUTDEVICE * dev, char ch)
00288 {
00289 while ((inr(dev->dev_base + US_CSR_OFF) & US_TXRDY) == 0);
00290 outr(dev->dev_base + US_THR_OFF, ch);
00291 if (ch == '\n') {
00292 DebugPut(dev, '\r');
00293 }
00294 }
00295
00304 static int DebugWrite(NUTFILE * fp, CONST void *buffer, int len)
00305 {
00306 int c = len;
00307 CONST char *cp = buffer;
00308
00309 while (c--) {
00310 DebugPut(fp->nf_dev, *cp++);
00311 }
00312 return len;
00313 }
00314
00320 static NUTFILE *DebugOpen(NUTDEVICE * dev, CONST char *name, int mode, int acc)
00321 {
00322 NUTFILE *fp = (NUTFILE *) (dev->dev_dcb);
00323
00324 fp->nf_next = 0;
00325 fp->nf_dev = dev;
00326 fp->nf_fcb = 0;
00327
00328 return fp;
00329 }
00330
00336 static int DebugClose(NUTFILE * fp)
00337 {
00338 return 0;
00339 }
00340
00341 #if defined(DBGU_BASE)
00342
00346 NUTDEVICE devDebug = {
00347 0,
00348 {'d', 'b', 'g', 'u', 0, 0, 0, 0, 0}
00349 ,
00350 0,
00351 DBGU_BASE,
00352 0,
00353 0,
00354 &dbgfile,
00355 DebugInit,
00356 DebugIOCtl,
00357 0,
00358 DebugWrite,
00359 DebugOpen,
00360 DebugClose,
00361 0
00362 };
00363
00364 #else
00365
00369 NUTDEVICE devDebug0 = {
00370 0,
00371 {'u', 'a', 'r', 't', '0', 0, 0, 0, 0}
00372 ,
00373 0,
00374 USART0_BASE,
00375 0,
00376 0,
00377 &dbgfile0,
00378 Debug0Init,
00379 Debug0IOCtl,
00380 0,
00381 DebugWrite,
00382 DebugOpen,
00383 DebugClose,
00384 0
00385 };
00386
00390 NUTDEVICE devDebug1 = {
00391 0,
00392 {'u', 'a', 'r', 't', '1', 0, 0, 0, 0}
00393 ,
00394 0,
00395 USART1_BASE,
00396 0,
00397 0,
00398 &dbgfile1,
00399 Debug1Init,
00400 Debug1IOCtl,
00401 0,
00402 DebugWrite,
00403 DebugOpen,
00404 DebugClose,
00405 0
00406 };
00407
00408 #endif
00409