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00048 #include <arch/arm.h>
00049 #include <dev/irqreg.h>
00050
00051 #ifndef NUT_IRQPRI_SSC
00052 #define NUT_IRQPRI_SSC 5
00053 #endif
00054
00055 static int SyncSerialIrqCtl(int cmd, void *param);
00056
00057 IRQ_HANDLER sig_SSC = {
00058 #ifdef NUT_PERFMON
00059 0,
00060 #endif
00061 NULL,
00062 NULL,
00063 SyncSerialIrqCtl
00064 };
00065
00069 static void SyncSerialIrqEntry(void) __attribute__ ((naked));
00070 void SyncSerialIrqEntry(void)
00071 {
00072 IRQ_ENTRY();
00073 #ifdef NUT_PERFMON
00074 sig_SSC.ir_count++;
00075 #endif
00076 if (sig_SSC.ir_handler) {
00077 (sig_SSC.ir_handler) (sig_SSC.ir_arg);
00078 }
00079 IRQ_EXIT();
00080 }
00081
00099 static int SyncSerialIrqCtl(int cmd, void *param)
00100 {
00101 int rc = 0;
00102 u_int *ival = (u_int *)param;
00103 int enabled = inr(AIC_IMR) & _BV(SSC_ID);
00104
00105
00106 if (enabled) {
00107 outr(AIC_IDCR, _BV(SSC_ID));
00108 }
00109
00110 switch(cmd) {
00111 case NUT_IRQCTL_INIT:
00112
00113 outr(AIC_SVR(SSC_ID), (unsigned int)SyncSerialIrqEntry);
00114
00115 outr(AIC_SMR(SSC_ID), AIC_SRCTYPE_INT_EDGE_TRIGGERED | NUT_IRQPRI_SSC);
00116
00117 outr(AIC_ICCR, _BV(SSC_ID));
00118 break;
00119 case NUT_IRQCTL_STATUS:
00120 if (enabled) {
00121 *ival |= 1;
00122 }
00123 else {
00124 *ival &= ~1;
00125 }
00126 break;
00127 case NUT_IRQCTL_ENABLE:
00128 enabled = 1;
00129 break;
00130 case NUT_IRQCTL_DISABLE:
00131 enabled = 0;
00132 break;
00133 case NUT_IRQCTL_GETMODE:
00134 {
00135 u_int val = inr(AIC_SMR(SSC_ID)) & AIC_SRCTYPE;
00136 if (val == AIC_SRCTYPE_INT_LEVEL_SENSITIVE || val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00137 *ival = NUT_IRQMODE_LEVEL;
00138 } else {
00139 *ival = NUT_IRQMODE_EDGE;
00140 }
00141 }
00142 break;
00143 case NUT_IRQCTL_SETMODE:
00144 if (*ival == NUT_IRQMODE_LEVEL) {
00145 outr(AIC_SMR(SSC_ID), (inr(AIC_SMR(SSC_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_INT_LEVEL_SENSITIVE);
00146 } else if (*ival == NUT_IRQMODE_EDGE) {
00147 outr(AIC_SMR(SSC_ID), (inr(AIC_SMR(SSC_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_INT_EDGE_TRIGGERED);
00148 } else {
00149 rc = -1;
00150 }
00151 break;
00152 case NUT_IRQCTL_GETPRIO:
00153 *ival = inr(AIC_SMR(SSC_ID)) & AIC_PRIOR;
00154 break;
00155 case NUT_IRQCTL_SETPRIO:
00156 outr(AIC_SMR(SSC_ID), (inr(AIC_SMR(SSC_ID)) & ~AIC_PRIOR) | *ival);
00157 break;
00158 #ifdef NUT_PERFMON
00159 case NUT_IRQCTL_GETCOUNT:
00160 *ival = (u_int)sig_SSC.ir_count;
00161 sig_SSC.ir_count = 0;
00162 break;
00163 #endif
00164 default:
00165 rc = -1;
00166 break;
00167 }
00168
00169
00170 if (enabled) {
00171 outr(AIC_IECR, _BV(SSC_ID));
00172 }
00173 return rc;
00174 }