00001 /* 00002 * Copyright (C) 2001-2007 by egnite Software GmbH. All rights reserved. 00003 * 00004 * Redistribution and use in source and binary forms, with or without 00005 * modification, are permitted provided that the following conditions 00006 * are met: 00007 * 00008 * 1. Redistributions of source code must retain the above copyright 00009 * notice, this list of conditions and the following disclaimer. 00010 * 2. Redistributions in binary form must reproduce the above copyright 00011 * notice, this list of conditions and the following disclaimer in the 00012 * documentation and/or other materials provided with the distribution. 00013 * 3. Neither the name of the copyright holders nor the names of 00014 * contributors may be used to endorse or promote products derived 00015 * from this software without specific prior written permission. 00016 * 00017 * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS 00018 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00019 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00020 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE 00021 * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00022 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00023 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 00024 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 00025 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00026 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 00027 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00028 * SUCH DAMAGE. 00029 * 00030 * For additional information see http://www.ethernut.de/ 00031 * 00032 */ 00033 00034 /* 00035 * $Log: ostimer_at91.c,v $ 00036 * Revision 1.18 2008/02/15 16:58:41 haraldkipp 00037 * Spport for AT91SAM7SE512 added. 00038 * 00039 * Revision 1.17 2007/10/04 19:59:47 olereinhardt 00040 * Support for SAM7S256 added 00041 * 00042 * Revision 1.16 2007/08/17 10:44:37 haraldkipp 00043 * Timer enable/disable macro replaces previous global interrupt 00044 * enable/disable or function calling. 00045 * 00046 * Revision 1.15 2007/04/12 09:03:48 haraldkipp 00047 * Miserable delay routine will now honor milliseconds on a 73 MHz ARM. 00048 * 00049 * Revision 1.14 2007/02/15 16:14:39 haraldkipp 00050 * Periodic interrupt timer can be used as a system clock. 00051 * 00052 * Revision 1.13 2006/10/08 16:48:07 haraldkipp 00053 * Documentation fixed 00054 * 00055 * Revision 1.12 2006/09/29 12:37:36 haraldkipp 00056 * Now working correctly, if the CPU is running on the second PLL. 00057 * 00058 * Revision 1.11 2006/09/05 12:27:25 haraldkipp 00059 * PLL clock calculation re-arranged to prevent 32-bit overflow. 00060 * NutTimerMillisToTicks() returned wrong result. Shane Buckham reported 00061 * this long time ago. Many thanks. Needs to be fixed for other platforms too. 00062 * 00063 * Revision 1.10 2006/08/31 18:59:50 haraldkipp 00064 * Added support for the AT91SAM9260. We now determine between processor and 00065 * master clock. A new API function At91GetMasterClock() had been added to 00066 * query the latter. 00067 * 00068 * Revision 1.9 2006/08/05 12:00:01 haraldkipp 00069 * NUT_CPU_FREQ did not override AT91_PLL_MAINCK or NUT_PLL_CPUCLK. Fixed. 00070 * 00071 * Revision 1.8 2006/07/26 11:17:16 haraldkipp 00072 * Defining AT91_PLL_MAINCK will automatically determine SAM7X clock by 00073 * reading PLL settings. 00074 * 00075 * Revision 1.7 2006/07/05 07:59:41 haraldkipp 00076 * Daidai's support for AT91SAM7X added. 00077 * 00078 * Revision 1.6 2006/06/28 17:10:35 haraldkipp 00079 * Include more general header file for ARM. 00080 * 00081 * Revision 1.5 2006/03/02 19:53:01 haraldkipp 00082 * Bugfix. The system timer configuration was based on a fixed MCU clock 00083 * of 66.6 MHz. Now it uses the actual frequency. 00084 * 00085 * Revision 1.4 2006/01/05 16:46:25 haraldkipp 00086 * Added support for CY22393 programmable clock chip. 00087 * 00088 * Revision 1.3 2005/10/24 08:34:13 haraldkipp 00089 * Moved AT91 family specific header files to sbudir arm. 00090 * Use new IRQ API. 00091 * 00092 * Revision 1.2 2005/08/02 17:46:45 haraldkipp 00093 * Major API documentation update. 00094 * 00095 * Revision 1.1 2005/07/26 18:02:26 haraldkipp 00096 * Moved from dev. 00097 * 00098 * Revision 1.2 2005/07/20 09:17:26 haraldkipp 00099 * Default NUT_CPU_FREQ and NUT_TICK_FREQ added. 00100 * NutTimerIntr() removed, because we can use the hardware independent code. 00101 * 00102 * Revision 1.1 2005/05/27 17:16:40 drsung 00103 * Moved the file. 00104 * 00105 * Revision 1.5 2005/04/05 17:50:46 haraldkipp 00106 * Use register names in gba.h. 00107 * 00108 * Revision 1.4 2004/11/08 19:16:37 haraldkipp 00109 * Hacked in Gameboy timer support 00110 * 00111 * Revision 1.3 2004/10/03 18:42:21 haraldkipp 00112 * No GBA support yet, but let the compiler run through 00113 * 00114 * Revision 1.2 2004/09/08 10:19:39 haraldkipp 00115 * Running on AT91 and S3C, thanks to James Tyou 00116 * 00117 */ 00118 00119 #include <cfg/os.h> 00120 #include <cfg/clock.h> 00121 #include <arch/arm.h> 00122 #include <dev/irqreg.h> 00123 #include <sys/timer.h> 00124 00125 #ifndef NUT_CPU_FREQ 00126 #ifdef NUT_PLL_CPUCLK 00127 #include <dev/cy2239x.h> 00128 #elif !defined(AT91_PLL_MAINCK) 00129 #define NUT_CPU_FREQ 73728000UL 00130 #endif /* !AT91_PLL_MAINCK */ 00131 #endif /* !NUT_CPU_FREQ */ 00132 00133 00138 00139 #ifndef NUT_TICK_FREQ 00140 #define NUT_TICK_FREQ 1000UL 00141 #endif 00142 00158 void NutDelay(u_char ms) 00159 { 00160 int i; 00161 00162 while (ms--) { 00163 for (i = 14600; i--; ) { 00164 _NOP(); 00165 } 00166 } 00167 } 00168 00180 void NutRegisterTimer(void (*handler) (void *)) 00181 { 00182 #if defined(NUT_TICK_AT91PIT) 00183 00184 /* Set compare value for the specified tick frequency. */ 00185 #if defined(AT91_PLL_MAINCK) 00186 outr(PIT_MR, (At91GetMasterClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB); 00187 #else 00188 outr(PIT_MR, (NutGetCpuClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB); 00189 #endif 00190 00191 /* Register system interrupt handler. */ 00192 NutRegisterSysIrqHandler(&syssig_PIT, handler, NULL); 00193 /* Enable interval timer and interval timer interrupts */ 00194 outr(PIT_MR, inr(PIT_MR) | PIT_PITEN | PIT_PITIEN); 00195 NutSysIrqEnable(&syssig_PIT); 00196 inr(PIT_PIVR); 00197 00198 #else /* NUT_TICK_AT91PIT */ 00199 00200 int dummy; 00201 00202 #if defined(MCU_AT91SAM7X256) || defined(MCU_AT91SAM7S256) || defined(MCU_AT91SAM9260) || defined (MCU_AT91SAM7SE512) 00203 /* Enable TC0 clock. */ 00204 outr(PMC_PCER, _BV(TC0_ID)); 00205 #endif 00206 00207 /* Disable the Clock Counter */ 00208 outr(TC0_CCR, TC_CLKDIS); 00209 /* Disable all interrupts */ 00210 outr(TC0_IDR, 0xFFFFFFFF); 00211 /* Clear the status register. */ 00212 dummy = inr(TC0_SR); 00213 /* Select divider and compare trigger */ 00214 outr(TC0_CMR, TC_CLKS_MCK32 | TC_CPCTRG); 00215 /* Enable the Clock counter */ 00216 outr(TC0_CCR, TC_CLKEN); 00217 /* Validate the RC compare interrupt */ 00218 outr(TC0_IER, TC_CPCS); 00219 00220 /* Register timer interrupt handler. */ 00221 NutRegisterIrqHandler(&sig_TC0, handler, 0); 00222 /* Set to lowest priority. */ 00223 NutIrqSetPriority(&sig_TC0, 0); 00224 00225 /* Enable timer 0 interrupts */ 00226 NutIrqEnable(&sig_TC0); 00227 //outr(AIC_IECR, _BV(TC0_ID)); 00228 00229 /* Set compare value for 1 ms. */ 00230 #if defined(AT91_PLL_MAINCK) 00231 outr(TC0_RC, At91GetMasterClock() / (32 * NUT_TICK_FREQ)); 00232 #else 00233 outr(TC0_RC, NutGetCpuClock() / (32 * NUT_TICK_FREQ)); 00234 #endif 00235 00236 /* Software trigger starts the clock. */ 00237 outr(TC0_CCR, TC_SWTRG); 00238 00239 #endif /* NUT_TICK_AT91PIT */ 00240 } 00241 00242 #if defined(AT91_PLL_MAINCK) 00243 00244 #if !defined(AT91_SLOW_CLOCK) 00245 /* This is just a guess and may be completely wrong. */ 00246 #define AT91_SLOW_CLOCK 32000 00247 #endif 00248 00256 static u_int At91GetPllClock(int plla) 00257 { 00258 u_int rc; 00259 u_int pllr; 00260 u_int divider; 00261 00262 /* 00263 * The main oscillator clock frequency is specified by the 00264 * configuration. It's usually equal to the on-board crystal. 00265 */ 00266 rc = AT91_PLL_MAINCK; 00267 00268 /* Retrieve the clock generator register of the selected PLL. */ 00269 #if defined(CKGR_PLLAR) && defined(CKGR_PLLBR) 00270 pllr = plla ? inr(CKGR_PLLAR) : inr(CKGR_PLLBR); 00271 #else 00272 pllr = inr(CKGR_PLLR); 00273 #endif 00274 00275 /* Extract the divider value. */ 00276 divider = (pllr & CKGR_DIV) >> CKGR_DIV_LSB; 00277 00278 if (divider) { 00279 rc /= divider; 00280 rc *= ((pllr & CKGR_MUL) >> CKGR_MUL_LSB) + 1; 00281 } 00282 return rc; 00283 } 00284 00290 static u_long At91GetProcessorClock(void) 00291 { 00292 u_int rc = 0; 00293 u_int mckr = inr(PMC_MCKR); 00294 00295 /* Determine the clock source. */ 00296 switch(mckr & PMC_CSS) { 00297 case PMC_CSS_SLOW_CLK: 00298 /* Slow clock selected. */ 00299 rc = AT91_SLOW_CLOCK; 00300 break; 00301 case PMC_CSS_MAIN_CLK: 00302 /* Main clock selected. */ 00303 rc = AT91_PLL_MAINCK; 00304 break; 00305 #if defined(PMC_CSS_PLLA_CLK) 00306 case PMC_CSS_PLLA_CLK: 00307 /* PLL A clock selected. */ 00308 rc = At91GetPllClock(1); 00309 break; 00310 #endif 00311 #if defined(PMC_CSS_PLLB_CLK) 00312 case PMC_CSS_PLLB_CLK: 00313 /* PLL (B) clock selected. */ 00314 rc = At91GetPllClock(0); 00315 break; 00316 #elif defined(PMC_CSS_PLL_CLK) 00317 case PMC_CSS_PLL_CLK: 00318 /* PLL (B) clock selected. */ 00319 rc = At91GetPllClock(0); 00320 break; 00321 #endif 00322 } 00323 00324 /* Handle pre-scaling. */ 00325 mckr &= PMC_PRES; 00326 mckr >>= PMC_PRES_LSB; 00327 if (mckr < 7) { 00328 rc /= _BV(mckr); 00329 } 00330 else { 00331 rc = 0; 00332 } 00333 return rc; 00334 } 00335 00341 u_long At91GetMasterClock(void) 00342 { 00343 u_long rc = At91GetProcessorClock(); 00344 00345 #if defined(MCU_AT91SAM9260) 00346 switch(inr(PMC_MCKR) & PMC_MDIV) { 00347 case PMC_MDIV_2: 00348 rc /= 2; 00349 break; 00350 case PMC_MDIV_4: 00351 rc /= 4; 00352 break; 00353 } 00354 #endif 00355 return rc; 00356 } 00357 00358 #endif /* AT91_PLL_MAINCK */ 00359 00369 u_long NutGetCpuClock(void) 00370 { 00371 #if defined(NUT_CPU_FREQ) 00372 return NUT_CPU_FREQ; 00373 #elif defined(AT91_PLL_MAINCK) 00374 return At91GetProcessorClock(); 00375 #elif defined(NUT_PLL_CPUCLK) 00376 return Cy2239xGetFreq(NUT_PLL_CPUCLK, 7); 00377 #else 00378 #warning "No CPU Clock defined" 00379 return 0; 00380 #endif 00381 } 00382 00388 u_long NutGetTickClock(void) 00389 { 00390 u_int rc; 00391 00392 #if defined(NUT_TICK_AT91PIT) 00393 rc = ((inr(PIT_MR) & PIT_PIV) + 1) * 16; 00394 #else 00395 rc = inr(TC0_RC) * 32; 00396 #endif 00397 00398 if (rc) { 00399 #if defined(AT91_PLL_MAINCK) 00400 return At91GetMasterClock() / rc; 00401 #else 00402 return NutGetCpuClock() / rc; 00403 #endif 00404 } 00405 return NUT_TICK_FREQ; 00406 } 00407 00411 u_long NutTimerMillisToTicks(u_long ms) 00412 { 00413 return (ms * NutGetTickClock()) / 1000; 00414 } 00415