at91sam7se.h

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00001 #ifndef _ARCH_ARM_SAM7SE_H_
00002 #define _ARCH_ARM_SAM7SE_H_
00003 /*
00004  * Copyright (C) 2006-2008 by egnite Software GmbH. All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  *
00010  * 1. Redistributions of source code must retain the above copyright
00011  *    notice, this list of conditions and the following disclaimer.
00012  * 2. Redistributions in binary form must reproduce the above copyright
00013  *    notice, this list of conditions and the following disclaimer in the
00014  *    documentation and/or other materials provided with the distribution.
00015  * 3. Neither the name of the copyright holders nor the names of
00016  *    contributors may be used to endorse or promote products derived
00017  *    from this software without specific prior written permission.
00018  *
00019  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00020  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00022  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00023  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00024  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00025  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00026  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00027  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00028  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00029  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00030  * SUCH DAMAGE.
00031  *
00032  * For additional information see http://www.ethernut.de/
00033  */
00034 
00044 #define FLASH_BASE      0x100000UL
00045 #define RAM_BASE        0x200000UL
00046 
00047 #define TC_BASE         0xFFFA0000      
00048 #define UDP_BASE        0xFFFB0000      
00049 #define TWI_BASE        0xFFFB8000      
00050 #define USART0_BASE     0xFFFC0000      
00051 #define USART1_BASE     0xFFFC4000      
00052 #define PWMC_BASE       0xFFFCC000      
00053 #define SSC_BASE        0xFFFD4000      
00054 #define ADC_BASE        0xFFFD8000      
00055 #define SPI0_BASE       0xFFFE0000      
00057 #define AIC_BASE        0xFFFFF000      
00058 #define DBGU_BASE       0xFFFFF200      
00059 #define PIOA_BASE       0xFFFFF400      
00060 #define PIOB_BASE       0xFFFFF600      
00061 #define PIOC_BASE       0xFFFFF800      
00062 #define PMC_BASE        0xFFFFFC00      
00063 #define RSTC_BASE       0xFFFFFD00      
00064 #define RTT_BASE        0xFFFFFD20      
00065 #define PIT_BASE        0xFFFFFD30      
00066 #define WDT_BASE        0xFFFFFD40      
00067 #define VREG_BASE       0xFFFFFD60      
00068 #define MC_BASE         0xFFFFFF00      
00069 #define EFC0_BASE       0xFFFFFF60      
00070 #define EFC1_BASE       0xFFFFFF70      
00071 #define EBI_BASE        0xFFFFFF80      
00072 #define SMC_BASE        0xFFFFFF90      
00073 #define SDRAMC_BASE     0xFFFFFFB0      
00074 #define ECC_BASE        0xFFFFFFDC      
00076 #define PERIPH_RPR_OFF  0x00000100      
00077 #define PERIPH_RCR_OFF  0x00000104      
00078 #define PERIPH_TPR_OFF  0x00000108      
00079 #define PERIPH_TCR_OFF  0x0000010C      
00080 #define PERIPH_RNPR_OFF 0x00000110      
00081 #define PERIPH_RNCR_OFF 0x00000114      
00082 #define PERIPH_TNPR_OFF 0x00000118      
00083 #define PERIPH_TNCR_OFF 0x0000011C      
00084 #define PERIPH_PTCR_OFF 0x00000120      
00085 #define PERIPH_PTSR_OFF 0x00000124      
00087 #define PDC_RXTEN       0x00000001      
00088 #define PDC_RXTDIS      0x00000002      
00089 #define PDC_TXTEN       0x00000100      
00090 #define PDC_TXTDIS      0x00000200      
00092 #define EBI_HAS_CSA
00093 
00094 #define DBGU_HAS_PDC
00095 #define SPI_HAS_PDC
00096 #define SSC_HAS_PDC
00097 #define USART_HAS_PDC
00098 
00099 #define PIO_HAS_MULTIDRIVER
00100 #define PIO_HAS_PULLUP
00101 #define PIO_HAS_PERIPHERALSELECT
00102 #define PIO_HAS_OUTPUTWRITEENABLE
00103 
00104 #include <arch/arm/at91_tc.h>
00105 #include <arch/arm/at91_us.h>
00106 #include <arch/arm/at91_dbgu.h>
00107 #include <arch/arm/at91_spi.h>
00108 #include <arch/arm/at91_aic.h>
00109 #include <arch/arm/at91_pio.h>
00110 #include <arch/arm/at91_pmc.h>
00111 #include <arch/arm/at91_rstc.h>
00112 #include <arch/arm/at91_wdt.h>
00113 #include <arch/arm/at91_pit.h>
00114 #include <arch/arm/at91_mc.h>
00115 #include <arch/arm/at91_ebi.h>
00116 #include <arch/arm/at91_smc.h>
00117 #include <arch/arm/at91_sdramc.h>
00118 #include <arch/arm/at91_ssc.h>
00119 #include <arch/arm/at91_twi.h>
00120 #include <arch/arm/at91_adc.h>
00121 
00124 
00127 #define FIQ_ID      0       
00128 #define SYSC_ID     1       
00129 #define PIOA_ID     2       
00130 #define PIOB_ID     3       
00131 #define PIOC_ID     4       
00132 #define SPI0_ID     5       
00133 #define US0_ID      6       
00134 #define US1_ID      7       
00135 #define SSC_ID      8       
00136 #define TWI_ID      9       
00137 #define PWMC_ID     10      
00138 #define UDP_ID      11      
00139 #define TC0_ID      12      
00140 #define TC1_ID      13      
00141 #define TC2_ID      14      
00142 #define ADC_ID      15      
00143 /* Reserved      16-28*/
00144 #define IRQ0_ID     29      
00145 #define IRQ1_ID     30      
00147 
00148 
00150 #define SPI0_NPCS0_PA11A    11  
00151 #define SPI0_NPCS1_PA09B    9   
00152 #define SPI0_NPCS1_PA31A    31  
00153 #define SPI0_NPCS2_PA10B    10  
00154 #define SPI0_NPCS2_PA30B    30  
00155 #define SPI0_NPCS3_PA03B    3   
00156 #define SPI0_NPCS3_PA05B    5   
00157 #define SPI0_NPCS3_PA22B    22  
00158 #define SPI0_MISO_PA12A    12 
00159 #define SPI0_MOSI_PA13A    13 
00160 #define SPI0_SPCK_PA14A    14 
00162 
00163 
00165 #define PA5_RXD0_A          5
00166 #define PA6_TXD0_A          6
00167 #define PB2_SCK0_A          2
00168 #define PA7_RTS0_A          7
00169 #define PA8_CTS0_A          8
00170 
00171 #define PA21_RXD1_A         21
00172 #define PA22_TXD1_A         22
00173 #define PA23_SCK1_A         23
00174 #define PA24_RTS1_A         24
00175 #define PC8_RTS1_B          8
00176 #define PA25_CTS1_A         25
00177 #define PA26_DCD1_A         26
00178 #define PA27_DTR1_A         27
00179 #define PC9_DTR1_B          9
00180 #define PA28_DSR1_A         28
00181 #define PA29_RI1_A          29
00182 
00186 #define PA12_SPI0_MISO_A    12
00187 #define PA13_SPI0_MOSI_A    13
00188 #define PA14_SPI0_SPCK_A    14
00189 #define PA11_SPI0_NPCS0_A   11
00190 #define PA31_SPI0_NPCS1_A   31
00191 #define PB9_SPI0_NPCS1_A    9
00192 #define PB10_SPI0_NPCS2_A   10
00193 #define PC14_SPI0_NPCS1_B   14
00194 #define PB30_SPI0_NPCS2_A   30
00195 #define PB3_SPI0_NPCS3_A    3
00196 #define PB5_SPI0_NPCS3_A    5
00197 #define PB22_SPI0_NPCS3_A   22
00198 
00199 #define SPI0_PINS           _BV(PA12_SPI0_MISO_A) | _BV(PA13_SPI0_MOSI_A) | _BV(PA14_SPI0_SPCK_A)
00200 #define SPI0_PIO_BASE       PIOA_BASE
00201 #define SPI0_PSR_OFF        PIO_ASR_OFF
00202 
00203 #define SPI0_CS0_PIN        _BV(PA11_SPI0_NPCS0_A)
00204 #define SPI0_CS0_PIO_BASE   PIOA_BASE
00205 #define SPI0_CS0_PSR_OFF    PIO_ASR_OFF
00206 
00207 #ifndef SPI0_CS1_PIN
00208 #define SPI0_CS1_PIN        _BV(PA31_SPI0_NPCS1_A)
00209 #define SPI0_CS1_PIO_BASE   PIOA_BASE
00210 #define SPI0_CS1_PSR_OFF    PIO_ASR_OFF
00211 #endif
00212 
00217 #define PA0_A0_B            0
00218 #define PB0_A0_B            0
00219 #define PA1_A1_B            1
00220 #define PB1_A1_B            1
00221 #define PA2_A2_B            2
00222 #define PB2_A2_B            2
00223 #define PA3_A3_B            3
00224 #define PB3_A3_B            3
00225 #define PA4_A4_B            4
00226 #define PB4_A4_B            4
00227 #define PA5_A5_B            5
00228 #define PB5_A5_B            5
00229 #define PA6_A6_B            6
00230 #define PB6_A6_B            6
00231 #define PA7_A7_B            7
00232 #define PB7_A7_B            7
00233 #define PA8_A8_B            8
00234 #define PB8_A8_B            8
00235 #define PA9_A9_B            9
00236 #define PB9_A9_B            9
00237 #define PA10_A10_B          10
00238 #define PB10_A10_B          10
00239 #define PA11_A11_B          11
00240 #define PB11_A11_B          11
00241 #define PA12_A12_B          12
00242 #define PB12_A12_B          12
00243 #define PA13_A13_B          13
00244 #define PB13_A13_B          13
00245 #define PA14_A14_B          14
00246 #define PB14_A14_B          14
00247 #define PA15_A15_B          15
00248 #define PB15_A15_B          15
00249 #define PA16_A16_B          16
00250 #define PB16_A16_B          16
00251 #define PA17_A17_B          17
00252 #define PB17_A17_B          17
00253 #define PC16_A18_A          16
00254 #define PC17_A19_A          17
00255 #define PC18_A20_A          18
00256 #define PC19_A21_A          19
00257 #define PC20_A22_A          20
00258 
00259 #define PC0_D0_A            0
00260 #define PC1_D1_A            1
00261 #define PC2_D2_A            2
00262 #define PC3_D3_A            3
00263 #define PC4_D4_A            4
00264 #define PC5_D5_A            5
00265 #define PC6_D6_A            6
00266 #define PC7_D7_A            7
00267 #define PC8_D8_A            8
00268 #define PC9_D9_A            9
00269 #define PC10_D10_A          10
00270 #define PC11_D11_A          11
00271 #define PC12_D12_A          12
00272 #define PC13_D13_A          13
00273 #define PC14_D14_A          14
00274 #define PC15_D15_A          15
00275 #define PB18_D16_B          18
00276 #define PB19_D17_B          19
00277 #define PB20_D18_B          20
00278 #define PB21_D19_B          21
00279 #define PB22_D20_B          22
00280 #define PB23_D21_B          23
00281 #define PB24_D22_B          24
00282 #define PB25_D23_B          25
00283 #define PB26_D24_B          26
00284 #define PB27_D25_B          27
00285 #define PB28_D26_B          28
00286 #define PB29_D27_B          29
00287 #define PB30_D28_B          30
00288 #define PB31_D29_B          31
00289 #define PA30_D30_B          30
00290 #define PA31_D31_B          31
00291 
00292 #define PA19_NCS4_B         19
00293 #define PA20_NCS2_B         20
00294 #define PA21_NCS6_B         21
00295 #define PA22_NCS5_B         22
00296 #define PA26_NCS1_B         26
00297 #define PC15_NCS3_B         15
00298 #define PC20_NCS7_B         20
00299 #define PC23_NCS0_B         23
00300 
00301 #define PA18_NBS3_B         18
00302 #define PA23_NWR1_B         23
00303 #define PA24_SDA10_B        24
00304 #define PA25_SDCKE_B        25
00305 #define PA27_SDWE_B         27
00306 #define PA28_CAS_B          28
00307 #define PA29_RAS_B          29
00308 #define PC16_NWAIT_B        16
00309 #define PC17_NANDOE_B       17
00310 #define PC18_NANDWE_B       18
00311 #define PC21_NWR0_B         21
00312 #define PC22_NRD_B          22
00313 #define PC23_CFRNW_A        23
00314 
00318 #define PA9_DRXD_A          9
00319 #define PA10_DTXD_A         10
00320 
00324 #define PA17_TD_A           17  
00325 #define PA18_RD_A           18  
00326 #define PA16_TK_A           16  
00327 #define PA19_RK_A           19  
00328 #define PA15_TF_A           15  
00329 #define PA20_RF_A           20  
00331 
00332 
00334 #define PA3_TWD_A          3  
00335 #define PA4_TWCK_A         4  
00337 
00338 
00340 #define PB0_TIOA0_A         0
00341 #define PB1_TIOB0_A         1
00342 #define PB4_TCLK0_A         4
00343 #define PB15_TIOA1_A        15
00344 #define PB16_TIOB1_A        16
00345 #define PB28_TCLK1_A        28
00346 #define PB26_TIOA2_A        26
00347 #define PB27_TIOB2_A        27
00348 #define PB29_TCLK2_A        29
00349 
00353 #define PB6_PCK0_A          6
00354 #define PC10_PCK0_B         10
00355 #define PB17_PCK1_A         17
00356 #define PB21_PCK1_A         21
00357 #define PC11_PCK1_B         11
00358 #define PB18_PCK2_A         18
00359 #define PB31_PCK2_A         31
00360 #define PC12_PCK2_B         12
00361 
00365 #define PB19_FIQ_A          19
00366 #define PB20_IRQ0_A         20
00367 #define PA30_IRQ1_A         30
00368 
00372 #define PB8_ADTRG_A        8  
00374 
00375 
00377 #define PA0_PWM0_A          0
00378 #define PB11_PWM0_A         11
00379 #define PB23_PWM0_A         23
00380 #define PA1_PWM1_A          1
00381 #define PB12_PWM1_A         12
00382 #define PB24_PWM1_A         24
00383 #define PA2_PWM2_A          2
00384 #define PB13_PWM2_A         13
00385 #define PB25_PWM2_A         25
00386 #define PB7_PWM3_A          7
00387 #define PB14_PWM3_A         14
00388 
00390 
00392 #endif /* _ARCH_ARM_AT91SAM7SE_H_ */

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