ostimer_at91.c

Go to the documentation of this file.
00001 /*
00002  * Copyright (C) 2001-2007 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log: ostimer_at91.c,v $
00036  * Revision 1.17  2007/10/04 19:59:47  olereinhardt
00037  * Support for SAM7S256 added
00038  *
00039  * Revision 1.16  2007/08/17 10:44:37  haraldkipp
00040  * Timer enable/disable macro replaces previous global interrupt
00041  * enable/disable or function calling.
00042  *
00043  * Revision 1.15  2007/04/12 09:03:48  haraldkipp
00044  * Miserable delay routine will now honor milliseconds on a 73 MHz ARM.
00045  *
00046  * Revision 1.14  2007/02/15 16:14:39  haraldkipp
00047  * Periodic interrupt timer can be used as a system clock.
00048  *
00049  * Revision 1.13  2006/10/08 16:48:07  haraldkipp
00050  * Documentation fixed
00051  *
00052  * Revision 1.12  2006/09/29 12:37:36  haraldkipp
00053  * Now working correctly, if the CPU is running on the second PLL.
00054  *
00055  * Revision 1.11  2006/09/05 12:27:25  haraldkipp
00056  * PLL clock calculation re-arranged to prevent 32-bit overflow.
00057  * NutTimerMillisToTicks() returned wrong result. Shane Buckham reported
00058  * this long time ago. Many thanks. Needs to be fixed for other platforms too.
00059  *
00060  * Revision 1.10  2006/08/31 18:59:50  haraldkipp
00061  * Added support for the AT91SAM9260. We now determine between processor and
00062  * master clock. A new API function At91GetMasterClock() had been added to
00063  * query the latter.
00064  *
00065  * Revision 1.9  2006/08/05 12:00:01  haraldkipp
00066  * NUT_CPU_FREQ did not override AT91_PLL_MAINCK or NUT_PLL_CPUCLK. Fixed.
00067  *
00068  * Revision 1.8  2006/07/26 11:17:16  haraldkipp
00069  * Defining AT91_PLL_MAINCK will automatically determine SAM7X clock by
00070  * reading PLL settings.
00071  *
00072  * Revision 1.7  2006/07/05 07:59:41  haraldkipp
00073  * Daidai's support for AT91SAM7X added.
00074  *
00075  * Revision 1.6  2006/06/28 17:10:35  haraldkipp
00076  * Include more general header file for ARM.
00077  *
00078  * Revision 1.5  2006/03/02 19:53:01  haraldkipp
00079  * Bugfix. The system timer configuration was based on a fixed MCU clock
00080  * of 66.6 MHz. Now it uses the actual frequency.
00081  *
00082  * Revision 1.4  2006/01/05 16:46:25  haraldkipp
00083  * Added support for CY22393 programmable clock chip.
00084  *
00085  * Revision 1.3  2005/10/24 08:34:13  haraldkipp
00086  * Moved AT91 family specific header files to sbudir arm.
00087  * Use new IRQ API.
00088  *
00089  * Revision 1.2  2005/08/02 17:46:45  haraldkipp
00090  * Major API documentation update.
00091  *
00092  * Revision 1.1  2005/07/26 18:02:26  haraldkipp
00093  * Moved from dev.
00094  *
00095  * Revision 1.2  2005/07/20 09:17:26  haraldkipp
00096  * Default NUT_CPU_FREQ and NUT_TICK_FREQ added.
00097  * NutTimerIntr() removed, because we can use the hardware independent code.
00098  *
00099  * Revision 1.1  2005/05/27 17:16:40  drsung
00100  * Moved the file.
00101  *
00102  * Revision 1.5  2005/04/05 17:50:46  haraldkipp
00103  * Use register names in gba.h.
00104  *
00105  * Revision 1.4  2004/11/08 19:16:37  haraldkipp
00106  * Hacked in Gameboy timer support
00107  *
00108  * Revision 1.3  2004/10/03 18:42:21  haraldkipp
00109  * No GBA support yet, but let the compiler run through
00110  *
00111  * Revision 1.2  2004/09/08 10:19:39  haraldkipp
00112  * Running on AT91 and S3C, thanks to James Tyou
00113  *
00114  */
00115 
00116 #include <cfg/os.h>
00117 #include <cfg/clock.h>
00118 #include <arch/arm.h>
00119 #include <dev/irqreg.h>
00120 #include <sys/timer.h>
00121 
00122 #ifndef NUT_CPU_FREQ
00123 #ifdef NUT_PLL_CPUCLK
00124 #include <dev/cy2239x.h>
00125 #elif !defined(AT91_PLL_MAINCK)
00126 #define NUT_CPU_FREQ    73728000UL
00127 #endif /* !AT91_PLL_MAINCK */
00128 #endif /* !NUT_CPU_FREQ */
00129 
00130 
00135 
00136 #ifndef NUT_TICK_FREQ
00137 #define NUT_TICK_FREQ   1000UL
00138 #endif
00139 
00155 void NutDelay(u_char ms)
00156 {
00157     int i;
00158 
00159     while (ms--) {
00160         for (i = 14600; i--; ) {
00161             _NOP();
00162         }
00163     }
00164 }
00165 
00177 void NutRegisterTimer(void (*handler) (void *))
00178 {
00179 #if defined(NUT_TICK_AT91PIT)
00180 
00181     /* Set compare value for the specified tick frequency. */
00182 #if defined(AT91_PLL_MAINCK)
00183     outr(PIT_MR, (At91GetMasterClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB);
00184 #else
00185     outr(PIT_MR, (NutGetCpuClock() / (16 * NUT_TICK_FREQ) - 1) << PIT_PIV_LSB);
00186 #endif
00187 
00188     /* Register system interrupt handler. */
00189     NutRegisterSysIrqHandler(&syssig_PIT, handler, NULL);
00190     /* Enable interval timer and interval timer interrupts */
00191     outr(PIT_MR, inr(PIT_MR) | PIT_PITEN | PIT_PITIEN);
00192     NutSysIrqEnable(&syssig_PIT);
00193     inr(PIT_PIVR);
00194 
00195 #else   /* NUT_TICK_AT91PIT */
00196 
00197     int dummy;
00198 
00199 #if defined(MCU_AT91SAM7X256) || defined(MCU_AT91SAM7S256) || defined(MCU_AT91SAM9260)
00200     /* Enable TC0 clock. */
00201     outr(PMC_PCER, _BV(TC0_ID));
00202 #endif
00203 
00204     /* Disable the Clock Counter */
00205     outr(TC0_CCR, TC_CLKDIS);
00206     /* Disable all interrupts */
00207     outr(TC0_IDR, 0xFFFFFFFF);
00208     /* Clear the status register. */
00209     dummy = inr(TC0_SR);
00210     /* Select divider and compare trigger */
00211     outr(TC0_CMR, TC_CLKS_MCK32 | TC_CPCTRG);
00212     /* Enable the Clock counter */
00213     outr(TC0_CCR, TC_CLKEN);
00214     /* Validate the RC compare interrupt */
00215     outr(TC0_IER, TC_CPCS);
00216 
00217     /* Register timer interrupt handler. */
00218     NutRegisterIrqHandler(&sig_TC0, handler, 0);
00219     /* Set to lowest priority. */
00220     NutIrqSetPriority(&sig_TC0, 0);
00221 
00222     /* Enable timer 0 interrupts */
00223     NutIrqEnable(&sig_TC0);
00224     //outr(AIC_IECR, _BV(TC0_ID));
00225 
00226     /* Set compare value for 1 ms. */
00227 #if defined(AT91_PLL_MAINCK)
00228     outr(TC0_RC, At91GetMasterClock() / (32 * NUT_TICK_FREQ));
00229 #else
00230     outr(TC0_RC, NutGetCpuClock() / (32 * NUT_TICK_FREQ));
00231 #endif
00232 
00233     /* Software trigger starts the clock. */
00234     outr(TC0_CCR, TC_SWTRG);
00235 
00236 #endif  /* NUT_TICK_AT91PIT */
00237 }
00238 
00239 #if defined(AT91_PLL_MAINCK)
00240 
00241 #if !defined(AT91_SLOW_CLOCK)
00242 /* This is just a guess and may be completely wrong. */
00243 #define AT91_SLOW_CLOCK 32000
00244 #endif
00245 
00253 static u_int At91GetPllClock(int plla)
00254 {
00255     u_int rc;
00256     u_int pllr;
00257     u_int divider;
00258 
00259     /* 
00260      * The main oscillator clock frequency is specified by the
00261      * configuration. It's usually equal to the on-board crystal.
00262      */
00263     rc = AT91_PLL_MAINCK;
00264 
00265     /* Retrieve the clock generator register of the selected PLL. */
00266 #if defined(CKGR_PLLAR) && defined(CKGR_PLLBR)
00267     pllr = plla ? inr(CKGR_PLLAR) : inr(CKGR_PLLBR);
00268 #else
00269     pllr = inr(CKGR_PLLR);
00270 #endif
00271 
00272     /* Extract the divider value. */
00273     divider = (pllr & CKGR_DIV) >> CKGR_DIV_LSB;
00274 
00275     if (divider) {
00276         rc /= divider;
00277         rc *= ((pllr & CKGR_MUL) >> CKGR_MUL_LSB) + 1;
00278     }
00279     return rc;
00280 }
00281 
00287 static u_long At91GetProcessorClock(void)
00288 {
00289     u_int rc = 0;
00290     u_int mckr = inr(PMC_MCKR);
00291 
00292     /* Determine the clock source. */
00293     switch(mckr & PMC_CSS) {
00294     case PMC_CSS_SLOW_CLK:
00295         /* Slow clock selected. */
00296         rc = AT91_SLOW_CLOCK;
00297         break;
00298     case PMC_CSS_MAIN_CLK:
00299         /* Main clock selected. */
00300         rc = AT91_PLL_MAINCK;
00301         break;
00302 #if defined(PMC_CSS_PLLA_CLK)
00303     case PMC_CSS_PLLA_CLK:
00304         /* PLL A clock selected. */
00305         rc = At91GetPllClock(1);
00306         break;
00307 #endif
00308 #if defined(PMC_CSS_PLLB_CLK)
00309     case PMC_CSS_PLLB_CLK:
00310         /* PLL (B) clock selected. */
00311         rc = At91GetPllClock(0);
00312         break;
00313 #elif defined(PMC_CSS_PLL_CLK)
00314     case PMC_CSS_PLL_CLK:
00315         /* PLL (B) clock selected. */
00316         rc = At91GetPllClock(0);
00317         break;
00318 #endif
00319     }
00320 
00321     /* Handle pre-scaling. */
00322     mckr &= PMC_PRES;
00323     mckr >>= PMC_PRES_LSB;
00324     if (mckr < 7) {
00325         rc /= _BV(mckr);
00326     }
00327     else {
00328         rc = 0;
00329     }
00330     return rc;
00331 }
00332 
00338 u_long At91GetMasterClock(void)
00339 {
00340     u_long rc = At91GetProcessorClock();
00341 
00342 #if defined(MCU_AT91SAM9260)
00343     switch(inr(PMC_MCKR) & PMC_MDIV) {
00344     case PMC_MDIV_2:
00345         rc /= 2;
00346         break;
00347     case PMC_MDIV_4:
00348         rc /= 4;
00349         break;
00350     }
00351 #endif
00352     return rc;
00353 }
00354 
00355 #endif /* AT91_PLL_MAINCK */
00356 
00366 u_long NutGetCpuClock(void)
00367 {
00368 #if defined(NUT_CPU_FREQ)
00369     return NUT_CPU_FREQ;
00370 #elif defined(AT91_PLL_MAINCK)
00371     return At91GetProcessorClock();
00372 #elif defined(NUT_PLL_CPUCLK)
00373     return Cy2239xGetFreq(NUT_PLL_CPUCLK, 7);
00374 #else
00375 #warning "No CPU Clock defined"
00376     return 0;
00377 #endif
00378 }
00379 
00385 u_long NutGetTickClock(void)
00386 {
00387     u_int rc;
00388 
00389 #if defined(NUT_TICK_AT91PIT)
00390     rc = ((inr(PIT_MR) & PIT_PIV) + 1) * 16;
00391 #else
00392     rc = inr(TC0_RC) * 32;
00393 #endif
00394 
00395     if (rc) {
00396 #if defined(AT91_PLL_MAINCK)
00397         return At91GetMasterClock() / rc;
00398 #else
00399         return NutGetCpuClock() / rc;
00400 #endif
00401     }
00402     return NUT_TICK_FREQ;
00403 }
00404 
00408 u_long NutTimerMillisToTicks(u_long ms)
00409 {
00410     return (ms * NutGetTickClock()) / 1000;
00411 }
00412 

© 2000-2007 by egnite Software GmbH - visit http://www.ethernut.de/