at91.h

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00001 #ifndef _ARCH_ARM_AT91_H_
00002 #define _ARCH_ARM_AT91_H_
00003 
00004 /*
00005  * Copyright (C) 2005 by egnite Software GmbH. All rights reserved.
00006  *
00007  * Redistribution and use in source and binary forms, with or without
00008  * modification, are permitted provided that the following conditions
00009  * are met:
00010  *
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer.
00013  * 2. Redistributions in binary form must reproduce the above copyright
00014  *    notice, this list of conditions and the following disclaimer in the
00015  *    documentation and/or other materials provided with the distribution.
00016  * 3. Neither the name of the copyright holders nor the names of
00017  *    contributors may be used to endorse or promote products derived
00018  *    from this software without specific prior written permission.
00019  *
00020  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00021  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00022  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00023  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00024  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00025  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00026  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00027  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00028  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00030  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00031  * SUCH DAMAGE.
00032  *
00033  * For additional information see http://www.ethernut.de/
00034  */
00035 
00082 #if defined (MCU_AT91R40008)
00083 #include <arch/arm/at91x40.h>
00084 #elif defined (MCU_AT91SAM7X256)
00085 #include <arch/arm/at91sam7x.h>
00086 #elif defined (MCU_AT91SAM7S256)
00087 #include <arch/arm/at91sam7s.h>
00088 #elif defined (MCU_AT91SAM9260)
00089 #include <arch/arm/at91sam9260.h>
00090 #endif
00091 
00094 
00095 #ifdef __GNUC__
00096 
00100 #define IRQ_ENTRY() \
00101     asm volatile("sub   lr, lr,#4"          "\n\t"  /* Adjust LR */ \
00102                  "stmfd sp!,{r0-r12,lr}"    "\n\t"  /* Save registers on IRQ stack. */ \
00103                  "mrs   r1, spsr"           "\n\t"  /* Save SPSR */ \
00104                  "stmfd sp!,{r1}"           "\n\t")     /* */
00105 
00109 #define IRQ_EXIT() \
00110     asm volatile("ldmfd sp!, {r1}"          "\n\t"  /* Restore SPSR */ \
00111                  "msr   spsr_c, r1"         "\n\t"  /* */ \
00112                  "ldr   r0, =0xFFFFF000"    "\n\t"  /* End of interrupt. */ \
00113                  "str   r0, [r0, #0x130]"   "\n\t"  /* */ \
00114                  "ldmfd sp!, {r0-r12, pc}^" "\n\t")     /* Restore registers and return. */
00115 
00119 #define FIQ_ENTRY() \
00120     asm volatile("sub   lr, lr,#4"          "\n\t"  /* Adjust LR */ \
00121                  "stmfd sp!,{r0-r7,lr}"    "\n\t"  /* Save registers on IRQ stack. */ \
00122                  "mrs   r1, spsr"           "\n\t"  /* Save SPSR */ \
00123                  "stmfd sp!,{r1}"           "\n\t")     /* */
00124 
00128 #define FIQ_EXIT() \
00129     asm volatile("ldmfd sp!, {r1}"          "\n\t"  /* Restore SPSR */ \
00130                  "msr   spsr_c, r1"         "\n\t"  /* */ \
00131                  "ldr   r0, =0xFFFFF000"    "\n\t"  /* End of interrupt. */ \
00132                  "str   r0, [r0, #0x130]"   "\n\t"  /* */ \
00133                  "ldmfd sp!, {r0-r7, pc}^" "\n\t")     /* Restore registers and return. */
00134 
00135 #else /* __IMAGECRAFT__ */
00136 
00137 #define IRQ_ENTRY() \
00138     asm("sub   lr, lr,#4\n" \
00139         "stmfd sp!,{r0-r12,lr}\n" \
00140         "mrs   r1, spsr\n" \
00141         "stmfd sp!,{r1}\n")
00142 
00143 #define IRQ_EXIT() \
00144     asm("ldmfd sp!, {r1}\n" \
00145         "msr   spsr_c, r1\n" \
00146         ";ldr   r0, =0xFFFFF000\n" /* ICCARM: FIXME! */ \
00147         "str   r0, [r0, #0x130]\n" \
00148         "ldmfd sp!, {r0-r12, pc}^")
00149 
00150 #define FIQ_ENTRY() \
00151     asm("sub   lr, lr,#4\n" \
00152         "stmfd sp!,{r0-r7,lr}\n" \
00153         "mrs   r1, spsr\n" \
00154         "stmfd sp!,{r1}\n")
00155 
00156 #define FIQ_EXIT() \
00157     asm("ldmfd sp!, {r1}\n" \
00158         "msr   spsr_c, r1\n" \
00159         ";ldr   r0, =0xFFFFF000\n" /* ICCARM: FIXME! */ \
00160         "str   r0, [r0, #0x130]\n" \
00161         "ldmfd sp!, {r0-r7, pc}^")
00162 
00163 #endif
00164 
00167 #ifndef __ASSEMBLER__
00168 extern void McuInit(void);
00169 #endif
00170 
00171 #endif                          /* _ARCH_ARM_AT91_H_ */

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