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at91_pmc.h File Reference


Detailed Description

AT91 peripherals.

 *
 * $Log: at91_pmc.h,v $
 * Revision 1.1  2006/07/05 07:45:28  haraldkipp
 * Split on-chip interface definitions.
 *
 *
 * 


Defines

#define PMC_SCER
 System Clock Enable Register.
#define PMC_PCK
 Processor Clock.
#define PMC_UDP
 USB Device Port Clock.
#define PMC_PCK0
 Programmable Clock Output.
#define PMC_PCK1
 Programmable Clock Output.
#define PMC_PCK2
 Programmable Clock Output.
#define PMC_SCDR
 System Clock Disable Register.
#define PMC_SCSR
 System Clock Status Register.
#define PMC_PCER
 Peripheral Clock Enable Register.
#define PMC_PCDR
 Peripheral Clock Disable Register.
#define PMC_PCSR
 Peripheral Clock Status Register.
#define CKGR_MOR
 Main Oscillator Register.
#define CKGR_MOSCEN
 Main Oscillator Enable.
#define CKGR_OSCBYPASS
 Main Oscillator Bypass.
#define CKGR_OSCOUNT
 Main Oscillator Start-up Time.
#define CKGR_MCFR
 Main Clock Frequency Register.
#define CKGR_MAINF
 Main Clock Frequency.
#define CKGR_MAINRDY
 Main Clock Ready.
#define CKGR_PLLR
 PLL Register.
#define CKGR_DIV
 Divider Selected.
#define CKGR_DIV_0
 Divider output is 0.
#define CKGR_DIV_BYPASS
 Divider is bypassed.
#define CKGR_PLLCOUNT
 PLL Counter.
#define CKGR_OUT
 PLL Output Frequency Range.
#define CKGR_OUT_0
 Please refer to the PLL datasheet.
#define CKGR_OUT_1
 Please refer to the PLL datasheet.
#define CKGR_OUT_2
 Please refer to the PLL datasheet.
#define CKGR_OUT_3
 Please refer to the PLL datasheet.
#define CKGR_MUL
 PLL Multiplier.
#define CKGR_USBDIV
 Divider for USB Clocks.
#define CKGR_USBDIV_0
 Divider output is PLL clock output.
#define CKGR_USBDIV_1
 Divider output is PLL clock output divided by 2.
#define CKGR_USBDIV_2
 Divider output is PLL clock output divided by 4.
#define PMC_MCKR
 Master Clock Register.
#define PMC_CSS
 Programmable Clock Selection.
#define PMC_CSS_SLOW_CLK
 Slow Clock is selected.
#define PMC_CSS_MAIN_CLK
 Main Clock is selected.
#define PMC_CSS_PLL_CLK
 Clock from PLL is selected.
#define PMC_PRES
 Programmable Clock Prescaler.
#define PMC_PRES_CLK
 Selected clock.
#define PMC_PRES_CLK_2
 Selected clock divided by 2.
#define PMC_PRES_CLK_4
 Selected clock divided by 4.
#define PMC_PRES_CLK_8
 Selected clock divided by 8.
#define PMC_PRES_CLK_16
 Selected clock divided by 16.
#define PMC_PRES_CLK_32
 Selected clock divided by 32.
#define PMC_PRES_CLK_64
 Selected clock divided by 64.
#define PMC_PCKR0
 Programmable Clock Register.
#define PMC_PCKR1
 Programmable Clock Register.
#define PMC_PCKR2
 Programmable Clock Register.
#define PMC_PCKR3
 Programmable Clock Register.
#define PMC_IER
 Interrupt Enable Register.
#define PMC_IDR
 Interrupt Disable Register.
#define PMC_SR
 Status Register.
#define PMC_IMR
 Interrupt Mask Register.
#define PMC_MOSCS
 MOSC Status/Enable/Disable/Mask.
#define PMC_LOCK
 PLL Status/Enable/Disable/Mask.
#define PMC_MCKRDY
 MCK_RDY Status/Enable/Disable/Mask.
#define PMC_PCK0RDY
 PCK0_RDY Status/Enable/Disable/Mask.
#define PMC_PCK1RDY
 PCK1_RDY Status/Enable/Disable/Mask.
#define PMC_PCK2RDY
 PCK2_RDY Status/Enable/Disable/Mask.


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