00001 #ifndef _DEV_RTLREGS_H_ 00002 #define _DEV_RTLREGS_H_ 00003 00004 /* 00005 * Copyright (C) 2001-2002 by egnite Software GmbH. All rights reserved. 00006 * 00007 * Redistribution and use in source and binary forms, with or without 00008 * modification, are permitted provided that the following conditions 00009 * are met: 00010 * 00011 * 1. Redistributions of source code must retain the above copyright 00012 * notice, this list of conditions and the following disclaimer. 00013 * 2. Redistributions in binary form must reproduce the above copyright 00014 * notice, this list of conditions and the following disclaimer in the 00015 * documentation and/or other materials provided with the distribution. 00016 * 3. All advertising materials mentioning features or use of this 00017 * software must display the following acknowledgement: 00018 * 00019 * This product includes software developed by egnite Software GmbH 00020 * and its contributors. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS 00023 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00024 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00025 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE 00026 * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00027 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00028 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 00029 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 00030 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00031 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 00032 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00033 * SUCH DAMAGE. 00034 * 00035 * For additional information see http://www.ethernut.de/ 00036 * 00037 * - 00038 * Portions Copyright (C) 2000 David J. Hudson <dave@humbug.demon.co.uk> 00039 * 00040 * This file is distributed in the hope that it will be useful, but WITHOUT 00041 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 00042 * FITNESS FOR A PARTICULAR PURPOSE. 00043 * 00044 * You can redistribute this file and/or modify it under the terms of the GNU 00045 * General Public License (GPL) as published by the Free Software Foundation; 00046 * either version 2 of the License, or (at your discretion) any later version. 00047 * See the accompanying file "copying-gpl.txt" for more details. 00048 * 00049 * As a special exception to the GPL, permission is granted for additional 00050 * uses of the text contained in this file. See the accompanying file 00051 * "copying-liquorice.txt" for details. 00052 * - 00053 * Portions Copyright (c) 1983, 1993 by 00054 * The Regents of the University of California. All rights reserved. 00055 * 00056 * Redistribution and use in source and binary forms, with or without 00057 * modification, are permitted provided that the following conditions 00058 * are met: 00059 * 1. Redistributions of source code must retain the above copyright 00060 * notice, this list of conditions and the following disclaimer. 00061 * 2. Redistributions in binary form must reproduce the above copyright 00062 * notice, this list of conditions and the following disclaimer in the 00063 * documentation and/or other materials provided with the distribution. 00064 * 3. All advertising materials mentioning features or use of this software 00065 * must display the following acknowledgement: 00066 * This product includes software developed by the University of 00067 * California, Berkeley and its contributors. 00068 * 4. Neither the name of the University nor the names of its contributors 00069 * may be used to endorse or promote products derived from this software 00070 * without specific prior written permission. 00071 * 00072 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 00073 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00074 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00075 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 00076 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00077 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 00078 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 00079 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00080 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 00081 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00082 * SUCH DAMAGE. 00083 */ 00084 00085 /* 00086 * $Log: rtlregs.h,v $ 00087 * Revision 1.1 2002/08/01 17:34:30 harald 00088 * First check in 00089 * 00090 * Revision 1.5 2002/06/26 17:29:08 harald 00091 * First pre-release with 2.4 stack 00092 * 00093 */ 00094 00095 /*! 00096 * \brief Realtek 8019AS register definitions. 00097 */ 00098 00099 /* 00100 * Register offset applicable to all register pages. 00101 */ 00102 #define NIC_CR 0x00 /*!< \brief Command register */ 00103 #define NIC_IOPORT 0x10 /*!< \brief I/O data port */ 00104 #define NIC_RESET 0x1f /*!< \brief Reset port */ 00105 00106 /* 00107 * Page 0 register offsets. 00108 */ 00109 #define NIC_PG0_CLDA0 0x01 /*!< \brief Current local DMA address 0 */ 00110 #define NIC_PG0_PSTART 0x01 /*!< \brief Page start register */ 00111 #define NIC_PG0_CLDA1 0x02 /*!< \brief Current local DMA address 1 */ 00112 #define NIC_PG0_PSTOP 0x02 /*!< \brief Page stop register */ 00113 #define NIC_PG0_BNRY 0x03 /*!< \brief Boundary pointer */ 00114 #define NIC_PG0_TSR 0x04 /*!< \brief Transmit status register */ 00115 #define NIC_PG0_TPSR 0x04 /*!< \brief Transmit page start address */ 00116 #define NIC_PG0_NCR 0x05 /*!< \brief Number of collisions register */ 00117 #define NIC_PG0_TBCR0 0x05 /*!< \brief Transmit byte count register 0 */ 00118 #define NIC_PG0_FIFO 0x06 /*!< \brief FIFO */ 00119 #define NIC_PG0_TBCR1 0x06 /*!< \brief Transmit byte count register 1 */ 00120 #define NIC_PG0_ISR 0x07 /*!< \brief Interrupt status register */ 00121 #define NIC_PG0_CRDA0 0x08 /*!< \brief Current remote DMA address 0 */ 00122 #define NIC_PG0_RSAR0 0x08 /*!< \brief Remote start address register 0 00123 Low byte address to read from the buffer. */ 00124 #define NIC_PG0_CRDA1 0x09 /*!< \brief Current remote DMA address 1 */ 00125 #define NIC_PG0_RSAR1 0x09 /*!< \brief Remote start address register 1 00126 High byte address to read from the buffer. */ 00127 #define NIC_PG0_RBCR0 0x0a /*!< \brief Remote byte count register 0 00128 Low byte of the number of bytes to read 00129 from the buffer. */ 00130 #define NIC_PG0_RBCR1 0x0b /*!< \brief Remote byte count register 1 00131 High byte of the number of bytes to read 00132 from the buffer. */ 00133 #define NIC_PG0_RSR 0x0c /*!< \brief Receive status register */ 00134 #define NIC_PG0_RCR 0x0c /*!< \brief Receive configuration register */ 00135 #define NIC_PG0_CNTR0 0x0d /*!< \brief Tally counter 0 (frame alignment errors) */ 00136 #define NIC_PG0_TCR 0x0d /*!< \brief Transmit configuration register */ 00137 #define NIC_PG0_CNTR1 0x0e /*!< \brief Tally counter 1 (CRC errors) */ 00138 #define NIC_PG0_DCR 0x0e /*!< \brief Data configuration register */ 00139 #define NIC_PG0_CNTR2 0x0f /*!< \brief Tally counter 2 (Missed packet errors) */ 00140 #define NIC_PG0_IMR 0x0f /*!< \brief Interrupt mask register */ 00141 00142 /* 00143 * Page 1 register offsets. 00144 */ 00145 #define NIC_PG1_PAR0 0x01 /*!< \brief Physical address register 0 */ 00146 #define NIC_PG1_PAR1 0x02 /*!< \brief Physical address register 1 */ 00147 #define NIC_PG1_PAR2 0x03 /*!< \brief Physical address register 2 */ 00148 #define NIC_PG1_PAR3 0x04 /*!< \brief Physical address register 3 */ 00149 #define NIC_PG1_PAR4 0x05 /*!< \brief Physical address register 4 */ 00150 #define NIC_PG1_PAR5 0x06 /*!< \brief Physical address register 5 */ 00151 #define NIC_PG1_CURR 0x07 /*!< \brief Current page register 00152 The next incoming packet will be stored 00153 at this page address. */ 00154 #define NIC_PG1_MAR0 0x08 /*!< \brief Multicast address register 0 */ 00155 #define NIC_PG1_MAR1 0x09 /*!< \brief Multicast address register 1 */ 00156 #define NIC_PG1_MAR2 0x0a /*!< \brief Multicast address register 2 */ 00157 #define NIC_PG1_MAR3 0x0b /*!< \brief Multicast address register 3 */ 00158 #define NIC_PG1_MAR4 0x0c /*!< \brief Multicast address register 4 */ 00159 #define NIC_PG1_MAR5 0x0d /*!< \brief Multicast address register 5 */ 00160 #define NIC_PG1_MAR6 0x0e /*!< \brief Multicast address register 6 */ 00161 #define NIC_PG1_MAR7 0x0f /*!< \brief Multicast address register 7 */ 00162 00163 /* 00164 * Page 2 register offsets. 00165 */ 00166 #define NIC_PG2_PSTART 0x01 /*!< \brief Page start register */ 00167 #define NIC_PG2_CLDA0 0x01 /*!< \brief Current local DMA address 0 */ 00168 #define NIC_PG2_PSTOP 0x02 /*!< \brief Page stop register */ 00169 #define NIC_PG2_CLDA1 0x02 /*!< \brief Current local DMA address 1 */ 00170 #define NIC_PG2_RNP 0x03 /*!< \brief Remote next packet pointer */ 00171 #define NIC_PG2_TSPR 0x04 /*!< \brief Transmit page start register */ 00172 #define NIC_PG2_LNP 0x05 /*!< \brief Local next packet pointer */ 00173 #define NIC_PG2_ACU 0x06 /*!< \brief Address counter (upper) */ 00174 #define NIC_PG2_ACL 0x07 /*!< \brief Address counter (lower) */ 00175 #define NIC_PG2_RCR 0x0c /*!< \brief Receive configuration register */ 00176 #define NIC_PG2_TCR 0x0d /*!< \brief Transmit configuration register */ 00177 #define NIC_PG2_DCR 0x0e /*!< \brief Data configuration register */ 00178 #define NIC_PG2_IMR 0x0f /*!< \brief Interrupt mask register */ 00179 00180 /* 00181 * Page 3 register offsets. 00182 */ 00183 #define NIC_PG3_EECR 0x01 /*!< \brief EEPROM command register */ 00184 #define NIC_PG3_BPAGE 0x02 /*!< \brief Boot-ROM page register */ 00185 #define NIC_PG3_CONFIG0 0x03 /*!< \brief Configuration register 0 (r/o) */ 00186 #define NIC_PG3_CONFIG1 0x04 /*!< \brief Configuration register 1 */ 00187 #define NIC_PG3_CONFIG2 0x05 /*!< \brief Configuration register 2 */ 00188 #define NIC_PG3_CONFIG3 0x06 /*!< \brief Configuration register 3 */ 00189 #define NIC_PG3_CSNSAV 0x08 /*!< \brief CSN save register (r/o) */ 00190 #define NIC_PG3_HLTCLK 0x09 /*!< \brief Halt clock */ 00191 #define NIC_PG3_INTR 0x0b /*!< \brief Interrupt pins (r/o) */ 00192 00193 /* 00194 * Command register bits. 00195 */ 00196 #define NIC_CR_STP 0x01 /*!< \brief Stop */ 00197 #define NIC_CR_STA 0x02 /*!< \brief Start */ 00198 #define NIC_CR_TXP 0x04 /*!< \brief Transmit packet */ 00199 #define NIC_CR_RD0 0x08 /*!< \brief Remote DMA command bit 0 */ 00200 #define NIC_CR_RD1 0x10 /*!< \brief Remote DMA command bit 1 */ 00201 #define NIC_CR_RD2 0x20 /*!< \brief Remote DMA command bit 2 */ 00202 #define NIC_CR_PS0 0x40 /*!< \brief Page select bit 0 */ 00203 #define NIC_CR_PS1 0x80 /*!< \brief Page select bit 1 */ 00204 00205 /* 00206 * Interrupt status register bits. 00207 */ 00208 #define NIC_ISR_PRX 0x01 /*!< \brief Packet received */ 00209 #define NIC_ISR_PTX 0x02 /*!< \brief Packet transmitted */ 00210 #define NIC_ISR_RXE 0x04 /*!< \brief Receive error */ 00211 #define NIC_ISR_TXE 0x08 /*!< \brief Transmit error */ 00212 #define NIC_ISR_OVW 0x10 /*!< \brief Overwrite warning */ 00213 #define NIC_ISR_CNT 0x20 /*!< \brief Counter overflow */ 00214 #define NIC_ISR_RDC 0x40 /*!< \brief Remote DMA complete */ 00215 #define NIC_ISR_RST 0x80 /*!< \brief Reset status */ 00216 00217 /* 00218 * Interrupt mask register bits. 00219 */ 00220 #define NIC_IMR_PRXE 0x01 /*!< \brief Packet received interrupt enable */ 00221 #define NIC_IMR_PTXE 0x02 /*!< \brief Packet transmitted interrupt enable */ 00222 #define NIC_IMR_RXEE 0x04 /*!< \brief Receive error interrupt enable */ 00223 #define NIC_IMR_TXEE 0x08 /*!< \brief Transmit error interrupt enable */ 00224 #define NIC_IMR_OVWE 0x10 /*!< \brief Overwrite warning interrupt enable */ 00225 #define NIC_IMR_CNTE 0x20 /*!< \brief Counter overflow interrupt enable */ 00226 #define NIC_IMR_RCDE 0x40 /*!< \brief Remote DMA complete interrupt enable */ 00227 00228 /* 00229 * Data configuration register bits. 00230 */ 00231 #define NIC_DCR_WTS 0x01 /*!< \brief Word transfer select */ 00232 #define NIC_DCR_BOS 0x02 /*!< \brief Byte order select */ 00233 #define NIC_DCR_LAS 0x04 /*!< \brief Long address select */ 00234 #define NIC_DCR_LS 0x08 /*!< \brief Loopback select */ 00235 #define NIC_DCR_AR 0x10 /*!< \brief Auto-initialize remote */ 00236 #define NIC_DCR_FT0 0x20 /*!< \brief FIFO threshold select bit 0 */ 00237 #define NIC_DCR_FT1 0x40 /*!< \brief FIFO threshold select bit 1 */ 00238 00239 /* 00240 * Transmit configuration register bits. 00241 */ 00242 #define NIC_TCR_CRC 0x01 /*!< \brief Inhibit CRC */ 00243 #define NIC_TCR_LB0 0x02 /*!< \brief Encoded loopback control bit 0 */ 00244 #define NIC_TCR_LB1 0x04 /*!< \brief Encoded loopback control bit 1 */ 00245 #define NIC_TCR_ATD 0x08 /*!< \brief Auto transmit disable */ 00246 #define NIC_TCR_OFST 0x10 /*!< \brief Collision offset enable */ 00247 00248 /* 00249 * Transmit status register bits. 00250 */ 00251 #define NIC_TSR_PTX 0x01 /*!< \brief Packet transmitted */ 00252 #define NIC_TSR_COL 0x04 /*!< \brief Transmit collided */ 00253 #define NIC_TSR_ABT 0x08 /*!< \brief Transmit aborted */ 00254 #define NIC_TSR_CRS 0x10 /*!< \brief Carrier sense lost */ 00255 #define NIC_TSR_FU 0x20 /*!< \brief FIFO underrun */ 00256 #define NIC_TSR_CDH 0x40 /*!< \brief CD heartbeat */ 00257 #define NIC_TSR_OWC 0x80 /*!< \brief Out of window collision */ 00258 00259 /* 00260 * Receive configuration register bits. 00261 */ 00262 #define NIC_RCR_SEP 0x01 /*!< \brief Save errored packets */ 00263 #define NIC_RCR_AR 0x02 /*!< \brief Accept runt packets */ 00264 #define NIC_RCR_AB 0x04 /*!< \brief Accept broadcast */ 00265 #define NIC_RCR_AM 0x08 /*!< \brief Accept multicast */ 00266 #define NIC_RCR_PRO 0x10 /*!< \brief Promiscuous physical */ 00267 #define NIC_RCR_MON 0x20 /*!< \brief Monitor mode */ 00268 00269 /* 00270 * Receive status register bits. 00271 */ 00272 #define NIC_RSR_PRX 0x01 /*!< \brief Packet received intact */ 00273 #define NIC_RSR_CRC 0x02 /*!< \brief CRC error */ 00274 #define NIC_RSR_FAE 0x04 /*!< \brief Frame alignment error */ 00275 #define NIC_RSR_FO 0x08 /*!< \brief FIFO overrun */ 00276 #define NIC_RSR_MPA 0x10 /*!< \brief Missed packet */ 00277 #define NIC_RSR_PHY 0x20 /*!< \brief Physical/multicast address */ 00278 #define NIC_RSR_DIS 0x40 /*!< \brief Receiver disabled */ 00279 #define NIC_RSR_DFR 0x80 /*!< \brief Deferring */ 00280 00281 /* 00282 * EEPROM command register bits. 00283 */ 00284 #define NIC_EECR_EEM1 0x80 /*!< \brief EEPROM Operating Mode */ 00285 #define NIC_EECR_EEM0 0x40 /*!< \brief EEPROM Operating Mode 00286 - 0 0 Normal operation 00287 - 0 1 Auto-load 00288 - 1 0 9346 programming 00289 - 1 1 Config register write enab */ 00290 #define NIC_EECR_EECS 0x08 /*!< \brief EEPROM Chip Select */ 00291 #define NIC_EECR_EESK 0x04 /*!< \brief EEPROM Clock */ 00292 #define NIC_EECR_EEDI 0x02 /*!< \brief EEPROM Data In */ 00293 #define NIC_EECR_EEDO 0x01 /*!< \brief EEPROM Data Out */ 00294 00295 /* 00296 * Configuration register 2 bits. 00297 */ 00298 #define NIC_CONFIG2_PL1 0x80 /*!< \brief Network media type */ 00299 #define NIC_CONFIG2_PL0 0x40 /*!< \brief Network media type 00300 - 0 0 TP/CX auto-detect 00301 - 0 1 10baseT 00302 - 1 0 10base5 00303 - 1 1 10base2 */ 00304 #define NIC_CONFIG2_BSELB 0x20 /*!< \brief BROM disable */ 00305 #define NIC_CONFIG2_BS4 0x10 /*!< \brief BROM size/base */ 00306 #define NIC_CONFIG2_BS3 0x08 00307 #define NIC_CONFIG2_BS2 0x04 00308 #define NIC_CONFIG2_BS1 0x02 00309 #define NIC_CONFIG2_BS0 0x01 00310 00311 /* 00312 * Configuration register 3 bits 00313 */ 00314 #define NIC_CONFIG3_PNP 0x80 /*!< \brief PnP Mode */ 00315 #define NIC_CONFIG3_FUDUP 0x40 /*!< \brief Full duplex */ 00316 #define NIC_CONFIG3_LEDS1 0x20 /*!< \brief LED1/2 pin configuration 00317 - 0 LED1 == LED_RX, LED2 == LED_TX 00318 - 1 LED1 == LED_CRS, LED2 == MCSB */ 00319 #define NIC_CONFIG3_LEDS0 0x10 /*!< \brief LED0 pin configration 00320 - 0 LED0 pin == LED_COL 00321 - 1 LED0 pin == LED_LINK */ 00322 #define NIC_CONFIG3_SLEEP 0x04 /*!< \brief Sleep mode */ 00323 #define NIC_CONFIG3_PWRDN 0x02 /*!< \brief Power Down */ 00324 #define NIC_CONFIG3_ACTIVEB 0x01 /*!< \brief inverse of bit 0 in PnP Act Reg */ 00325 00326 00327 /*! 00328 * \brief Read byte from controller register. 00329 */ 00330 #define nic_read(reg) *(base + (reg)) 00331 00332 /*! 00333 * \brief Write byte to controller register. 00334 */ 00335 #define nic_write(reg, data) *(base + (reg)) = data 00336 00337 #endif