spibus_npl.c

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/*
 * Copyright (C) 2008-2009 by egnite GmbH
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the copyright holders nor the names of
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * For additional information see http://www.ethernut.de/
 */

#include <cfg/spi.h>

#include <sys/timer.h>
#include <sys/nutdebug.h>

#include <stdlib.h>
#include <memdebug.h>
#include <errno.h>

#include <dev/cy2239x.h>
#include <dev/npl.h>
#include <dev/spibus_npl.h>

#ifndef NPL_MMC_CLOCK
#define NPL_MMC_CLOCK   12500000
#endif

static int NplSpiSetup(NUTSPINODE * node)
{
#if defined(NUT_PLL_NPLCLK1)
    uint32_t clk;
    uint32_t clkdiv;

    NUTASSERT(node != NULL);

    /* Query the PLL number routed to Clock B. */
    clk = Cy2239xGetPll(NUT_PLL_NPLCLK1);
    /* Get the frequency of this PLL. */
    clk = Cy2239xPllGetFreq((int)clk, 7);
    /* Calculate the required divider value. */
    clkdiv = (clk + NPL_MMC_CLOCK - 10) / NPL_MMC_CLOCK;

    /* 
     * Not sure about the Cy-routines. The DIVSEL bit specifies which
     * divider is used, which is indirectly connected to S2, which is
     * high by default. For now set both dividers. 
     */
    if (Cy2239xSetDivider(NUT_PLL_NPLCLK1, 1, (int)clkdiv)) {
        return -1;
    }
    if (Cy2239xSetDivider(NUT_PLL_NPLCLK1, 0, (int)clkdiv)) {
        return -1;
    }

    /* Update interface parameters. */
    node->node_rate = clk / clkdiv;
    node->node_mode &= ~SPI_MODE_UPDATE;
#endif

    return 0;
}

static int NplSpiChipSelect(uint_fast8_t cs, uint_fast8_t hi)
{
    int rc = 0;

    switch (cs) {
    case 0:
        if (hi) {
            outb(NPL_XER, inb(NPL_XER) | NPL_MMCS);
        } else {
            outb(NPL_XER, inb(NPL_XER) & ~NPL_MMCS);
        }
        break;
    case 1:
        if (hi) {
            outb(NPL_XER, inb(NPL_XER) | NPL_NPCS0);
        } else {
            outb(NPL_XER, inb(NPL_XER) & ~NPL_NPCS0);
        }
        break;
    default:
        errno = EIO;
        rc = -1;
        break;
    }
    return rc;
}

int NplSpiBusSelect(NUTSPINODE * node, uint32_t tmo)
{
    int rc;

    /* Sanity check. */
    NUTASSERT(node != NULL);
    NUTASSERT(node->node_bus != NULL);

    /* Allocate the bus. */
    rc = NutEventWait(&node->node_bus->bus_mutex, tmo);
    if (rc) {
        errno = EIO;
    } else {
        /* If the mode update bit is set, then update our shadow registers. */
        if (node->node_mode & SPI_MODE_UPDATE) {
            NplSpiSetup(node);
        }

        /* Finally activate the node's chip select. */
        rc = NplSpiChipSelect(node->node_cs, 0);
        if (rc) {
            /* Release the bus in case of an error. */
            NutEventPost(&node->node_bus->bus_mutex);
        }
    }
    return rc;
}

int NplSpiBusDeselect(NUTSPINODE * node)
{
    /* Sanity check. */
    NUTASSERT(node != NULL);
    NUTASSERT(node->node_bus != NULL);

    /* Deactivate the node's chip select. */
    NplSpiChipSelect(node->node_cs, 1);

    /* Release the bus. */
    NutEventPost(&node->node_bus->bus_mutex);

    return 0;
}

int NplSpiBusNodeInit(NUTSPINODE * node)
{
    int rc;

    /* Sanity check. */
    NUTASSERT(node != NULL);

    /* Try to deactivate the node's chip select. */
    rc = NplSpiChipSelect(node->node_cs, 1);

    if (rc == 0) {
        NplSpiSetup(node);
    }
    return rc;
}

int NplSpiBusPollTransfer(NUTSPINODE * node, CONST void *txbuf, void *rxbuf, int xlen)
{
    uint8_t rxc;
    uint8_t txc = 0xFF;
    uint8_t *txp = (uint8_t *) txbuf;
    uint8_t *rxp = (uint8_t *) rxbuf;

    /* Sanity check. */
    NUTASSERT(node != NULL);

    while (xlen--) {
        if (txp) {
            txc = *txp++;
        }
        /* Transmission starts by writing the transmit data. */
        outb(NPL_MMCDR, txc);
        /* Wait for receiver data register full. */
        while ((inb(NPL_SLR) & NPL_MMCREADY) == 0);
        /* Read incoming data. */
        rxc = inb(NPL_MMCDR);
        if (rxp) {
            *rxp++ = rxc;
        }
    }
    return 0;
}

NUTSPIBUS spiBusNpl = {
    NULL,                   
    NULL,                   
    0,                      
    NULL,                   
    NplSpiBusNodeInit,      
    NplSpiBusSelect,        
    NplSpiBusDeselect,      
    NplSpiBusPollTransfer,  
    NutSpiBusWait,          
    NutSpiBusSetMode,       
    NutSpiBusSetRate,       
    NutSpiBusSetBits        
};