Nut/OS  4.10.3
API Reference
ihndlr.h
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00001 #ifndef _ARCH_AVR32_INTERRUPT_HANDLER_H_
00002 #define _ARCH_AVR32_INTERRUPT_HANDLER_H_
00003 
00039 /*
00040 * $Log: ihndlr.h,v $
00041 *
00042 */
00043 
00044 //
00045 //  W A R N I N G
00046 //  -------------
00047 //
00048 // This file is not part of the Nut/OS API.  It exists for the convenience
00049 // of Interrupt Handling.  This header file may change from version
00050 // to version without notice, or even be removed.
00051 //
00052 // We mean it.
00053 //
00054 //
00055 
00057 #if __GNUC__
00058 typedef void (*__int_handler)(void);
00059 #elif __ICCAVR32__
00060 typedef void (__interrupt *__int_handler)(void);
00061 #endif
00062 
00063 extern void init_interrupts(void);
00064 
00065 extern void register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev);
00066 
00067 /*
00068         WHEN CHANGING PLEASE NOTICE:
00069         Errata 41.5.5.5 reads:
00070         "Need two NOPs instruction after instructions masking interrupts
00071         The instructions following in the pipeline the instruction masking the interrupt through SR
00072         may behave abnormally.
00073         Fix/Workaround
00074         Place two NOPs instructions after each SSRF or MTSR instruction setting IxM or GM in SR."
00075 */
00076 #define IRQ_ENTRY()                                                                                                                                                     \
00077 {                                                                                                                                                                                       \
00078         /* Prevent preempted interrupts disabling global interrupts */                                                  \
00079         __asm__ __volatile__ ("ssrf\t%0; nop; nop" :: "i" (AVR32_SR_GM_OFFSET) : "memory");             \
00080                                                                                                                                                                                         \
00081         /* Save R0..R7. Other registers are saved by the CPU if __AVR32_UC__ */                                 \
00082         /* Or by exception.S if __AVR32_AP7000__ */                                                                                             \
00083         __asm__ __volatile__ ("pushm r0-r7");                                                                                                   \
00084 }
00085 
00086 
00087 #define IRQ_EXIT()                                                                                                                                                      \
00088 {                                                                                                                                                                                       \
00089         /* Restore R0..R7 */                                                                                                                                    \
00090         __asm__ __volatile__ ("popm r0-r7");                                                                                                    \
00091                                                                                                                                                                                         \
00092         /* Prevent preempted interrupts disabling global interrupts */                                                  \
00093         __asm__ __volatile__ ("csrf\t%0" :: "i" (AVR32_SR_GM_OFFSET) : "memory");                               \
00094 }
00095 
00096 #endif // _ARCH_AVR32_INTERRUPT_HANDLER_H_