Nut/OS  4.10.3
API Reference
ih_at91spi1.c
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00001 /*
00002  * Copyright (C) 2006 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log$
00036  * Revision 1.3  2008/08/11 06:59:11  haraldkipp
00037  * BSD types replaced by stdint types (feature request #1282721).
00038  *
00039  * Revision 1.2  2008/07/26 09:43:01  haraldkipp
00040  * Added support for retrieving and setting the interrupt mode.
00041  *
00042  * Revision 1.1  2006/09/29 12:34:59  haraldkipp
00043  * Basic AT91 SPI support added.
00044  *
00045  */
00046 
00047 #include <arch/arm.h>
00048 #include <dev/irqreg.h>
00049 
00050 #ifndef NUT_IRQPRI_SPI1
00051 #define NUT_IRQPRI_SPI1  4
00052 #endif
00053 
00054 static int SerialPeripheral1IrqCtl(int cmd, void *param);
00055 
00056 IRQ_HANDLER sig_SPI1 = {
00057 #ifdef NUT_PERFMON
00058     0,                          /* Interrupt counter, ir_count. */
00059 #endif
00060     NULL,                       /* Passed argument, ir_arg. */
00061     NULL,                       /* Handler subroutine, ir_handler. */
00062     SerialPeripheral1IrqCtl     /* Interrupt control, ir_ctl. */
00063 };
00064 
00068 static void SerialPeripheral1IrqEntry(void) __attribute__ ((naked));
00069 void SerialPeripheral1IrqEntry(void)
00070 {
00071     IRQ_ENTRY();
00072 #ifdef NUT_PERFMON
00073     sig_SPI1.ir_count++;
00074 #endif
00075     if (sig_SPI1.ir_handler) {
00076         (sig_SPI1.ir_handler) (sig_SPI1.ir_arg);
00077     }
00078     IRQ_EXIT();
00079 }
00080 
00098 static int SerialPeripheral1IrqCtl(int cmd, void *param)
00099 {
00100     int rc = 0;
00101     unsigned int *ival = (unsigned int *) param;
00102     int_fast8_t enabled = inr(AIC_IMR) & _BV(SPI1_ID);
00103 
00104     /* Disable interrupt. */
00105     if (enabled) {
00106         outr(AIC_IDCR, _BV(SPI1_ID));
00107     }
00108 
00109     switch (cmd) {
00110     case NUT_IRQCTL_INIT:
00111         /* Set the vector. */
00112         outr(AIC_SVR(SPI1_ID), (unsigned int) SerialPeripheral1IrqEntry);
00113         /* Initialize to edge triggered with defined priority. */
00114         outr(AIC_SMR(SPI1_ID), AIC_SRCTYPE_INT_EDGE_TRIGGERED | NUT_IRQPRI_SPI1);
00115         /* Clear interrupt */
00116         outr(AIC_ICCR, _BV(SPI1_ID));
00117         break;
00118     case NUT_IRQCTL_STATUS:
00119         if (enabled) {
00120             *ival |= 1;
00121         } else {
00122             *ival &= ~1;
00123         }
00124         break;
00125     case NUT_IRQCTL_ENABLE:
00126         enabled = 1;
00127         break;
00128     case NUT_IRQCTL_DISABLE:
00129         enabled = 0;
00130         break;
00131     case NUT_IRQCTL_GETMODE:
00132         {
00133             unsigned int val = inr(AIC_SMR(SPI1_ID)) & AIC_SRCTYPE;
00134             if (val == AIC_SRCTYPE_INT_LEVEL_SENSITIVE || val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00135                 *ival = NUT_IRQMODE_LEVEL;
00136             } else  {
00137                 *ival = NUT_IRQMODE_EDGE;
00138             }
00139         }
00140         break;
00141     case NUT_IRQCTL_SETMODE:
00142         if (*ival == NUT_IRQMODE_LEVEL) {
00143             outr(AIC_SMR(SPI1_ID), (inr(AIC_SMR(SPI1_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_INT_LEVEL_SENSITIVE);
00144         } else if (*ival == NUT_IRQMODE_EDGE) {
00145             outr(AIC_SMR(SPI1_ID), (inr(AIC_SMR(SPI1_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_INT_EDGE_TRIGGERED);
00146         } else  {
00147             rc = -1;
00148         }
00149         break;
00150     case NUT_IRQCTL_GETPRIO:
00151         *ival = inr(AIC_SMR(SPI1_ID)) & AIC_PRIOR;
00152         break;
00153     case NUT_IRQCTL_SETPRIO:
00154         outr(AIC_SMR(SPI1_ID), (inr(AIC_SMR(SPI1_ID)) & ~AIC_PRIOR) | *ival);
00155         break;
00156 #ifdef NUT_PERFMON
00157     case NUT_IRQCTL_GETCOUNT:
00158         *ival = (unsigned int) sig_SPI1.ir_count;
00159         sig_SPI1.ir_count = 0;
00160         break;
00161 #endif
00162     default:
00163         rc = -1;
00164         break;
00165     }
00166 
00167     /* Enable interrupt. */
00168     if (enabled) {
00169         outr(AIC_IECR, _BV(SPI1_ID));
00170     }
00171     return rc;
00172 }