at91sam7x_ek.c

Go to the documentation of this file.

/*
 * Copyright 2010 by egnite GmbH
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the copyright holders nor the names of
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * For additional information see http://www.ethernut.de/
 */

/*
 * \file arch/arm/board/at91sam7x_ek.c
 * \brief AT91SAM7X-EK board initialization.
 *
 * \verbatim
 * $Id$
 * \endverbatim
 */

#include <arch/arm.h>

#define PHY_STRAP_AD0       _BV(PB5_ERX0_A)
#define PHY_STRAP_AD1       _BV(PB6_ERX1_A)
#define PHY_STRAP_AD2       _BV(PB13_ERX2_A)
#define PHY_STRAP_AD3       _BV(PB14_ERX3_A)
#define PHY_STRAP_AD4       _BV(PB4_ECRS_A)
#define PHY_STRAP_ISOLATE   _BV(PB0_ETXCK_EREFCK_A)
#define PHY_STRAP_10BTSER   _BV(PB17_ERXCK_A)
#define PHY_STRAP_RPTR      _BV(PB7_ERXER_A)
#define PHY_STRAP_RMII      _BV(PB16_ECOL_A)
#define PHY_STRAP_TESTMODE  _BV(PB15_ERXDV_ECRSDV_A)

#define PHY_PWRDWN          _BV(PB18_EF100_A)


#define PHY_STRAP   ( \
    PHY_STRAP_AD0 | PHY_STRAP_AD1 | PHY_STRAP_AD2 | PHY_STRAP_AD3 | \
    PHY_STRAP_AD4 | PHY_STRAP_RMII | PHY_STRAP_TESTMODE )

static void Sam7xekDelay(int n)
{
    int l;

    for (l = 0; l < n; l++) {
        _NOP();
    }
}

static void Sam7xekClockInit(void)
{
    outr(PMC_PCER, _BV(PIOB_ID));
    outr(PMC_PCER, _BV(EMAC_ID));
}

static void Sam7xekReset(void)
{
    unsigned int mr;

    /* Save initial configuration. */
    mr = inr(RSTC_MR) & ~RSTC_KEY_MSK;
    /* Set reset pulse length to 250us, disable user reset. */
    outr(RSTC_MR, RSTC_KEY | (2 << RSTC_ERSTL_LSB));
    /* Invoke external reset. */
    outr(RSTC_CR, RSTC_KEY | RSTC_EXTRST);
    /* If we have 10k/100n RC, we need to wait 25us (1200 cycles) 
    ** for NRST becoming low. */
    Sam7xekDelay(250);
    /* Wait until reset pin is released. */
    while ((inr(RSTC_SR) & RSTC_NRSTL) == 0);
    /* Due to the RC filter, the pin is rising very slowly. */
    Sam7xekDelay(25000);
    /* Restore initial configuration. */
    outr(RSTC_MR, RSTC_KEY | mr);
}

static void Sam7xekPhyInit(void)
{
    /* Power up the PHY. */
    outr(PIOB_PER, PHY_PWRDWN);
    outr(PIOB_OER, PHY_PWRDWN);
    outr(PIOB_CODR, PHY_PWRDWN);
    /* The PHY needs 25ms for powering up. */
    Sam7xekDelay(250000);
    /* Disable strap pin pull-ups. */
    outr(PIOB_PUDR, PHY_STRAP);
    /* Toggle reset line. */
    Sam7xekReset();
    /* Re-enable the pull-ups. */
    outr(PIOB_PUER, PHY_STRAP);
}

void NutBoardInit(void)
{
    Sam7xekClockInit();
    Sam7xekPhyInit();
}