Nut/OS  5.0.5
API Reference
arm.h
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00001 #ifndef _ARCH_ARM_H_
00002 #define _ARCH_ARM_H_
00003 
00004 /*
00005  * Copyright (C) 2001-2006 by egnite Software GmbH. All rights reserved.
00006  *
00007  * Redistribution and use in source and binary forms, with or without
00008  * modification, are permitted provided that the following conditions
00009  * are met:
00010  *
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer.
00013  * 2. Redistributions in binary form must reproduce the above copyright
00014  *    notice, this list of conditions and the following disclaimer in the
00015  *    documentation and/or other materials provided with the distribution.
00016  * 3. Neither the name of the copyright holders nor the names of
00017  *    contributors may be used to endorse or promote products derived
00018  *    from this software without specific prior written permission.
00019  *
00020  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00021  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00022  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00023  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
00024  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00025  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00026  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00027  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00028  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00029  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00030  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00031  * SUCH DAMAGE.
00032  *
00033  * For additional information see http://www.ethernut.de/
00034  */
00035 
00036 /*
00037  * $Log$
00038  * Revision 1.22  2009/02/17 09:34:34  haraldkipp
00039  * Added inline assembler macros for reading/writing coprocessor CP15
00040  * control register.
00041  *
00042  * Revision 1.21  2009/01/16 19:45:42  haraldkipp
00043  * All ARM code is now running in system mode.
00044  *
00045  * Revision 1.20  2008/08/06 12:51:09  haraldkipp
00046  * Added support for Ethernut 5 (AT91SAM9XE reference design).
00047  *
00048  * Revision 1.19  2008/02/15 17:00:24  haraldkipp
00049  * Spport for AT91SAM7SE512 added.
00050  *
00051  * Revision 1.18  2007/10/04 20:29:08  olereinhardt
00052  * Support for SAM7S256 added
00053  *
00054  * Revision 1.17  2007/05/02 11:32:07  haraldkipp
00055  * Mapping of Harvard specific stdio functions moved to stdio.h and io.h.
00056  *
00057  * Revision 1.16  2006/08/31 19:04:08  haraldkipp
00058  * Added support for the AT91SAM9260 and Atmel's AT91SAM9260 Evaluation Kit.
00059  *
00060  * Revision 1.15  2006/08/05 11:58:22  haraldkipp
00061  * Missing brackets may result in unexpected expansion of the _BV() macro.
00062  *
00063  * Revision 1.14  2006/08/01 07:35:59  haraldkipp
00064  * Exclude function prototypes when included by assembler.
00065  *
00066  * Revision 1.13  2006/07/21 09:08:58  haraldkipp
00067  * Map puts_P to puts and _write_P to _write for non-Harvard architectures.
00068  *
00069  * Revision 1.12  2006/07/10 14:27:03  haraldkipp
00070  * C++ will use main instead of NutAppMain. Contributed by Matthias Wilde.
00071  *
00072  * Revision 1.11  2006/07/05 07:45:25  haraldkipp
00073  * Split on-chip interface definitions.
00074  *
00075  * Revision 1.10  2006/06/28 17:22:34  haraldkipp
00076  * Make it compile for AT91SAM7X256.
00077  *
00078  * Revision 1.9  2006/05/25 09:35:27  haraldkipp
00079  * Dummy macros added to support the avr-libc special function register
00080  * definitions.
00081  *
00082  * Revision 1.8  2006/03/16 15:25:26  haraldkipp
00083  * Changed human readable strings from u_char to char to stop GCC 4 from
00084  * nagging about signedness.
00085  *
00086  * Revision 1.7  2006/03/02 20:02:05  haraldkipp
00087  * Added a few macros to allow compilation with ICCARM.
00088  *
00089  * Revision 1.6  2006/02/23 15:34:00  haraldkipp
00090  * Support for Philips LPC2xxx Family and LPC-E2294 Board from Olimex added.
00091  * Many thanks to Michael Fischer for this port.
00092  *
00093  * Revision 1.5  2005/11/20 14:45:15  haraldkipp
00094  * Define printf_P for non Harvard architectures.
00095  *
00096  * Revision 1.4  2005/10/24 18:03:02  haraldkipp
00097  * GameBoy header file added.
00098  *
00099  * Revision 1.3  2005/10/24 10:35:05  haraldkipp
00100  * Port I/O macros added.
00101  *
00102  * Revision 1.2  2004/09/08 10:24:26  haraldkipp
00103  * RAMSTART is too platform dependant
00104  *
00105  * Revision 1.1  2004/03/16 16:48:28  haraldkipp
00106  * Added Jan Dubiec's H8/300 port.
00107  *
00108  * Revision 1.1  2004/02/01 18:49:47  haraldkipp
00109  * Added CPU family support
00110  *
00111  */
00112 
00113 #include <cfg/arch.h>
00114 
00115 #if defined(__ARM_ARCH_4T__)
00116 #include <arch/arm/armv4t.h>
00117 #elif defined(__ARM_ARCH_7M__)
00118 #include <arch/arm/armv7_m.h>
00119 #else
00120 #error ARM architecture unknown or not specified
00121 #endif
00122 
00123 
00124 #ifdef __GNUC__
00125 #define CONST      const
00126 #define INLINE     inline
00127 #else
00128 #ifndef CONST
00129 #define CONST      const
00130 #endif
00131 #ifndef INLINE
00132 #define INLINE
00133 #endif
00134 #endif
00135 
00137 #define SIGNAL(x)  __attribute__((interrupt_handler)) void x(void)
00138 
00139 /*
00140  * The following attributes are currently implemented for the AT91SAM7SE
00141  * only. To use it for other platforms, it is required to enhance linker
00142  * scripts and runtime initialization.
00143  */
00144 #if defined(MCU_AT91SAM7SE)
00145 
00156 #define SECTION_FUNC_IRAM   __attribute__ ((long_call, section(".text_iram")))
00157 
00167 #define SECTION_DATA_IRAM   __attribute__ ((section(".data_iram")))
00168 
00178 #define SECTION_BSS_IRAM    __attribute__ ((section(".bss_iram")))
00179 
00188 #define SECTION_FUNC_XRAM   __attribute__ ((long_call, section(".text_xram")))
00189 
00199 #define SECTION_BSS_XRAM    __attribute__ ((section(".bss_xram")))
00200 
00201 #endif
00202 
00208 #define RAMFUNC __attribute__ ((long_call, section (".ramfunc")))
00209 
00210 #if !defined(__arm__) && !defined(__cplusplus)
00211 #define main       NutAppMain
00212 #endif
00213 
00214 #define PSTR(p)    (p)
00215 #define PRG_RDB(p) (*((const char *)(p)))
00216 
00217 #define prog_char  const char
00218 #define PGM_P      prog_char *
00219 
00220 #define strlen_P(x)             strlen((char *)(x))
00221 #define strcpy_P(x,y)           strcpy(x,(char *)(y))
00222 #define strcat_P(x,y)           strcat(x,(char *)(y))
00223 
00224 #define strcmp_P(x, y)          strcmp((char *)(x), (char *)(y))
00225 #define memcpy_P(x, y, z)       memcpy(x, y, z)
00226 
00227 #ifndef __ASSEMBLER__
00228 
00231 extern void *__bss_end;
00232 
00236 extern void *__stack;
00237 #endif
00238 
00239 #ifndef _NOP
00240 #ifdef __GNUC__
00241 #define _NOP() __asm__ __volatile__ ("mov r0, r0  @ _NOP")
00242 #else
00243 #define _NOP() asm("mov r0, r0")
00244 #endif
00245 #endif
00246 
00247 #define outb(_reg, _val)  (*((volatile unsigned char *)(_reg)) = (_val))
00248 #define outw(_reg, _val)  (*((volatile unsigned short *)(_reg)) = (_val))
00249 #define outr(_reg, _val)  (*((volatile unsigned int *)(_reg)) = (_val))
00250 
00251 #define inb(_reg)   (*((volatile unsigned char *)(_reg)))
00252 #define inw(_reg)   (*((volatile unsigned short *)(_reg)))
00253 #define inr(_reg)   (*((volatile unsigned int *)(_reg)))
00254 
00255 #define _BV(bit)    (1 << (bit))
00256 
00257 #define sbi(_reg, _bit)         outr(_reg, inr(_reg) | _BV(_bit))
00258 #define cbi(_reg, _bit)         outr(_reg, inr(_reg) & ~_BV(_bit))
00259 #define bit_is_set(_reg, _bit)  ((inr(_reg) & _BV(_bit)) != 0)
00260 
00261 #ifdef __IMAGECRAFT__
00262 #define __attribute__(x)
00263 #endif
00264 
00265 #define _SFR_MEM8(addr)     (addr)
00266 #define _SFR_MEM16(addr)    (addr)
00267 
00268 #if !defined (__ASSEMBLER__)
00269 #define mem_barrier() __asm__ __volatile__("":::"memory")
00270 
00271 static INLINE void mem_wr(unsigned int reg, unsigned int val)
00272 {
00273     *(volatile unsigned int *) reg = val;
00274 }
00275 
00276 static INLINE void mem_wr8(unsigned int reg, uint8_t val)
00277 {
00278     *(volatile uint8_t *) reg = val;
00279 }
00280 
00281 static INLINE void mem_wr16(unsigned int reg, uint16_t val)
00282 {
00283     *(volatile uint16_t *) reg = val;
00284 }
00285 
00286 static INLINE void mem_wr32(unsigned int reg, uint32_t val)
00287 {
00288     *(volatile uint32_t *) reg = val;
00289 }
00290 
00291 static INLINE unsigned int mem_rd(unsigned int reg)
00292 {
00293     return *(const volatile unsigned int *) reg;
00294 }
00295 
00296 static INLINE uint8_t mem_rd8(unsigned int reg)
00297 {
00298     return *(const volatile uint8_t *) reg;
00299 }
00300 
00301 static INLINE uint16_t mem_rd16(unsigned int reg)
00302 {
00303     return *(const volatile uint16_t *) reg;
00304 }
00305 
00306 static INLINE uint32_t mem_rd32(unsigned int reg)
00307 {
00308     return *(const volatile uint32_t *) reg;
00309 }
00310 
00311 static INLINE void mem_wr_mb(unsigned int reg, unsigned int val)
00312 {
00313     mem_barrier();
00314     mem_wr(reg, val);
00315 }
00316 
00317 static INLINE void mem_wr8_mb(unsigned int reg, uint8_t val)
00318 {
00319     mem_barrier();
00320     mem_wr8(reg, val);
00321 }
00322 
00323 static INLINE void mem_wr16_mb(unsigned int reg, uint16_t val)
00324 {
00325     mem_barrier();
00326     mem_wr16(reg, val);
00327 }
00328 
00329 static INLINE void mem_wr32_mb(unsigned int reg, uint32_t val)
00330 {
00331     mem_barrier();
00332     mem_wr32(reg, val);
00333 }
00334 
00335 static INLINE unsigned int mem_rd_mb(unsigned int reg)
00336 {
00337     unsigned int rc = mem_rd(reg);
00338     mem_barrier();
00339 
00340     return rc;
00341 }
00342 
00343 static INLINE uint8_t mem_rd8_mb(unsigned int reg)
00344 {
00345     uint8_t rc = mem_rd8(reg);
00346     mem_barrier();
00347 
00348     return rc;
00349 }
00350 
00351 static INLINE uint16_t mem_rd16_mb(unsigned int reg)
00352 {
00353     uint16_t rc = mem_rd16(reg);
00354     mem_barrier();
00355 
00356     return rc;
00357 }
00358 
00359 static INLINE uint32_t mem_rd32_mb(unsigned int reg)
00360 {
00361     uint32_t rc = mem_rd32(reg);
00362     mem_barrier();
00363 
00364     return rc;
00365 }
00366 
00367 #endif /* __ASSEMBLER__ */
00368 
00369 #if !defined (__ASSEMBLER__) && defined(__CROSSWORKS_ARM)
00370 
00377 #define strcasecmp(s1, s2)      stricmp(s1, s2)
00378 #define strncasecmp(s1, s2, n)  strnicmp(s1, s2, n)
00379 
00380 /*
00381  * Not supported by CrossWorks, added prototypes here.
00382  */
00383 int   stricmp(CONST char *s1, CONST char *s2);
00384 int   strnicmp(CONST char *s1, CONST char *s2, size_t n);
00385 char *strdup(CONST char *str);
00386 
00387 /*
00388  * If "Enforce ANSI Checking" is enabled, which is
00389  * the default from the v2.x version of CrossWorks
00390  * the keyword asm will not be recognize. Therefore
00391  * the next define is needed to solve the problem.
00392  */
00393 #define asm __asm__
00394 #endif
00395 
00396 #endif